Match Document Document Title Score
8380931 Memory cache data center  
A data center system includes a memory cache coupled to a data center controller. The memory cache includes volatile memory and stores data that is persisted in a database in a different data...
1000
7644236 Memory cache bank prediction  
A memory cache bank prediction unit is provided for use in a processor having a plurality of memory cache banks. The memory cache bank prediction unit has an input port that receives an...
981
US20050132138 Memory cache bank prediction  
A memory cache bank prediction unit is provided for use in a processor having a plurality of memory cache banks. The memory cache bank prediction unit has an input port that receives an...
978
US20030051099 MEMORY CACHE BANK PREDICTION  
A memory cache bank prediction unit is provided for use in a processor having a plurality of memory cache banks. The memory cache bank prediction unit has an input port that receives an...
977
US20040143705 Memory cache bank prediction  
A memory cache bank prediction unit is provided for use in a processor having a plurality of memory cache banks. The memory cache bank prediction unit has an input port that receives an...
977
9195604 Dynamic memory cache size adjustment in a memory device  
Methods for dynamic memory cache size adjustment, enabling dynamic memory cache size adjustment, memory devices, and memory systems are disclosed. One such method for dynamic memory cache size...
973
9411727 Split write operation for resistive memory cache  
A method of reading from and writing to a resistive memory cache includes receiving a write command and dividing the write command into multiple write sub-commands. The method also includes...
966
US20110225367 MEMORY CACHE DATA CENTER  
A data center system includes a memory cache coupled to a data center controller. The memory cache includes volatile memory and stores data that is persisted in a database in a different data...
955
6880063 Memory cache bank prediction  
A memory cache bank prediction unit is provided for use in a processor having a plurality of memory cache banks. The memory cache bank prediction unit has an input port that receives an...
945
US20160239432 APPLICATION-LAYER MANAGED MEMORY CACHE  
In order to prevent data thrashing and the resulting performance degradation, a computer system may maintain an application-layer cache space to more effectively use physical memory and, thus,...
944
US20150026416 DYNAMIC MEMORY CACHE SIZE ADJUSTMENT IN A MEMORY DEVICE  
Methods for dynamic memory cache size adjustment, enabling dynamic memory cache size adjustment, memory devices, and memory systems are disclosed. One such method for dynamic memory cache size...
927
US20080082755 Administering An Access Conflict In A Computer Memory Cache  
Administering an access conflict in a computer memory cache, including receiving in a memory cache controller a write address and write data from a store memory instruction execution unit of a...
920
US20120311293 DYNAMIC MEMORY CACHE SIZE ADJUSTMENT IN A MEMORY DEVICE  
Methods for dynamic memory cache size adjustment, enabling dynamic memory cache size adjustment, memory devices, and memory systems are disclosed. One such method for dynamic memory cache size...
920
8886911 Dynamic memory cache size adjustment in a memory device  
Methods for dynamic memory cache size adjustment, enabling dynamic memory cache size adjustment, memory devices, and memory systems are disclosed. One such method for dynamic memory cache size...
914
9535843 Managed memory cache with application-layer prefetching  
In order to prevent data thrashing and the resulting performance degradation, a computer system may maintain an application-layer cache space to more effectively use physical memory and, thus,...
913
6260119 Memory cache management for isochronous memory access  
Isochronous information is transferred between an IO device and a first buffer (N) of a plurality of buffers in a system memory. The isochronous information stored in the plurality of buffers is...
913
US20170116124 Buffering Request Data for In-Memory Cache  
Techniques are disclosed relating to an in-memory cache for web application data. In some embodiments, received transactions include multiple operations, including one or more cache operations to...
911
9858187 Buffering request data for in-memory cache  
Techniques are disclosed relating to an in-memory cache for web application data. In some embodiments, received transactions include multiple operations, including one or more cache operations to...
911
US20200081838 PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES  
Systems, apparatuses, and methods for performing coherence processing and memory cache processing in parallel are disclosed. A system includes a communication fabric and a plurality of...
909
US20160239423 MANAGED MEMORY CACHE WITH APPLICATION-LAYER PREFETCHING  
In order to prevent data thrashing and the resulting performance degradation, a computer system may maintain an application-layer cache space to more effectively use physical memory and, thus,...
908
7203798 Data memory cache unit and data memory cache system  
A data memory cache unit is provided which is capable of heightening the speed of memory access. The cache unit 117 executes reading and writing of data in a 16-byte width line unit in a main...
890
9201794 Dynamic hierarchical memory cache awareness within a storage system  
Described is a system and computer program product for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system. Specifically, when performing dynamic read operations...
884
US20160048452 DYNAMIC HIERARCHICAL MEMORY CACHE AWARENESS WITHIN A STORAGE SYSTEM  
A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations...
883
9817765 Dynamic hierarchical memory cache awareness within a storage system  
A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations...
883
US20120297142 DYNAMIC HIERARCHICAL MEMORY CACHE AWARENESS WITHIN A STORAGE SYSTEM  
Described is a system and computer program product for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system. Specifically, when performing dynamic read operations...
879
5550774 Memory cache with low power consumption and method of operation  
A memory cache (46) has a plurality of tag arrays (20, 22, 24, 26), a plurality of comparators (38, 40, 42, 44), a plurality a data arrays (12, 14, 16, 18), and a plurality of sense amplifiers...
872
5636354 Data processor with serially accessed set associative memory cache interface and method  
A memory cache interface (12) serially accesses each way in an M-way set asociative memory cache (11) when it performs a read operation. The memory cache returns a data quantum and a tag...
872
7058864 Test for processor memory cache  
Systems, methods, software products test a memory cache of a processor that includes a test engine (e.g., a BISTE). High level test source code is formulated to use routines in API source code...
865
US20150121006 SPLIT WRITE OPERATION FOR RESISTIVE MEMORY CACHE  
A method of reading from and writing to a resistive memory cache includes receiving a write command and dividing the write command into multiple write sub-commands. The method also includes...
854
US20200081836 REDUCING MEMORY CACHE CONTROL COMMAND HOPS ON A FABRIC  
Systems, apparatuses, and methods for reducing memory cache control command hops through a fabric are disclosed. A system includes an interconnect fabric, a plurality of transaction processing...
852
US20180210843 REFRESH AWARE REPLACEMENT POLICY FOR VOLATILE MEMORY CACHE  
A method for replacing data on a volatile memory cache is provided. The volatile memory cache includes one or more memory banks and each of the memory banks includes a plurality of memory lines....
850
9239788 Split write operation for resistive memory cache  
A method of reading from and writing to a resistive memory cache includes receiving a write command and dividing the write command into multiple write sub-commands. The method also includes...
846
10394719 Refresh aware replacement policy for volatile memory cache  
A method for replacing data on a volatile memory cache is provided. The volatile memory cache includes one or more memory banks and each of the memory banks includes a plurality of memory lines....
846
6760809 Non-uniform memory access (NUMA) data processing system having remote memory cache incorporated within system memory  
A non-uniform memory access (NUMA) computer system and associated method of operation are disclosed. The NUMA computer system includes at least a remote node and a home node coupled to an...
845
9201795 Dynamic hierarchical memory cache awareness within a storage system  
A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations...
845
US20120297144 DYNAMIC HIERARCHICAL MEMORY CACHE AWARENESS WITHIN A STORAGE SYSTEM  
A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations...
839
9990400 Builder program code for in-memory cache  
Techniques are disclosed relating to an in-memory cache. In some embodiments, in response to determining that data for a requested entry is not present in the cache (e.g., because it has been...
838
US20030009623 Non-uniform memory access (NUMA) data processing system having remote memory cache incorporated within system memory  
A non-uniform memory access (NUMA) computer system and associated method of operation are disclosed. The NUMA computer system includes at least a remote node and a home node coupled to an...
837
5550995 Memory cache with automatic alliased entry invalidation and method of operation  
A memory cache (14) has a semi-associative cache array (50), a cache reload buffer (40), and a cache reload buffer driver (42). The memory cache writes received data to the cache reload buffer and...
834
US20180157418 SOLID STATE DRIVE (SSD) MEMORY CACHE OCCUPANCY PREDICTION  
Embodiments of the inventive concept include a solid state drive (SSD) shared array memory cache system including memory cache occupancy prediction. The system can include multiple SSD modules...
834
US20160147446 SOLID STATE DRIVE (SSD) MEMORY CACHE OCCUPANCY PREDICTION  
Embodiments of the inventive concept include a solid state drive (SSD) shared array memory cache system including memory cache occupancy prediction. The system can include multiple SSD modules...
834
US20170116125 Builder Program Code for In-Memory Cache  
Techniques are disclosed relating to an in-memory cache. In some embodiments, in response to determining that data for a requested entry is not present in the cache (e.g., because it has been...
825
US20170116135 In-Memory Cache for Web Application Data  
Techniques are disclosed relating to caching web application data. In some embodiments, a computing system maintains a multi-tenant database and an in-memory cache for the database. In some...
823
10013501 In-memory cache for web application data  
Techniques are disclosed relating to caching web application data. In some embodiments, a computing system maintains a multi-tenant database and an in-memory cache for the database. In some...
822
5499204 Memory cache with interlaced data and method of operation  
A memory cache (14) has a plurality of cache lines (50) for storing a series of contiguous memory elements. Each series of memory elements are interlaced within the corresponding cache line on a...
818
US20080301371 Memory Cache Control Arrangement and a Method of Performing a Coherency Operation Therefor  
A memory cache control arrangement for performing a coherency operation on a memory cache comprises a receive processor for receiving an address group indication for an address group comprising a...
818
10672099 Memory cache management for graphics processing  
Systems, methods, and computer readable media to manage memory cache for graphics processing are described. A processor creates a resource group for a plurality of graphics application program...
815
US20040186959 Data memory cache unit and data memory cache system  
A data memory cache unit is provided which is capable of heightening the speed of memory access. The cache unit 117 executes reading and writing of data in a 16-byte width line unit in a main...
814
US20080240061 AIRCRAFT COMMUNICATIONS SYSTEM WITH DATA MEMORY CACHE AND ASSOCIATED METHODS  
A communications system for an aircraft carrying at least some personnel having personal electronic devices (PEDs) for wireless data communications outside the aircraft includes a ground-based...
808
8504019 Aircraft communications system with data memory cache and associated methods  
A communications system for an aircraft carrying at least some personnel having personal electronic devices (PEDs) for wireless data communications outside the aircraft includes a ground-based...
808


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