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8996256 Communication system for a passenger protection system  
In each sensor unit, when a sensor control unit cannot detect current flowing to an output side, its address is set to the same address as a sensor unit of the last stage. In an ECU, if the set...
8996953 Self monitoring and self repairing ECC  
Exemplary embodiments of the present invention disclose a method and system for monitoring a first Error Correcting Code (ECC) device for failure and replacing the first ECC device with a second...
8904248 Noise rejection for built-in self-test with loopback  
A self-test loopback apparatus for an interface is disclosed. In one embodiment, a bidirectional interface of an integrated circuit includes a transmitter coupled to an external pin, a first...
8843794 Method, system and apparatus for evaluation of input/output buffer circuitry  
Techniques and mechanisms for evaluating I/O buffer circuits. In an embodiment, test rounds are performed for a device including the I/O buffer circuits, each of the test rounds comprising a...
8817635 Methods, test systems and arrangements for verifying compliance with requirement specifications  
A method for verifying compliance of a communication device with one or more requirement specifications is disclosed. The method comprises establishing a link between a test system and the...
8812918 Method and apparatus for evaluating and optimizing a signaling system  
A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive...
8782477 High-speed serial interface bridge adapter for signal integrity verification  
A loopback card includes a connector configured to connect to an IO interface and emulate a storage device interface. The connector includes a port configured to receive a set of signals from the...
8767801 Testing performance of clock and data recovery circuitry on an integrated circuit device  
The ability of clock and data recovery (“CDR”) circuitry on an integrated circuit (“IC”) to handle jitter in a serial data input signal can be tested by using transmitter circuitry on the IC to...
8756469 Method and apparatus for evaluating and optimizing a signaling system  
A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive...
8644434 Apparatus and methods for performing sequence detection  
An apparatus for performing sequence detection on a stream of incoming bits comprises a memory and circuitry coupled to the memory. The circuitry is operative, for each bit of the stream of...
8638851 Joint bandwidth detection algorithm for real-time communication  
A video coding system and method for increasing a transmitted output bit rate of a video encoding system by altering the content of the bit stream. A video encoder may receive a coding mode signal...
8619599 Packet processor verification methods and systems  
Methods and systems for implementing self-testing of packet processing devices are disclosed. For example, a packet-processing device can include a plurality of ports having a receive media access...
8607104 Memory diagnostics system and method with hardware-based read/write patterns  
A memory loopback system and method including an address/command transmit source configured to transmit a command and associated address through an address/command path. A transmit data source is...
8553565 Switch apparatus and network system  
A switch apparatus providing with a loop detection function sets a port identification to a port which activates the loop detection function, only receives the loop detection frame by a high-order...
8543873 Multi-site testing of computer memory devices and serial IO ports  
A method and apparatus for multi-site testing of computer memory devices. An embodiment of a method of testing computer memory devices includes coupling multiple memory devices, each memory device...
8533543 System for testing connections between chips  
In accordance with an aspect of the application, there is provided a system for testing, including a first chip, a second chip, and first and second connections. The first connection is configured...
8516238 Circuitry for active cable  
Circuits, methods, and apparatus that allow signals that are compliant with multiple standards to share a common connector on an electronic device. An exemplary embodiment of the present invention...
8471599 Adjustable voltage comparing circuit and adjustable voltage examining device  
In an adjustable voltage examining module, while a logic tester issues an input signal to an audio module under test, upper/low-threshold reference signals are simultaneously issued to an...
8384569 Circuit and method for generating the stochastic signal  
A stochastic signal generation circuit includes a signal output circuit and a signal processing circuit connected with the signal output circuit. The signal output circuit includes two matching...
8363706 Communication methods and apparatuses  
A system and method for communication provides an adaptation value for at least one communication parameter, the adaptation value describes a variation of the communication parameter to be enabled...
8301941 Memory controller with loopback test interface  
An apparatus may include an interconnect; at least one processor coupled to the interconnect; and at least one memory controller coupled to the interconnect. The memory controller may be...
8286039 Disabling outbound drivers for a last memory buffer on a memory channel  
Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory...
8286197 Method and system for comprehensive socket application programming interface loopback processing  
Methods and systems for comprehensive socket API loopback processing on a computing device. In an exemplary method and system, a socket API processes loopback calls without resort to a TCP/IP...
8279759 Protocol inter-worked ping mechanism  
In one embodiment, a system includes a first network device configured to communicate on a first communication layer, and a second network device configured to communicate on a second...
8266482 Operating parameter control for integrated circuit signal paths  
An integrated circuit includes a signal source and a signal destination linked by a signal path. Error correction codes (e.g. Hamming codes) are applied to the signals to be transmitted. Errors...
8250416 Redundant acknowledgment in loopback entry  
Redundant acknowledgment between agents performing a loopback test over bidirectional communications bus is described. In one example, in a processor including a communications agent coupled to a...
8234530 Serial interface device built-in self test  
A built-in self test circuit includes a pattern generator, an elastic buffer, a symbol detector, and a comparison unit. A pattern generator generates a first test pattern to test a port under test...
8214706 Method and apparatus for testing an electronic circuit integrated with a semiconductor device  
A semiconductor device including an electronic circuit, a memory, and an error detecting module. The electronic circuit is configured to receive an input signal having been generated by a test...
8199858 OOB (out of band) detection circuit and serial ATA system  
The present invention provides an OOB detection circuit capable of making accurate signal determination even in the case where a characteristic fluctuation occurs in an analog circuit, thereby...
8184542 Methods, computer programs, and systems for verifying a customer premises connection to an integrated communication system  
Verifying a customer premises connection to a communication system having a plurality of ports, each of which serves a corresponding customer premises. A known quantity of data is transmitted to...
8169924 Optimal bridging over MPLS/IP through alignment of multicast and unicast paths  
A provider edge (PE) node of a network operates to send a trace path message over the network to a receiver PE node, the trace path message recording a list of intermediate nodes of a unicast path...
8135999 Disabling outbound drivers for a last memory buffer on a memory channel  
Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory...
8135872 USB controller and a testing method of the USB controller  
A USB controller and a testing method of the USB controller are disclosed. The USB controller includes a sequence control unit for outputting a transmitting enable signal and a receiving enable...
8122305 Standalone data storage device electromagnetic interference test setup and procedure  
A system for operating a data storage device having a plurality of sectors and at least one port, each port having a transmitter and a receiver, is disclosed. In one embodiment the system includes...
8098766 Transceiver with switch circuit for routing data from receiver to transmitter  
A transceiver includes a receiver unit including a clock and data recovery unit. The transceiver includes a transmitter unit and a digital core coupled to the receiver unit and the transmitter...
8091001 FPGA programming structure for ATPG test coverage  
Testing of combinatorial logic in a programmable device is provided by routing input and/or output test values as signals from and back to dedicated logic through programming circuitry in...
8086915 Memory controller with loopback test interface  
In one embodiment, an apparatus comprises an interconnect; at least one processor coupled to the interconnect; and at least one memory controller coupled to the interconnect. The memory controller...
8074129 Memory apparatus and method and reduced pin count apparatus and method  
A memory apparatus is disclosed, comprising a memory device under test, a reduced-pin-count device and a built-in self test device. The reduced-pin-count device is used to find a faulty cell...
8069378 Method and apparatus for evaluating and optimizing a signaling system  
A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive...
8051350 Serial interface device built-in self test  
A built-in self test circuit includes a pattern generator, an elastic buffer, a symbol detector, and a comparison unit. A pattern generator generates a first test pattern to test a port under test...
8037356 System and method for validating channel transmission  
A system for validating communications between a plurality of processors is disclosed. The system includes a plurality of loop back paths, and each of the loop back paths is coupled to a...
8028210 Semiconductor device  
An object of the present invention is to provide a semiconductor device capable of recognizing circuit malfunction in an actual operation and of specifying a point of the circuit malfunction, and...
8015458 Fault isolation in interconnect systems  
A loopback connector for a system can include a connector arrangement connectable to connector of a system component and/or a cable. The loopback connector can include loopback logic for...
8001453 CAN system  
Provided is a CAN system that can generate an error signal without requiring hardware for generating an error signal to be connected to a bus. A protocol processing part within a CAN controller...
7992058 Method and apparatus for loopback self testing  
A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The endpoint device loops back the...
7984343 Inter-device connection test circuit generating method, generation apparatus, and its storage medium  
A test circuit can use a simple test pattern data without customization for each substrate and considerably reduce a test preparation process. A connection test circuit is generated by receiving...
7969895 Switch apparatus and network system  
A switch apparatus providing with a loop detection function sets a port identification to a port which activates the loop detection function, only receives the loop detection frame by a high-order...
7971110 System and method for testing a serial attached small computer system interface  
In a system and method for testing a serial attached small computer systems (SAS) interface of a SAS controller, the SAS controller connects to a loopback dongle via the SAS interface. The SAS...
7962808 Method and system for testing the compliance of PCIE expansion systems  
The present application describes a method and system for testing the compliance of a PCIE expansion system to verify that data signals transmitted through multiple data lanes in the expansion...
7958438 CAN system  
Provided is a CAN system that can generate an error signal without requiring hardware for generating an error signal to be connected to a bus. A protocol processing part within a CAN controller...

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