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9032163 Data access management  
Apparatus, systems, and methods may operate to assert a first semi-exclusive write lock with respect to a storage medium area by storing lock information when assertion of another semi-exclusive...
9026747 Memory device with a logical-to-physical bank mapping cache  
A memory device with a logical-to-physical (LTP) bank mapping cache that supports multiple read and write accesses is described herein. The memory device allows for at least one read operation and...
9021214 Storage system and method for controlling memory in storage system  
According to a storage system of a prior art adopting a cluster structure, various types of large-capacity memories were arranged to enhance the access performance, so that the system required a...
9015425 Apparatus, systems, and methods for nameless writes  
An apparatus, system, and method are disclosed for implementing nameless storage operations. Storage clients can access and allocate portions of an address space of a non-volatile storage device...
9009385 Co-residency detection in a cloud-based system  
At least one virtual machine implemented on a given physical machine in an information processing system is able to detect the presence of one or more other virtual machines that are also...
9009386 Systems and methods for managing read-only memory  
A system includes a memory device including a real memory and a tracking mechanism configured to track relationships between multiple virtual memory addresses and real memory. The system further...
9009444 System and method for LUN control management  
A method, computer program product, and computing system for receiving a reservation for a LUN from Host A, wherein the LUN is defined within a data array. A lock for the LUN is defined as Host A....
9009420 Structure for performing cacheline polling utilizing a store and reserve instruction  
A design structure for performing cacheline polling utilizing a store and reserve instruction are disclosed. In accordance with one embodiment of the present invention, a first process initially...
9003161 Systems and methods for managing read-only memory  
A first virtual memory address is mapped to a real memory in a memory device, and a second virtual memory address is mapped to the real memory. Here, the first virtual memory address is authorized...
9003146 Managing memory of a computer  
A method for managing data in a memory of a computer. The method includes the steps of: prohibiting a specified memory area in a memory from being accessed temporarily or intermittently; and...
9003121 Multi-ported memory with multiple access support  
A multi-ported memory that supports multiple read and write accesses is described herein. The multi-ported memory may include a number of read/write ports that is greater than the number of...
8972670 Use of test protection instruction in computing environments that support pageable guests  
Management of storage used by pageable guests of a computing environment is facilitated. A query instruction is provided that details information regarding the storage location indicated in the...
8972666 Mitigating conflicts for shared cache lines  
A computer program product for mitigating conflicts for shared cache lines between an owning core currently owning a cache line and a requestor core. The computer program product includes a...
8973004 Transactional locking with read-write locks in transactional memory systems  
A system and method for transactional memory using read-write locks is disclosed. Each of a plurality of shared memory areas is associated with a respective read-write lock, which includes a...
8971144 Hardware write-protection  
A system for providing write-protection functionality to a memory device includes: a memory device including configurable registers controlling write and erase operations in the memory device; a...
8972995 Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads  
A method, apparatus, and system in which an integrated circuit comprises an initiator Intellectual Property (IP) core, a target IP core, an interconnect, and a tag and thread logic. The target IP...
8966175 Automated storage provisioning within a clustered computing environment  
The present invention provides an approach for automatic storage planning and provisioning within a clustered computing environment (e.g., a cloud computing environment). The present invention...
8959288 Identifying invalid cache data  
Cache lines are identified that provide incorrect data for read requests. The cache lines are invalidated before the incorrect data causes processing failure conditions. The cache lines providing...
8949567 Cross-point resistive-based memory architecture  
A plurality of addressable memory tiles each comprise one or more cross-point arrays. Each array comprises a plurality of non-volatile resistance-change memory cells. A controller is configured to...
8949539 Conditional load and store in a shared memory  
A method, system and computer program product for implementing load-reserve and store-conditional instructions in a multi-processor computing system. The computing system includes a multitude of...
8949551 Memory protection unit (MPU) having a shared portion and method of operation  
In a disclosed embodiment, a data processing system comprises a memory protection unit (MPU); and a plurality of region descriptors associated with the MPU. Each region descriptor is associated...
8938589 Interface methods and apparatus for memory devices using arbitration  
A disclosed example apparatus includes an interface (702, 726) to receive a request to access a memory (602a) of a memory module (600) and a data store status monitor (730) to determine a status...
8935775 Method and apparatus for dishonest hardware policies  
A system implements dishonest policies for managing unauthorized access requests. The system includes memory management hardware to store a set of dishonest policy bits, each dishonest policy bit...
8930627 Mitigating conflicts for shared cache lines  
A computer program product for mitigating conflicts for shared cache lines between an owning core currently owning a cache line and a requestor core. The computer program product includes a...
8930547 Techniques for achieving storage and network isolation in a cloud storage environment  
Techniques for achieving storage and network isolation in a cloud environment are presented. A single Internet Protocol (IP) address is presented to multiple storage tenants that use storage in a...
8930628 Managing in-line store throughput reduction  
Various embodiments of the present invention manage a hierarchical store-through memory cache structure. A store request queue is associated with a processing core in multiple processing cores. At...
8930657 Method and apparatus for realtime detection of heap memory corruption by buffer overruns  
One embodiment of the present invention relates to a heap overflow detection system that includes an arithmetic logic unit, a datapath, and address violation detection logic. The arithmetic logic...
8924596 System and method for dividing and synchronizing a processing task across multiple processing elements/processors in hardware  
A shared counter resource, such as a register, is disclosed in the hardware, where the register representing how much free space there is in the command queue is accessible to one or more...
8924656 Storage environment with symmetric frontend and asymmetric backend  
One or more techniques and/or systems are provided for configuring a storage environment. In particular, the storage environment may be configured with a symmetric frontend and an asymmetric...
8924674 Permissions of objects in hosted storage  
A data object is stored in a hosted storage system and includes an access control list specifying access permissions for data object stored in the hosted storage system. The hosted storage system...
8914588 System and method for supporting a self-tuning locking mechanism in a transactional middleware machine environment  
A lock mechanism can be supported in a transactional middleware system to protect transaction data in a shared memory when there are concurrent transactions. The transactional middleware machine...
8910310 Embedded flash memory card and electronic device using the same, and engineering board for embedded flash memory card  
An embedded MultiMediaCard (eMMC), an electronic device equipped with an eMMC and an eMMC engineering board are disclosed. The eMMC includes an eMMC substrate plate, a plurality of solder balls...
8904119 Method and structures for performing a migration of a logical volume with a serial attached SCSI expander  
Methods and structure for migrating a logical volume with a Serial Attached SCSI (SAS) expander are provided. The expander comprises a plurality of physical links with associated transceivers...
8898397 Memory and process sharing across multiple chipsets via input/output with virtualization  
Embodiments of the present invention provide an approach for memory and process sharing via input/output (I/O) with virtualization. Specifically, embodiments of the present invention provide a...
8886904 Managing a solid-state storage device  
A method, comprising: during a normal operating mode of a first solid-state storage device, reserving a portion of an available physical storage space of the first solid-state storage device,...
8874854 Method for selectively enabling and disabling read caching in a storage subsystem  
A mechanism for selectively disabling and enabling read caching based on past performance of the cache and current read/write requests. The system improves overall performance by using an...
8868843 Hardware filter for tracking block presence in large caches  
A system and method for efficiently determining whether a requested memory location is in a large row-based memory of a computing system. A computing system includes a processing unit that...
8868849 Coupled lock allocation and lookup for shared data synchronization in symmetric multithreading environments  
In a shared memory process different threads may attempt to access a shared data variable in a shared memory. Locks are provided to synchronize access to shared data variables. Each lock is...
8868845 Dynamic single/multi-reader, single-writer spinlocks  
Example embodiments of the present invention include a method, system and computer program product for managing spinlocks in a multi-core computer system. The method comprises providing a spinlock...
8862831 Method and apparatus to facilitate shared pointers in a heterogeneous platform  
A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to,...
8862752 System, method, and computer program product for conditionally preventing the transfer of data based on a location thereof  
A system, method, and computer program product are provided for conditionally preventing the transfer of data. In use, a request to transfer data is identified. In addition, a location of the data...
8856460 System and method for zero buffer copying in a middleware environment  
Systems and methods are provided for zero buffer copying, where such a system includes one or more high performance computing systems, each including one or more processors and a high performance...
8856461 Request controlling  
This invention provides a request controlling apparatus, processor and method. The request controlling apparatus is connected to a request storage unit and includes: a queue unit storing flag...
8856478 Arithmetic processing unit, information processing device, and cache memory control method  
A processor holds, in a plurality of respective cache lines, part of data held in a main memory unit. The processor also holds, in the plurality of respective cache lines, a tag address used to...
8856588 Information processing apparatus, control method, and computer-readable recording medium  
At least one node of a plurality of nodes in an information processing apparatus executes the following processing for data included in a memory of one node or other nodes and stored in a shared...
8850131 Memory request scheduling based on thread criticality  
A method includes scheduling a memory request requested by a thread executing on a processing system. The scheduling is based on at least one of a number of critical sections being executed on the...
8832388 Managing shared memory used by compute nodes  
A technology can be provided for managing shared memory used by a plurality of compute nodes. An example system can include a shared globally addressable memory to enable access to shared data by...
8825964 Adaptive integration of cloud data services with a data storage system  
Described are techniques for performing processing in a data storage system. A client application executing on a host is identified as a candidate for migration to the data storage system. First...
8819352 Hybrid Transactional Memory (HybridTM)  
Embodiments related to a hardware transactional memory (HTM). An aspect includes setting a mode register of a processor core of a computer to indicate a HTM mode. Another aspect includes executing...
8819351 Management of host passthrough and session commands using resource groups  
For at least one storage resource object associated with at least one of the plurality of resource groups by a resource group attribute, at least one policy is defined for limiting host requests...