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9032174 Information processing apparatus for restricting access to memory area of first program from second program  
A processor determines whether a first program is under execution when a second program is executed, and changes a setting of a memory management unit based on access prohibition information so...
8997099 Virtualization event processing in a layered virtualization architecture  
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and...
8943251 System and method for processing device with differentiated execution mode  
In accordance with an embodiment of the present invention, a method of operating a system includes operating in a first operating mode to not permit access to an address range, receiving a...
8938737 Delivering interrupts directly to a virtual processor  
Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt...
8924615 Communication of message signalled interrupts  
A global interrupt number space 38 is provided for use in message signalled interrupts. Interrupt destinations 10, 12, 14, 16 are provided with pending interrupt caches 24 with either backing...
8914566 Managing interrupts  
A process for managing interrupts, which may be performed using electronic circuitry, includes: receiving interrupts bound for a processing device, where the interrupts are received from hardware...
8856416 Method and apparatus for processing latency sensitive electronic data with interrupt moderation  
Numerous embodiments of a method and apparatus for processing latency sensitive electronic data with interrupt moderation are disclosed.
8838912 Interruptible write block  
A disclosed embodiment is an interruptible write block comprising a primary register having an input coupled to an input of the interruptible write block, a secondary register having an input...
8832700 Subscriber-based ticking model for platforms  
A central manager receives tick subscription requests from subscribers, including a requested period and an allowable variance. The manager selects a group period for a group of requests, based on...
8813077 Virtualization event processing in a layered virtualization architecture  
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and...
8793423 Servicing interrupt requests in a computer system  
Methods and apparatuses are provided for servicing an interrupt in a computer system. The method includes a device driver receiving an interrupt request. The device driver is responsive to the...
8751717 Interrupt control apparatus and interrupt control method  
An interrupt control apparatus and interrupt control method reduce situations in which the output of interrupt information is suspended and thus reduce stress caused in a user, without missing the...
8732371 Managing overhead associated with service requests via software generated interrupts  
An application process operates at a privilege level lower than that of the kernel code of the operating system in which the process executes. When the application process requires performance of...
8612661 Interrupt-notification control unit, semiconductor integrated circuit and methods therefor  
An interrupt-notification control unit that receives interrupt requests from a plurality of interrupt dispatchers and sends the received interrupt requests together to a processor, where the...
8612659 Hardware interrupt arbitration in virtualized computer systems  
Hardware interrupts are routed to one of multiple processors of a virtualized computer system based on priority values assigned to the codes being executed by the processors. Each processor...
8504752 Virtual machine control device, virtual machine control program, and virtual machine control circuit for managing interrupts of plural virtual machines  
The interrupt level storing unit (16) stores one or more interrupt levels indicating the priority of a generated interrupt and stores the interrupt level having the highest priority among the...
8495267 Managing shared computer memory using multiple interrupts  
Systems and methods to manage memory are provided. A particular method may include initiating a memory compression operation. The method may further include initiating a first interrupt configured...
8484389 AV renderer peripheral with dual inerrupt lines for staggered interrupts  
An audio-video (AV) playback chain and rendering peripheral device 300 for generating two or more interrupts 306, 308 with a programmable delay 304 between them. Such are configured to prevent two...
8473648 System and method of I/O path virtualization between a raid controller and an environment service module in a storage area network  
A system and method of I/O path virtualization between a RAID controller and an environment service module (ESM) in a storage area network (SAN) is disclosed. In one embodiment, a type of I/O...
8473662 Interrupt-handling-mode determining method of embedded operating system kernel  
Provided is a method capable of providing an improved response property appropriate for the characteristics of a system by automatically choosing an interrupt handling mode used for each device....
8433857 Interruptible write block and method for using same  
A disclosed embodiment is an interruptible write block comprising a primary register having an input coupled to an input of the interruptible write block, a secondary register having an input...
8424016 Techniques to manage critical region interrupts  
Briefly, techniques to manage interrupts and swaps of threads operating in critical region. In an embodiment, a thread is to be interrupted during a first critical region with an interrupt...
8405844 Image forming device  
An image forming device includes a processor configured to process image data, an image forming unit configured to perform image formation based on the image data processed by the processor, a...
8407387 Multi-thread processor and the multi-thread processor's interrupt processing method having interrupt processing that is processed by an associated hardware thread  
A first exemplary aspect of an embodiment of the present invention is a multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow,...
8375155 Managing concurrent serialized interrupt broadcast commands in a multi-node, symmetric multiprocessing computer  
Managing concurrent serialized interrupt broadcast commands in a multi-node, symmetric multiprocessing computer including receiving, by a communications adapter in a compute node, a plurality of...
8356131 System and method for controlling interruption of a process in electronic equipment based on priority of the process, and program  
System, method, and program to determine whether to interrupt a process, e.g., a write function, to carry out another process, e.g., a high priority read function, in a device that uses memory...
8352804 Systems and methods for secure interrupt handling  
The invention relates to systems for secure interrupt handling, a method for verifying a priority of a winning service request node and a method and an apparatus for verifying integrity of service...
8286162 Delivering interrupts directly to a virtual processor  
Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt...
8271978 Virtualization event processing in a layered virtualization architecture  
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and...
8261284 Fast context switching using virtual cpus  
Various technologies and techniques are disclosed that provide fast context switching. One embodiment provides a method for a context switch comprising preloading a host virtual machine context in...
8250272 Interrupt control apparatus and image forming apparatus  
An interrupt control apparatus includes: an interrupt request supply unit that supplies interrupt request information; a processing unit that performs interrupt processing based on the interrupt...
8244947 Methods and apparatus for resource sharing in a programmable interrupt controller  
Efficient techniques are described for identifying active interrupt requests to improve performance and reduce power requirements in a processor system. A method to identify active sampled...
8239600 Data processing system with selectable interrupt control  
The present invention provides a data processing system having excellent immediacy of interrupting process. Different interrupt request signals are supplied from a circuit module which can be...
8219725 Cache optimized balanced handling of initiatives in a non-uniform multiprocessor computing system  
A balancing process between I/O processor groups of a non-uniform multiprocessor system enables spreading of I/O workload across multiple I/O processor groups on a group base as soon as the I/O...
8200876 Terminal apparatus and method for controlling processing of an interrupt event  
In a terminal apparatus, the central control section 1-10 judges whether or not a function accompanied with an audio output is in operation when a change in a folding opening/closing state of the...
8156273 Method and system for controlling transmission and execution of commands in an integrated circuit device  
A method and system for controlling transmission and execution of commands in an integrated circuit (IC) device provide transmission of commands and acknowledgements in an order of their...
8151028 Information processing apparatus and control method thereof  
An information processing apparatus connected with an IO device, having a processing unit, a channel device transferring data between the information processing apparatus and the IO device having...
8139247 Information processing apparatus, system, and method that provide job reservation with a time-out feature  
In an image processing apparatus which allows a plurality of users to reserve jobs, the convenience of each user is further improved while ensuring security of a job to be output by each user. In...
8135894 Methods and systems for reducing interrupt latency by using a dedicated bit  
A system and a method for reducing interrupt latency is described. The system includes a first interrupt source configured to generate a first interrupt, a second interrupt source configured to...
8127064 Method of managing the software architecture of a radio communication circuit, corresponding application, computer program product and circuit  
A method of managing the software architecture of a radio communication circuit is provided. The software architecture includes a radio communication software stack and at least one client...
8103815 Lazy handling of end of interrupt messages in a virtualized environment  
Techniques enable reducing a number of intercepts performed by a hypervisor by reducing a number of End Of Interrupt (EOI) messages sent from a virtual central processing unit (CPU) to a virtual...
8065460 Method of determining request transmission priority subject to request content and transmitting request subject to such request transmission priority in application of fieldbus communication framework  
A method of determining request transmission priority subject to request content and transmitting request subject to such request transmission priority in application of Fieldbus communication...
8037227 System and method for virtualizing processor and interrupt priorities  
Dispatching of interrupts to a processor is conditionally suppressed, that is, only if an old priority value and a new priority value are either both less than or both greater than a maximum...
8032681 Processor selection for an interrupt based on willingness to accept the interrupt and on priority  
In some embodiments, an apparatus includes processors, signal storage circuitry, and processor selection logic. The signal storage circuitry is to hold willingness indication signals each...
8032680 Lazy handling of end of interrupt messages in a virtualized environment  
Techniques enable reducing a number of intercepts performed by a hypervisor by reducing a number of End Of Interrupt (EOI) messages sent from a virtual central processing unit (CPU) to a virtual...
8024504 Processor interrupt determination  
Processor interrupt determination procedures are described. In an implementation, one or more computer-readable media comprise instructions that are executable by a computer to determine, based on...
7996595 Interrupt arbitration for multiprocessors  
Technologies are generally described herein for handling interrupts within a multiprocessor computing system. Upon receiving an interrupt at the multiprocessor computing system, a priority level...
7979603 Storage system and method for controlling activation of command  
A storage system including a queue corresponding to each priority level of command and an activation order control part. A command received from a host is accumulated in the queue corresponding to...
7979861 Multi-processor system and program for causing computer to execute controlling method of multi-processor system  
A multi-processor system with a plurality of unit processors includes: a request accepting section for accepting a first request and a second request, wherein the first request is a request to...
7950013 System for monitoring time proportion for interrupt or task processing with restriction placed in subsequent monitoring time period when allowable time proportion is exceed  
A storage system has a single processor that operates in a multitasking operating system environment. An operation time manager adjusts the balance between processing time proportions for...

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