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9043519 |
System and method to process event reporting in an adapter
Method and system for an adapter is provided. The adapter includes a plurality of function hierarchies, with each function hierarchy including a plurality of functions and each function being... |
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9021172 |
Data processing apparatus and method and method for generating performance monitoring interrupt signal based on first event counter and second event counter
A data processing apparatus has performance monitoring circuitry for generating performance monitoring data. The performance monitoring circuitry includes a first event counter for counting... |
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9015374 |
Virtual interrupt filter
A system for processing interrupts in a virtualized computing environment includes a virtual interrupt controller to provide virtual interrupts from peripherals to virtual machines. The system... |
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8997099 |
Virtualization event processing in a layered virtualization architecture
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and... |
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8984200 |
Task scheduling in big and little cores
One aspect provides a method comprising: ascertaining an interrupt at an information handling device having two or more cores of different size; determining if the interrupt should be directed to... |
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8966149 |
Emulation of an input/output advanced programmable interrupt controller
Embodiments of systems, apparatuses, and methods for emulating an input/output Advanced Programmable Interrupt Controller are disclosed. In one embodiment, an apparatus includes a first interrupt... |
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8949833 |
Method and system for polling network controllers to a dedicated tasks including disabling of interrupts to prevent context switching
Improving the performance of multitasking processors are provided. For example, a subset of M processors within a Symmetric Multi-Processing System (SMP) with N processors is dedicated for a... |
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8949498 |
Interrupt handling in a virtual machine environment
A method for computing includes running a plurality of virtual machines on a computer having one or more cores and a memory. Upon occurrence of an event pertaining to a given virtual machine... |
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8938737 |
Delivering interrupts directly to a virtual processor
Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt... |
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8914566 |
Managing interrupts
A process for managing interrupts, which may be performed using electronic circuitry, includes: receiving interrupts bound for a processing device, where the interrupts are received from hardware... |
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8898246 |
Communication among partitioned devices
A computing device having partitions, and a method of communicating between partitions, are disclosed wherein at least one partition comprises: at least one register substantially always... |
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8892803 |
Interrupt on/off management apparatus and method for multi-core processor
Provided are an interrupt on/off management apparatus and method for a multi-core processor having a plurality of central processing unit (CPU) cores. The interrupt on/off management apparatus... |
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8886862 |
Virtualization of interrupts
A method for computing includes running a plurality of virtual machines on a computer having one or more cores and a memory. Respective interrupt addresses in the memory are assigned to the... |
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8868810 |
Managing over-initiative thin interrupts
A method, system, and computer program product identify extraneous input/output interrupts for a queued input/output device architecture. At least one interrupt is determined to have been... |
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8861434 |
Method and system for improved multi-cell support on a single modem board
A system for providing multi-cell support within a single SMP partition in a telecommunications network is disclosed. The typically includes a modem board and a multi-core processor having a... |
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8832688 |
Kernel bus system with a hyberbus and method therefor
Some embodiments concern a kernel bus system for building at least one virtual machine monitor. The kernel bus system can include: (a) a hyperbus; (b) user space components; (c) guest space... |
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8813077 |
Virtualization event processing in a layered virtualization architecture
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and... |
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8788735 |
Interrupt control apparatus, interrupt control system, interrupt control method, and interrupt control program
An interrupt control unit provides controls on an interrupt from an accelerator to a CPU based on a packet transmitted to or received from a controlled object. The interrupt control unit includes:... |
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8787255 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Method and system for improved multi-cell support on a single modem board
A system for providing multi-cell support within a single SMP partition in a telecommunications network is disclosed. The typically includes a modem board and a multi-core processor having a... |
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8762615 |
Dequeue operation using mask vector to manage input/output interruptions
A command is issued to reset one or more pending interrupt indicators and arbitrate for ownership of the interrupt. Responsive to a processor receiving the command, a check is made of a selected... |
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8661177 |
Method and apparatus for controlling system interrupts
A method and apparatus are provided for controlling system management interrupts is disclosed. An interrupt filter comprises a memory, a comparator and a logic circuit. The memory is adapted to... |
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8650430 |
Enabling a peripheral device to transmit a request for interrupt processing to a host when no clock signal is output from the host device
In a communication system in which data is transmitted and received in synchronization with a clock signal, a peripheral device cannot transfer data to a host device when the host device stops... |
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8612661 |
Interrupt-notification control unit, semiconductor integrated circuit and methods therefor
An interrupt-notification control unit that receives interrupt requests from a plurality of interrupt dispatchers and sends the received interrupt requests together to a processor, where the... |
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8612660 |
Interrupt latency measurement
A system and method for setting a first indicator indicating that interrupts are virtually locked, receiving a first interrupt at a processor of a computing device, setting a second indicator... |
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8612658 |
Interrupt reduction
An interrupt reducing device driver module reduces the rate at which interrupts from a peripheral burden a processor. The interrupt reducing device driver determines when data is associated with... |
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8612659 |
Hardware interrupt arbitration in virtualized computer systems
Hardware interrupts are routed to one of multiple processors of a virtualized computer system based on priority values assigned to the codes being executed by the processors. Each processor... |
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8612986 |
Computer program product for scheduling ready threads in a multiprocessor computer based on an interrupt mask flag value associated with a thread and a current processor priority register value
A computer program product for scheduling threads in a multiprocessor computer comprises computer program instructions configured to select a thread in a ready queue to be dispatched to a... |
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8589612 |
Computer system including an interrupt controller
A computer system which shortens standby time of CPUs and improves CPU processing efficiency of a performance mode upon switching from the performance mode (parallel operation) to a safety mode... |
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8566493 |
Interrupt controller and methods of operation
Methods of operation and interrupt controllers for generating interrupt signals to a unit, which could enter an active mode and a non-active mode, are disclosed. The interrupt controllers have... |
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8549201 |
Interrupt blocker
A method comprises maintaining, in a first electronic device, a list of one or more electronic devices associated with a user, receiving, in the first electronic device, a first command, in... |
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8539489 |
System for dedicating a number of processors to a network polling task and disabling interrupts of the dedicated processors
Improving the performance of multitasking processors are provided. For example, a subset of M processors within a Symmetric Multi-Processing System (SMP) with N processors is dedicated for a... |
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8521912 |
Method and system for direct device access
Methods and systems for direct device access are disclosed. Aspects of one method may include a plurality of GOSs directly accessing a first network interface device, where the first network... |
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8504753 |
Suspendable interrupts for processor idle management
Suspendable interrupts are described that allow a processor to remain in an idle state for a longer period of time. Each suspendable interrupt defines a maximum delay value that specifies the... |
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8504750 |
System and method to process event reporting in an adapter
Method and system for an adapter is provided. The adapter includes a plurality of function hierarchies, with each function hierarchy including a plural functions and each function being associated... |
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8504752 |
Virtual machine control device, virtual machine control program, and virtual machine control circuit for managing interrupts of plural virtual machines
The interrupt level storing unit (16) stores one or more interrupt levels indicating the priority of a generated interrupt and stores the interrupt level having the highest priority among the... |
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8499111 |
Information processing apparatus and clock signal controlling method controlling whether clock signal provided to interrupt signal controlling device
An information processing apparatus includes an interrupting signal control device including a mask controller, the mask controller controlling whether or not to mask at least one interrupting... |
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8495267 |
Managing shared computer memory using multiple interrupts
Systems and methods to manage memory are provided. A particular method may include initiating a memory compression operation. The method may further include initiating a first interrupt configured... |
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8484389 |
AV renderer peripheral with dual inerrupt lines for staggered interrupts
An audio-video (AV) playback chain and rendering peripheral device 300 for generating two or more interrupts 306, 308 with a programmable delay 304 between them. Such are configured to prevent two... |
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8478924 |
Interrupt coalescing for outstanding input/output completions
In a computer system, a method of controlling coalescence of interrupts includes dynamically basing a current level of interrupt coalescing upon a determination of outstanding input/output (I/O)... |
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8478922 |
Controlling a rate at which adapter interruption requests are processed
The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on... |
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8473662 |
Interrupt-handling-mode determining method of embedded operating system kernel
Provided is a method capable of providing an improved response property appropriate for the characteristics of a system by automatically choosing an interrupt handling mode used for each device.... |
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8458386 |
Atomic interrupt masking in an interrupt controller to prevent delivery of same interrupt vector for consecutive interrupt acknowledgements
In one embodiment, an interrupt controller may implement an interrupt distribution scheme for distributing interrupts among multiple processors. The scheme may take into account various processor... |
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8448239 |
Secure controller for block oriented storage
A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security... |
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8443423 |
Secure information processing
Apparatus, systems, and methods may operate to receive from a requesting device, at a memory device, a request to access a memory domain associated with the memory device, and to deny, by the... |
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8424016 |
Techniques to manage critical region interrupts
Briefly, techniques to manage interrupts and swaps of threads operating in critical region. In an embodiment, a thread is to be interrupted during a first critical region with an interrupt... |
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8392635 |
Selectively enabling a host transfer interrupt
Embodiments of the invention are directed to systems and methods for reducing the number of interrupts on a controller for a non-volatile storage device to improve data transfer performance of the... |
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8392918 |
Interrupt processing on virtualized platform during periods which virtual machines are enabled to get interrupts according to scheduling policy
A technique to process interrupts on a virtualized platform. A plurality of virtual machines (VMs) runs on the virtualized platform having at least a processor. The VMs include a power VM. A VM... |
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8386683 |
Information processing apparatus, interrupt control device and interrupt control method
An information processing device in which interrupts are generated when some events are occurred. The information processing device includes: an interrupt generating unit to generate an interrupt;... |
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8386666 |
System and method for peripheral device communications
A method for operating a host device includes comparing a predetermined response of a peripheral device to a response token received from the peripheral device. The predetermined response and the... |
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8380908 |
Emulation of an input/output advanced programmable interrupt controller
Embodiments of systems, apparatuses, and methods for emulating an input/output Advanced Programmable Interrupt Controller are disclosed. In one embodiment, an apparatus includes a first interrupt... |