Match
|
Document |
Document Title |
|
9043192 |
Modeling gate resistance of a multi-fin multi-gate field effect transistor
The embodiments relate to modeling resistance in a multi-fin multi-gate field effect transistor (MUGFET). In these embodiments, a design for a multi-fin MUGFET comprises a gate structure with a... |
|
9037447 |
Systems and methods for phase predictive impedance loss model calibration and compensation
The systems and methods of the present disclosure calibrate impedance loss model parameters associated with an electrosurgical system having no external cabling or having external cabling with a... |
|
9037441 |
Macro model of operational amplifier and circuit design simulator using the same
The present invention aims to simulate a response more similar to a actual machine while inhibiting load increase in analog operation. Program configuration of the present invention is a component... |
|
9037446 |
Electrical-thermal co-simulation with joule heating and convection effects for 3D systems
In a method for simulating temperature and electrical characteristics within an circuit, a temperature of at least one volume within the circuit as a function of a resistance within the at least... |
|
9031825 |
Statistical circuit simulation
Method and system are disclosed for statistical circuit simulation. In one embodiment, a computer implemented method for statistical circuit simulation includes providing descriptions of a circuit... |
|
9026963 |
System and method for fault sensitivity analysis of mixed-signal integrated circuit designs
An apparatus and method for conducting fault sensitivity analysis of the analog portions of a mixed signal circuit design includes simulating the fault free circuit design, inserting a fault into... |
|
9026975 |
Semiconductor integrated circuit, method of designing the same, and method of fabricating the same
A semiconductor integrated circuit designing method capable of minimizing a parasitic capacitance generated by an overhead in conductive lines, especially a gate line, a semiconductor integrated... |
|
9020797 |
Integrated circuit simulation using analog power domain in analog block mixed signal
A method is provided that comprises a circuit design that includes multiple design blocks; a power intent specification file that defines a power domain within the circuit design and that... |
|
9020796 |
Model based verification using intelligent connectors
The described embodiments concern verifying operation of a device, where the device may have one or more inputs and/or one or more outputs. At least one input and/or output is associated with an... |
|
9015643 |
System, method, and computer program product for applying a callback function to data values
A system, method, and computer program product are provided for applying a callback function to data values. In use, a plurality of data values and a callback function are identified.... |
|
9015023 |
Device specific configuration of operating voltage
A method and circuit for device specific configuration of an operating voltage is provided. A circuit design is analyzed to determine a maximum gate-level delay for the circuit design. A minimum... |
|
9015016 |
System and method for three-dimensional schematic capture and result visualization of multi-physics system models
A 3-D multi-physics design environment (“3-D design environment”) for designing and simulating multi-physics devices such as MEMS devices is discussed. The 3-D design environment is... |
|
9015024 |
Enabling reuse of unit-specific simulation irritation in multiple environments
In the verification of an electronic design such as a microprocessor, a set of generic transaction types is applied to a unit in a unit simulation environment and then the same set of generic... |
|
9015685 |
Code analysis for simulation efficiency improvement
A method, computer program product, and computer system for analyzing code to improve efficiency of simulating a hardware system. A computer identifies one or more functions calling an application... |
|
9009636 |
Analog circuit simulator and analog circuit verification method
An analog circuit simulator includes a processor that is configured to search design data for analog circuits and an analog node connecting the analog circuits; collect variable information that... |
|
9002692 |
Electronic circuit simulation method with adaptive iteration
In accordance with an exemplary simulation technique, an improved selective application of Newton-Raphson iterations can improve accuracy while ensuring good performance. In this method,... |
|
8997034 |
Emulation-based functional qualification
Techniques for emulation-based functional qualification are disclosed that use an emulation platform to replace simulation in mutation-based analysis. A method for functional qualification of an... |
|
8990060 |
Configurable modular card for use in a simulator
The present disclosure relates to a configurable modular card. The card comprises a board, at least one processor and at least one memory on the board, a configurable input/output unit comprising... |
|
8990062 |
Method and program for estimating operation of program
The present invention is achieved as software which operates on a computer system and which performs calculation by receiving various data as inputs, and which outputs values. The present... |
|
8983632 |
Function block execution framework
A system having a function block execution framework. Function blocks may be for use in a control system design. These blocks may be selected from a library of a function block engine. Selected... |
|
8984468 |
Method to adaptively calculate resistor mesh in IC designs
Using an adaptive square mesh for parasitic extraction, small squares of a predetermined minimum size will be placed where accuracy in the parasitic calculations is most critical—around edges,... |
|
8977996 |
Method, design apparatus, and program product for incremental design space exploration
A design apparatus generates an optimal design condition by design space exploration. The apparatus including a source code parsing (301) which parses source code and generates a parse tree, a... |
|
8972673 |
Power management of memory circuits by virtual memory simulation
An apparatus and method are provided for communicating with a plurality of physical memory circuits. In use, at least one virtual memory circuit is simulated where at least one aspect (e.g.... |
|
8972924 |
Method for changing string arrangement, recording medium for string arrangement changing program, and information processor
A method for changing, by using a computer, an arrangement of strings that are arranged along an inner periphery of a graphic and partially overlap one another is offered. The computer arranges... |
|
8972225 |
Method and system for constructing optimized network simulation environment
A method of constructing an optimized network simulation environment according to the present invention includes the steps of identifying communication equipment models for relaying a message... |
|
8972913 |
Concurrent multiparameter simulation system
A system and a method are disclosed for concurrently simulating multiple parameters of a design of an electrical circuit. A first simulation time and a first set of environmental parameters is... |
|
8966428 |
Fixed-outline floorplanning approach for mixed-size modules
A fixed-outline floorplanning approach for mixed-size modules is disclosed. Firstly, evenly distribute mixed-size circuit modules to whole chip area based on different requirements such as... |
|
8959009 |
Modeling dielectric coating of conductor
A method for modeling a conductor in a substrate and a dielectric coating formed between the conductor and the substrate includes meshing a surface of the conductor into multiple conductor cells,... |
|
8959008 |
Method for dynamically switching analyses and for dynamically switching models in circuit simulators
Performing a transient analysis with a compact FET model that is predominantly intended for DC analysis, such as an IDDQ leakage model, to enable toggling logic states in sequential logic circuits... |
|
8954908 |
Fast monte carlo statistical analysis using threshold voltage modeling
A system, method, and computer program product for automatically approximating conventional Monte Carlo statistical device model evaluation for circuit simulation with drastic speed improvements,... |
|
8954909 |
Automated scalable verification for hardware designs at the register transfer level
A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting... |
|
8954306 |
Component behavior modeling using separate behavior model
A behavior model is provided, which is configured to simulate one aspect of the behavior of a component apart from the component model for the component. The behavior model can be included in a... |
|
8954305 |
Circuit simulation apparatus and circuit simulation method
A circuit simulation apparatus acquires wiring connection information indicating connection data in an electric circuit, selects a component constituting the circuit based on the wiring connection... |
|
8954307 |
Chained programming language preprocessors for circuit simulation
A netlist description that includes embedded code segments for describing a circuit is preprocessed in order to replace the embedded code segments with corresponding preprocessed code segments,... |
|
8954308 |
Modeling of multi-layered power/ground planes using triangle elements
In a method of simulating electrical characteristics of a circuit board having a plurality of features, the plurality of features is projected onto a planar construct. A Delaunay triangulation... |
|
8949101 |
Hardware execution driven application level derating calculation for soft error rate analysis
Mechanisms are provided for predicting effects of soft errors on an integrated circuit device design. A data processing system is configured to implement a unified derating tool that includes a... |
|
8949751 |
Methods and systems for wiring systems analysis and verification
A method for visually verifying an implementation of a design is described. The method includes integrating logical design data, physical design data, and physical implementation data into a... |
|
8949099 |
Method and system for steady state simulation and noise analysis of driven oscillators
In a circuit simulation tool in a computer system having one or more computer processors and computer-readable storage, a method for characterizing a driven oscillator circuit having an oscillator... |
|
8949083 |
Modeling gate transconductance in a sub-circuit transistor model
A method for modeling a transistor includes providing a transistor model having at least a source node, a drain node, and a gate node, simulating operation of a device using the transistor model... |
|
8949100 |
System, method, and computer program product for simulating a mixed signal circuit design
The present disclosure relates to a computer-implemented method for simulating an analog and mixed-signal circuit design having a digital circuit segment connected to an analog circuit segment at... |
|
8949102 |
Method and system for power delivery network analysis
The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for analyzing a power delivery... |
|
8942968 |
Analysis support computer product, apparatus, and method
A computer-readable, non-transitory medium stores a program that causes a computer to execute a process including acquiring a unique coefficient that is unique to a device in a circuit under test... |
|
8935133 |
Measurement points in modeling and simulation
A computing device may be used to create a model that includes a block. The block may represent a function corresponding to a simulation. Measurement points may be inserted into the model. The... |
|
8935623 |
Automatic API generation to functional PSoC blocks
A method of generating an application programming interface (API) for an electronic circuit. A graphical user interface is displayed through which a user can initiate generation of the API. A... |
|
8935146 |
Computer aided design apparatus, computer aided design program, computer aided design method for a semiconductor device and method of manufacturing a semiconductor circuit based on characteristic value and simulation parameter
A simulation instructing unit instructs a simulation unit, which generates signal characteristics, to generate the signal characteristics. A characteristic value extracting unit extracts, from the... |
|
8930856 |
Mask rule checking based on curvature
Aspects of the invention relate to techniques for mask rule checking based on curvature information. The curvature information comprises convex curvature information and concave curvature... |
|
8930174 |
Modeling technique for resistive random access memory (RRAM) cells
Accurate simulation of two-terminal resistive random access memory (RRAM) behavior is accomplished by solving equations including state variables for filament length growth, filament width growth,... |
|
8924909 |
Microelectromechanical system design and layout
Methods for producing layout data for devices are described. One method includes using a genetic algorithm to determine a structure of a thermally-operated actuator. Another method includes... |
|
8914760 |
Electrical hotspot detection, analysis and correction
Aspects of the invention relate to techniques for detecting and correcting electrical hotspots in a layout design for a circuit design comprising an analog circuit. Layout parameters for device... |
|
8903697 |
Solutions for modeling spatially correlated variations in an integrated circuit
A computer-implemented method for modeling Spatially Correlated Variation (SCV) in a design of an Integrated Circuit (IC) is disclosed. In one embodiment, the method includes: generating a set of... |