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9034755 Method of epitaxially forming contact structures for semiconductor transistors  
Embodiments of the present invention provide a method of forming contact structure for transistor. The method includes providing a semiconductor substrate having a first and a second gate...
9012329 Nanogap in-between noble metals  
A nanogap of controlled width in-between noble metals is produced using sidewall techniques and chemical-mechanical-polishing. Electrical connections are provided to enable current measurements...
9005463 Methods of forming a substrate opening  
A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the...
9006010 Radiation detectors and methods of fabricating radiation detectors  
Radiation detectors and methods of fabricating radiation detectors are provided. One method includes mechanically polishing at least a first surface of a semiconductor wafer using a polishing...
9000489 Local interconnects for field effect transistor devices  
A multi-field effect transistor (FET) device includes a first FET device arranged on a substrate, the first FET device including a first active region and a second active region, a second FET...
8987917 Semiconductor device having non-planar interface between a plug layer and a contact layer  
A semiconductor device is provided, in which it becomes easy to reliably couple a plug conductive layer and a wiring layer located over the plug conductive layer to each other and falling of the...
8956969 Hole formation method, multilayer wiring, semiconductor device, display element, image display device, and system containing via hole formed by the hole formation method  
A hole formation method including applying a pillar-forming liquid to a base material, to thereby form a pillar; applying an insulating film-forming material to the base material on which the...
8951913 Method for removing native oxide and associated residue from a substrate  
Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first...
8951833 Defect free deep trench method for semiconductor chip  
A method for forming large substantially defect-free void areas on a semiconductor integrated circuit chip includes processing the chip through the passivation level processing operations then...
8901701 Chip package and fabrication method thereof  
A chip package is disclosed. The package includes a semiconductor chip having a first surface and a second surface opposite thereto, at least one conductive pad adjacent to the first surface, and...
8901004 Plasma etch method to reduce micro-loading  
A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical...
8895445 Method of forming via holes  
A method for forming vias and trenches for an interconnect structure on a substrate includes exposing via pitch reduction patterns in a photoresist layer, developing the patterns to remove the via...
8895447 Semiconductor hole structure  
A first dielectric layer is formed over a substrate. A second dielectric layer is formed over the first dielectric layer. A first opening is formed in the second dielectric layer. A second opening...
8896127 Via structure and via etching process of forming the same  
An integrated circuit structure includes a semiconductor substrate and a hard mask layer formed on the semiconductor substrate. The integrated circuit structure further includes at least a...
8860227 Semiconductor substrate having dot marks and method of manufacturing the same  
A semiconductor substrate having dot marks is provided. Particularly, a semiconductor substrate having dot marks having an improved reading rate is provided. In a semiconductor substrate having a...
RE45180 Structure for a multiple-gate FET device and a method for its fabrication  
A method for forming a semiconductor device and a device made using the method are provided. In one example, the method includes forming a hard mask layer on a semiconductor substrate and...
8853862 Contact structures for semiconductor transistors  
Embodiments of the present invention provide a contact structure for transistor. The contact structure includes a first epitaxial-grown region between a first and a second gate of, respectively, a...
8828882 Method for forming a deep trench in a microelectronic component substrate  
A trench is formed in a semiconductor substrate by depositing an etch mask on the substrate having an opening, etching of the trench through the opening, and doping the walls of the trench. The...
8815734 Use of gas cluster ion beam to reduce metal void formation in interconnect structures  
A gas cluster ion beam process is used to reduce and/or even eliminate metal void formation in an interconnect structure. In one embodiment, gas cluster ion beam etching forms a chamfer opening in...
8793866 Method for providing a perpendicular magnetic recording head  
A method provides a PMR transducer. In one aspect, the method includes forming a trench in an intermediate layer using reactive ion etch(es). The trench top is wider than its bottom. In this...
8796148 Method for producing a deep trench in a microelectronic component substrate  
A method for producing a deep trench in a substrate includes a series of elementary etch cycles each etching a portion of the trench. Each elementary cycle includes deposition of a passivation...
8765613 High selectivity nitride etch process  
An anisotropic silicon nitride etch provides selectivity to silicon and silicon oxide by forming a fluorohydrocarbon-containing polymer on silicon surfaces and silicon oxide surfaces. Selective...
8765609 Deposit/etch for tapered oxide  
A process for fabricating a tapered field plate dielectric for high-voltage semiconductor devices is disclosed. The process may include depositing a thin layer of oxide, depositing a polysilicon...
8759983 Semiconductor device  
A semiconductor device according to one embodiment includes: a semiconductor substrate provided with a semiconductor element; a connecting member formed above the semiconductor substrate...
8759223 Double patterning etching process  
A method of etching a substrate comprises forming on the substrate, a plurality of double patterning features composed of silicon oxide, silicon nitride, or silicon oxynitride. The substrate...
8703609 Through-substrate via for semiconductor device  
A method of fabricating a semiconductor device including providing a substrate having a front surface and a back surface. A masking element is formed on the front surface of the substrate. The...
8697581 III-nitride semiconductor device with trench structure  
A III-nitride trench device has a vertical conduction region with an interrupted conduction channel when the device is not on, providing an enhancement mode device. The trench structure may be...
8685861 Integrated circuit system with contact distribution film  
A integrated circuit system including providing an integrated circuit device, forming an undoped insulating layer over the integrated circuit device, forming a thin insulating layer over the...
8658539 Fin profile structure and method of making same  
A FinFET device may include a first semiconductor fin laterally adjacent a second semiconductor fin. The first semiconductor fin and the second semiconductor fin may have profiles to minimize...
8623770 Method for sidewall spacer line doubling using atomic layer deposition of a titanium oxide  
A method for sidewall spacer line doubling uses thermal atomic layer deposition (ALD) of a titanium oxide (TiOx) spacer layer. A hardmask layer is deposited on a suitable substrate. A mandrel...
8619833 Broad area laser having an epitaxial stack of layers and method for the production thereof  
A broad stripe laser (1) comprising an epitaxial layer stack (2), which contains an active, radiation-generating layer (21) and has a top side (22) and an underside (23). The layer stack (2) has...
8575705 Semiconductor devices including MOS transistors having an optimized channel region and methods of fabricating the same  
A semiconductor device, including a device isolation layer arranged on a predetermined region of a semiconductor substrate to define an active region, the active region including a central top...
8574447 Inorganic rapid alternating process for silicon etch  
A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of...
8563381 Method for manufacturing a power semiconductor device  
A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to...
8557706 Substrate processing method  
A substrate processing method that forms an opening, which has a size that fills the need for downsizing a semiconductor device and is to be transferred to an amorphous carbon film, in a...
8512582 Methods of patterning a substrate  
A method of patterning a substrate in accordance with an embodiment of the invention includes forming a plurality of openings within at least one of photoresist and amorphous carbon. The openings...
8501570 Method of manufacturing source/drain structures  
An integrated circuit device and method for manufacturing the integrated circuit device provide improved control over a shape of a trench for forming the source and drain features of integrated...
8481401 Component having a through-contact  
A method for manufacturing a component having a through-contact includes: providing a substrate; forming an insulating layer on the substrate; structuring the insulating layer, the insulating...
8461050 Taper-etching method and method of manufacturing near-field light generator  
A method of taper-etching a layer to be etched that is made of SiO2 or SiON and has a top surface. The method includes the step of forming an etching mask with an opening on the top surface of the...
8450166 Method of fabricating semiconductor devices  
Method of fabricating a semiconductor device includes forming a gate having a first material on a substrate and forming a layer of a second material overlaying the gate. Sidewall spacers are...
8450167 Method of fabricating semiconductor devices  
A method of fabricating semiconductor device includes forming a plurality of gates on a substrate, forming a top layer on a top surface of each gate, forming sidewall spacers on opposite sides of...
8445381 Oxide-nitride stack gate dielectric  
A method of making a semiconductor structure comprises forming an oxide layer on a substrate; forming a silicon nitride layer on the oxide layer; annealing the layers in NO; and annealing the...
8440538 Method of manufacturing airbridge  
In making an airbridge structure, a second resist layer is applied over a first resist layer. The resist layers are exposed and developed to have a predetermined width W2. A third resist layer is...
8435900 Method for manufacturing a transistor  
The invention provides a method for manufacturing a transistor which includes: providing a substrate having a plurality of transistors formed thereon, wherein each transistor includes a gate;...
8435812 Method for making solar cell  
A method for making a solar cell includes following steps. A silicon substrate is provided, and the silicon substrate has a first surface and a second surface opposite to the first surface. A...
8426314 Method for forming semiconductor device  
A method for forming a semiconductor device is disclosed. A method for forming a semiconductor device includes forming a first hard mask layer over a semiconductor substrate including a cell...
8424175 Process for fabricating piezoelectrically actuated ultrananocrystalline diamond tip array integrated with ferroelectric or phase change media for high-density memory  
A process for fabricating a piezoactuated storage device having a tip array and a memory media, which includes but is not limited to: etching the regions on the surface of the silicon wafer to...
8404503 Method for making light emitting diode  
A method for making light emitting diode is provided. The method includes following steps. A light emitting diode chip is provided, wherein the light emitting diode chip comprises a first...
8404504 Method for making light emitting diode  
A method for making light emitting diode is provided. The method includes following steps. A light emitting diode chip is provided, the light emitting diode includes a first semiconductor layer,...
8394718 Methods of forming self-aligned through silicon via  
A method for forming a through silicon via (TSV) in a substrate may include forming a dielectric layer on the substrate; forming an opening through the dielectric layer and into the substrate...