Match Document Document Title
8999803 Methods for fabricating integrated circuits with the implantation of fluorine  
A method for fabricating an integrated circuit includes forming a first gate electrode structure above a first active region and a second gate electrode structure above a second active region,...
8981475 Lateral diffusion metal oxide semiconductor (LDMOS)  
A lateral diffusion metal oxide semiconductor (LDMOS) comprises a semiconductor substrate having an STI structure in a top surface of the substrate, a drift region below the STI structure, and a...
8815667 Transistors with an extension region having strips of differing conductivity type and methods of forming the same  
Methods of forming transistors and transistors are disclosed, such as a transistor having a gate dielectric over a semiconductor having a first conductivity type, a control gate over the gate...
8816419 Semiconductor device  
Provided is a semiconductor device having a high switching speed. A semiconductor device is provided with an n-type epitaxial layer having a plurality of trenches arranged at prescribed intervals;...
8741720 Penetrating implant for forming a semiconductor device  
A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either...
8697510 Tunnel field-effect transistor with narrow band-gap channel and strong gate coupling  
A semiconductor device and the methods of forming the same are provided. The semiconductor device includes a low energy band-gap layer comprising a semiconductor material; a gate dielectric on the...
8691635 Fabrication method of semiconductor device  
A semiconductor device includes a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type, disposed on a surface of the first...
8536011 Junction leakage suppression in memory devices  
A memory device includes a substrate and source and drain regions formed in the substrate. The source and drain regions include both phosphorous and arsenic and the phosphorous may be implanted...
8530315 finFET with fully silicided gate  
A method is provided for fabricating a finFET device. Multiple fin structures are formed over a BOX layer, and a gate stack is formed on the BOX layer. The fin structures each include a...
8501571 Method of manufacturing semiconductor device having silicon carbide layers containing phosphorus  
A semiconductor device includes a MOS transistor, a source electrode and a drain electrode on the MOS transistor each include a first carbon doped silicon layer including carbon at a first carbon...
8470677 Method of manufacturing semiconductor device  
Gate electrodes are formed in a high speed transistor forming region, a low leakage transistor forming region, and a medium voltage transistor forming region, respectively. Thereafter, a...
8431455 Method of improving memory cell device by ion implantation  
Disclosed herein is a method of forming a memory device. In one example, the method includes performing a first ion implantation process with dopant atoms of a first type to partially form...
8389369 Electronic device including a doped region disposed under and having a higher dopant concentration than a channel region and a process of forming the same  
An electronic device can include a drain region of a transistor, a channel region of the transistor, and a doped region that is disposed under substantially all of the channel region, is not...
8377787 Alternating-doping profile for source/drain of a FET  
A semiconductor device is provided. In an embodiment, the device includes a substrate and a transistor formed on the semiconductor substrate. The transistor may include a gate structure, a source...
8273631 Method of fabricating n-channel metal-oxide semiconductor transistor  
A method of fabricating an NMOS transistor, in which, an epitaxial silicon layer is formed before a salicide process is performed, then a nickel layer needed for the salicide process is formed,...
8247279 Method of fabricating semiconductor device using epitaxial growth inhibiting layers  
A semiconductor device according to one embodiment includes: a first transistor comprising a first gate electrode formed on a semiconductor substrate via a first gate insulating film, a first...
8241985 Semiconductor device having gate electrode with lower impurity concentration at edge portions than above channel and method of manufacturing the same  
A high breakdown voltage MOS transistor capable of reducing a leakage current while reducing an element size as compared with conventional ones is realized. On a P type well, with a channel area...
8217470 Field effect device including recessed and aligned germanium containing channel  
A field effect structure and a method for fabricating the field effect structure include a germanium containing channel interposed between a plurality of source and drain regions. The germanium...
8198154 Method of forming bottom-drain LDMOS power MOSFET structure having a top drain strap  
Lateral DMOS devices having improved drain contact structures and methods for making the devices are disclosed. A semiconductor device comprises a semiconductor substrate; an epitaxial layer on...
8148219 Thick oxide P-gate NMOS capacitor for use in a low-pass filter of a circuit and method of making same  
A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices...
8143133 Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes  
During the fabrication of advanced transistors, significant dopant diffusion may be suppressed by performing a millisecond anneal process after completing the basic transistor configuration,...
8110462 Reduced finger end MOSFET breakdown voltage (BV) for electrostatic discharge (ESD) protection  
The present invention relates to electrostatic discharge (ESD) protection circuitry. Multiple techniques are presented to adjust one or more ends of one or more fingers of an ESD protection device...
8101489 Approach to reduce the contact resistance  
A method for fabricating a semiconductor device is disclosed. First, a semiconductor substrate having a doped region(s) is provided. Thereafter, a pre-amorphous implantation process and neutral...
8097517 Method for manufacturing semiconductor device with improved short channel effect of a PMOS and stabilized current of a NMOS  
The present invention relates to a semiconductor device which is capable of simultaneously improving a short channel effect of a PMOS and the current of an NMOS and a method for manufacturing the...
8076189 Method of forming a semiconductor device and semiconductor device  
A method of forming a semiconductor device comprises forming a control electrode over a portion of a semiconductor layer, forming recesses extending into the semiconductor layer on opposing sides...
8008158 Dopant implantation method using multi-step implants  
A method of forming a dopant implant region in a MOS transistor device having a dopant profile having a target dopant concentration includes implanting a first concentration of dopants into a...
7998823 Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process  
By forming an additional doped region with increased junction depth at areas in which contact regions may connect to drain and source regions, any contact irregularities may be embedded into the...
7977715 LDMOS devices with improved architectures  
An LDMOS device includes a substrate of a first conductivity type, an epitaxial layer on the substrate, a buried well of a second conductivity type opposite to the first conductivity type in a...
7943468 Penetrating implant for forming a semiconductor device  
A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either...
7902032 Method for forming strained channel PMOS devices and integrated circuits therefrom  
An integrated circuit (IC) includes a plurality of compressively strained PMOS transistors. The IC includes a substrate having a semiconductor surface. A gate stack is formed in or on the...
7888224 Method for forming a shallow junction region using defect engineering and laser annealing  
A method for forming a shallow junction region in a crystalline semiconductor substrate and method for fabricating a semiconductor device having the shallow junction region includes a defect...
7851329 Semiconductor device having EDMOS transistor and method for manufacturing the same  
A semiconductor device having an EDMOS transistor and a method for forming the same are provided. The semiconductor device includes source and drain regions formed separately in a semiconductor...
7820532 Methods for simultaneously forming doped regions having different conductivity-determining type element profiles  
Method for simultaneously forming doped regions having different conductivity-determining type elements profiles are provided. In one exemplary embodiment, a method comprises the steps of...
7767536 Semiconductor device and fabricating method thereof  
A semiconductor device and fabrication method thereof are disclosed. An example semiconductor device includes a semiconductor substrate having a device isolation area defining an active area; a...
7759210 Method for forming a MOS device with reduced transient enhanced diffusion  
A method for forming a MOS device on a semiconductor substrate includes steps of: forming a gate structure on the semiconductor substrate; implanting ions into the semiconductor substrate for...
7736959 Integrated circuit device, and method of fabricating same  
There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to integrated circuit device including SOI logic transistors and SOI memory...
7709361 Method for manufacturing a semiconductor device  
A method for manufacturing a semiconductor device includes forming an impurity diffusion layer in a surface of a semiconductor substrate, wherein the forming the impurity diffusion layer comprises...
7645665 Semiconductor device having shallow b-doped region and its manufacture  
A method for manufacturing a semiconductor device has the steps of: (a) implanting boron (B) ions into a semiconductor substrate; (b) implanting fluorine (F) or nitrogen (N) ions into the...
7608873 Buried-gated photodiode device and method for configuring and operating same  
A 3-T buried-gated photodiode device that is suitable for use in a windowed array. The 3-T buried-gated photodiode device is configured such that the floating diffusion (FD) node of the device is...
7598160 Method for manufacturing thin film semiconductor  
A method for manufacturing thin film semiconductor device is provided. The semiconductor thin film includes a semiconductor thin film and a gate electrode and has an active region turned into a...
7566615 Methods of fabricating scalable two transistor memory devices  
A memory device includes a semiconductor substrate, a first gate insulator on a first portion of a semiconductor substrate, a storage node on the first gate insulator, a tunnel junction barrier on...
7547606 Semiconductor device and method of manufacturing the same  
An exemplary method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a gate insulation layer on a semiconductor substrate; forming a...
7547956 Thick oxide P-gate NMOS capacitor for use in a low-pass filter of a circuit and method of making same  
A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices...
7524715 Memory cell transistor having different source/drain junction profiles connected to DC node and BC node and manufacturing method thereof  
A memory cell transistor of a DRAM device is provided. A gate stack pattern is formed on a semiconductor substrate. A DC node and a BC node are formed substantially under lateral sides of the gate...
7514307 Method of manufacturing a semiconductor apparatus  
A method of manufacturing a semiconductor apparatus of the present invention comprises forming body diffusion layer, a gate electrode, and an interlayer dielectric over an surface of a...
7501322 Methods of forming non-volatile memory devices having trenches  
A semiconductor memory device includes a semiconductor substrate having a trench therein. First and second gate patterns are formed on a surface of the substrate adjacent the trench, a respective...
7485905 Electrostatic discharge protection device  
An electrostatic discharge protection device comprising a multi-finger gate, a first lightly doped region of a second conductivity, a first heavily doped region of the second conductivity, and a...
7439563 High-breakdown-voltage semiconductor device  
A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions...
7402451 Optimized transistor for imager device  
An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a single (i.e, one-sided) active...
7399669 Semiconductor devices and methods for fabricating the same including forming an amorphous region in an interface between a device isolation layer and a source/drain diffusion layer  
Semiconductor devices and methods for fabricating the same are disclosed in which an amorphous layer is formed in an interface between a device isolation layer and a source or drain region to...