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8647936 Junction field effect transistor with an epitaxially grown gate structure  
A method of fabricating a semiconductor device that includes forming a replacement gate structure on a portion of a semiconductor substrate, wherein source regions and drain regions are formed in...
8368128 Compact field effect transistor with counter-electrode and fabrication method  
An etching mask, comprising the delineation pattern of the gate electrode, of a source contact, a drain contact and a counter-electrode contact, is formed on a substrate of semi-conductor on...
8168485 Semiconductor device making method  
A method of making a semiconductor device includes forming a p-type semiconductor region to an n-type semiconductor substrate in such a manner that the p-type semiconductor region is partially...
8110456 Method for making a self aligning memory device  
A self aligning memory device, with a memory element switchable between electrical property states by the application of energy, includes a substrate and word lines, at least the sides of the word...
8043906 Method of forming a III-nitride selective current carrying device including a contact in a recess  
A III-nitride device includes a recessed electrode to produce a nominally off, or an enhancement mode, device. By providing a recessed electrode, a conduction channel formed at the interface of...
7737476 Metal-semiconductor field effect transistors (MESFETs) having self-aligned structures  
Metal-semiconductor field-effect transistors (MESFETS) are provided. A MESFET is provided having a source region, a drain region and a gate. The gate is between the source region and the drain...
7659155 Method of forming a transistor having gate and body in direct self-aligned contact  
A transistor having a directly contacting gate and body and related methods are disclosed. In one embodiment, the transistor includes a gate; a body; and a dielectric layer extending over the body...
7638430 Method of forming contact plug of semiconductor device  
The present invention relates to a method of forming contact plugs of a semiconductor device. According to the method, a first insulating layer is formed over a semiconductor substrate in which a...
7601569 Partially depleted SOI field effect transistor having a metallized source side halo region  
Source and drain extension regions and source side halo region and drain side halo region are formed in a top semiconductor layer aligned with a gate stack on an SOI substrate. A deep source...
7585706 Method of fabricating a semiconductor device  
The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion...
7432144 Method for forming a transistor for reducing a channel length  
A method of forming a transistor including: forming a gate oxide layer pattern and gate polysilicon layer pattern on a silicon substrate; forming a low energy ion implantation region aligned with...
7419892 Semiconductor devices including implanted regions and protective layers and methods of forming the same  
Methods of forming a semiconductor device include forming a protective layer on a semiconductor layer, implanting ions having a first conductivity type through the protective layer into the...
7285806 Semiconductor device having an active region formed from group III nitride  
The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion...
7247531 Field-effect-transistor multiplexing/demultiplexing architectures and methods of forming the same  
This disclosure relates to field-effect-transistor (FET) multiplexing/demultiplexing architectures and methods for fabricating them. One of these FET multiplexing/demultiplexing architectures...
7247530 Ultrathin SOI transistor and method of making the same  
A method of fabricating an ultrathin SOI memory transistor includes preparing a substrate, including forming an ultrathin SOI layer of the substrate; adjusting the threshold voltage of the SOI...
7183150 Resist protect oxide structure of sub-micron salicide process  
In accordance with the objectives of the invention a new method is provided for the creation of a layer of a Resistance Protective Oxide (RPO) layer. A layer of ONO is deposited that is to...
7157345 Source side injection storage device and method therefor  
A memory charge storage device has regions of sacrificial material overlying a substrate (12). For each memory cell a first doped region (20) and a second doped region (24) are formed within the...
7141464 Method of fabricating T-type gate  
Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a...
7138313 Method for creating a self-aligned SOI diode by removing a polysilicon gate during processing  
A method of forming a self-aligned SOI diode, the method comprising depositing a protective structure over a substrate; implanting a plurality of diffusion regions of variable dopant types in an...
7101744 Method for forming self-aligned, dual silicon nitride liner for CMOS devices  
A method for forming a self-aligned, dual silicon nitride liner for CMOS devices includes forming a first type nitride layer over a first polarity type device and a second polarity type device,...
7022562 Field-effect transistor with horizontal self-aligned gates and the production method therefor  
A field-effect transistor including: a support substrate, an active area forming a channel; a first active gate which is associated with a first face of the active area; source and drain areas...
6967129 Semiconductor device and fabrication method thereof  
This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming...
6939768 Method of forming self-aligned contacts  
A method of forming self-aligned contacts that includes providing at least one stacked-gate structure on a semiconductor substrate, forming a first dielectric layer on the stacked-gate structure...
6872604 Method of fabricating a light emitting device  
There is provided an inexpensive light emitting device and an electronic instrument using the same. In this invention, photolithography steps relating to manufacture of a transistor are reduced,...
6849484 Method of manufacturing semiconductor device  
As an opening exposing a surface of an element-forming region positioned in a region lying between two gate electrodes, a first opening is formed based on a resist pattern formed such that a...
6844225 Self-aligned mask formed utilizing differential oxidation rates of materials  
A self-aligned oxide mask is formed utilizing differential oxidation rates of different materials. The self-aligned oxide mask is formed on a CVD grown base NPN base layer which compromises single...
6815274 Resist protect oxide structure of sub-micron salicide process  
In accordance with the objectives of the invention a new method is provided for the creation of a layer of a Resistance Protective Oxide (RPO) layer. A layer of ONO is deposited that is to...
6777278 Methods of fabricating aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segment  
High electron mobility transistors (HEMTs) and methods of fabricating HEMTs are provided Devices according to embodiments of the present invention include a gallium nitride (GaN) channel layer and...
6773970 Method of producing a semiconductor device having improved gate structure  
A method of producing a semiconductor device able to prevent outward diffusion of an impurity from a gate electrode and improve the device quality, the method comprising the steps of forming a...
6770531 Adhesive material for programmable device  
In an aspect, an apparatus is provided that sets and reprograms the state of programmable devices. In an aspect, a method is provided such that an adhesive is formed on a dielectric and on an...
6689664 Transistor fabrication method  
A transistor fabrication method comprises: sequentially forming a pad oxide film and a silicon nitride film on a semiconductor substrate; etching the substrate to form a trench; sequentially...
6613621 Methods of forming self-aligned contact pads using a damascene gate process  
Self-aligned contacts in integrated circuits can be formed on an integrated circuit substrate having an active region. A groove can be formed in the insulating layer and a conductive material can...
6602759 Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon  
A method for forming an isolation trench in a silicon or silicon-on-insulator substrate is described in which a trench is formed in the semiconductor structure (containing a multiple layer...
6596554 Body-tied-to-source partially depleted SOI MOSFET  
A silicon-on-oxide MOS transistor is disclosed which has an implanted region on the source side of the gate electrode for making contact with the body node. A contact region of the same...
6469769 Manufacturing method of a liquid crystal display  
It is intended to provide a manufacturing method of a liquid crystal display that can reduce the manufacturing cost by decreasing the number of masks. A gate insulating film, a semiconductor film,...
6448120 Totally self-aligned transistor with tungsten gate  
A totally self-aligned transistor with a tungsten gate. A single mask is used to align the source, drain, gate and isolation areas. Overlay error is greatly reduced by the use of a single mask for...
6440786 Boron-carbide and boron rich rhobohedral based transistors and tunnel diodes  
The present invention relates to the fabrication of a boron carbide/boron semiconductor devices. The results suggest that with respect to the approximately 2 eV band gap pure boron material, 0.9...
6407434 Hexagonal architecture  
Several inventions are disclosed. A cell architecture using hexagonal shaped cells is disclosed. The architecture is not limited to hexagonal shaped cells. Cells may be defined by clusters of two...
6391696 Field effect transistor and method of manufacturing thereof  
There is disclosed a field effect transistor having a two-stage recess structure formed upon an InP substrate and showing stable device characteristics and a low contact resistance. The FET is...
6358785 Method for forming shallow trench isolation structures  
A method for forming a shallow trench isolation structure within a semiconductor substrate includes forming a trench opening within a semiconductor substrate having an oxidation-resistant material...
6344378 Field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors  
The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field...
6317174 TFT array substrate, liquid crystal display using TFT array substrate, and manufacturing method thereof  
A manufacturing method of a liquid crystal display is provided. The liquid crystal display having a picture element electrode formed on the uppermost layer of a structure is capable of reducing...
6274469 Process using a plug as a mask for a gate  
A method of fabricating an integrated circuit with a gate structure comprised of an oxide/polysilicon/metal stack. The method includes forming the gate structure by using a metal plug as a hard...
6242293 Process for fabricating double recess pseudomorphic high electron mobility transistor structures  
The invention is a method for fabricating a pseudomorphic HEMT transistor structure with a semiconductor layer having a 2DEG layer therein, a Schottky layer, a transition layer, and an ohmic...
6200839 Methods of forming thin film transistors  
A method of forming a thin film transistor includes, a) forming a thin film transistor layer of semiconductive material; b) providing a gate operatively adjacent the thin film transistor layer; c)...
6197668 Ferroelectric-enhanced tantalum pentoxide for dielectric material applications in CMOS devices  
In insulated-gate, field effect transistor (IGFET) devices fabricated in integrated circuits, the scaling down of the dimensions of the devices has resulted in structures with dimensions are so...
6198128 Method of manufacturing a semiconductor device, and semiconductor device  
In a case where an impurity for suppressing the short channel effect of MISFETs is introduced into a semiconductor substrate obliquely to the principal surface thereof, gate electrodes adjacent to...
6140191 Method of making high performance MOSFET with integrated simultaneous formation of source/drain and gate regions  
An integrated circuit and a method of making a transistor thereof are provided. The method includes the steps of forming a first stack on the substrate and a second stack on substrate in...
6117713 Method of producing a MESFET semiconductor device having a recessed gate structure  
An insulating layer is formed on a semiconductor substrate, and a first resist layer having a first resist opening portion is formed on the insulating layer. Then, the insulating layer is etched...
6114195 Manufacturing method of compound semiconductor field effect transistor  
A manufacturing method of compound semiconductor field effect transistor capable of enhancing a gate/drain withstand voltage includes a step of forming a channel layer by implanting ions into the...
Matches 1 - 50 out of 99 1 2 >