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9042438 |
Partial response equalizer and related method
A multi-phase partial response receiver supports various incoming data rates by sampling PrDFE output values at a selected one of at least two clock phases. The receiver includes a calibration... |
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9042488 |
Phase offset compensator
A phase offset compensator for compensating a phase offset is provided. The phase offset includes a first phase sub-offset and a second phase sub-offset. The phase offset compensator includes a... |
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9042497 |
Method and apparatus for mitigating signal interference in a feedback system
A system that incorporates the subject disclosure may include, for example, a process that includes adjusting a filter in electrical communication between an input terminal and a demodulator. The... |
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9025654 |
Reconfigurable equalization architecture for high-speed receivers
Systems and methods are disclosed for employing an equalization technique that improves equalizer input sensitivity and which reduces power consumption. In particular, an equalization architecture... |
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9025656 |
Floating-tap decision feedback equalizer
The present disclosure provides a floating-tap decision feedback equalization (DFE) circuit. In an exemplary implementation, the floating-tap DFE circuit may include a high-speed shift register, a... |
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9025651 |
Simplified polarization mode dispersion equalization
Methods, systems, and devices are described for equalizing data from an optical signal. Samples are filtered with at least one filter to compensate for polarization mode dispersion in an optical... |
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9025655 |
Transmitter training using receiver equalizer coefficients
A method of adjusting a post-cursor tap weight in a transmitter FIR filter in a high-speed digital data transmission system. A receiver, over a forward channel, receives a signal from the... |
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9020025 |
Transceiver with single coefficient based equalizer taps
A transceiver including an equalizer and a control circuit. The equalizer receives an input signal and first coefficients. The equalizer includes taps that, based on the first coefficients, filter... |
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9020021 |
Precoding loss reduction
An apparatus for encoding data signals includes a transmitter configured to encode and transmit a data signal over a communication channel, the transmitter including a precoder; a signal shaper... |
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9020065 |
Radio frequency digital filter group delay mismatch reduction
A radio frequency (RF) front end having group delay mismatch reduction is provided. One embodiment provides a first feed forward path and a second feed forward path. The second feed forward path... |
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9020024 |
Rate-adaptive equalizer that automatically initializes itself based on detected channel conditions, and a method
A rate-adaptive equalizer automatically initializes its tap coefficients to values. During an initialization process, a linear search algorithm is performed that sweeps the tap coefficients... |
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9014253 |
Apparatus and method for detecting communications from multiple sources
A method, apparatus, and computer program for detecting sequences of digitally modulated symbols transmitted by multiple sources are provided. A real-domain representation that separately treats... |
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9014252 |
Band-pass high-order analog filter backed hybrid receiver equalization
A channel equalization scheme is provided. A linear equalizer using a continuous-time linear equalization and a decision feedback equalizer using a discrete-time decision feedback equalization are... |
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9014254 |
Testing a decision feedback equalizer (‘DFE’)
Testing a Decision Feedback Equalizer (‘DFE’), the DFE including a summing amplifier operatively coupled to a plurality of latches and an input signal line for receiving a data signal, including:... |
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9008169 |
Circuits and methods for DFE with reduced area and power consumption
A 1/n-rate decision feedback equalizer (DFE) and method include a plurality of branches. Each branch includes a summer circuit configured to add a feedback signal to a received input, and a latch... |
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8995520 |
Analog continuous-time phase equalizer for data transmission
In particular embodiments, a method includes receiving as an input signal a phase-distorted signal or a transmitted-data signal, the phase-distorted signal having been distorted from a... |
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8989254 |
Single serdes transmitter driver design for both ethernet and peripheral component interconnect express applications
An apparatus includes a first coding circuit, a second coding circuit, and a plurality of source series terminated driver slices. The first coding circuit may be configured to generate a plurality... |
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8989253 |
Reconditioning equalizer filter for non-constant envelope signals
A technique for a reconditioning equalizer filter for non-constant envelope signals is described. The input to a transmitter chain is modified by a reconditioning equalizer filter, prior to being... |
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8989588 |
Optical transceiver with equalization and controllable laser interconnection interface
An optical transceiver includes an optical IC coupled to a processor IC. For transmit, the optical IC can be understood as a transmitter IC including a laser device or array. For receive, the... |
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8982940 |
Adaptive equalization method and adaptive equalizer
The present disclosure relates to the field of network communication, and specifically discloses an adaptive equalization method, including: obtaining a first filtered signal according to a first... |
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8982941 |
Predictive selection in a fully unrolled decision feedback equalizer
Described embodiments provide a non-uniformly quantized analog-to-digital converter (ADC) for generating a value for each sample of a received signal. The ADC includes arrays of decision... |
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8976855 |
Power and area efficient receiver equalization architecture with relaxed DFE timing constraint
An exemplary receiver equalizer includes a first decision feedback equalizer (DFE) sampler coupled to a summer, the first DFE to latch an equalized output of the summer. The first branch includes... |
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8976853 |
Signal reception using non-linearity-compensated, partial response feedback
A receiver may receive a signal that was generated by passage of symbols through a non-linear circuit. An equalizer of the receiver may equalize the received signal based on a first non-linearity... |
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8976909 |
Nonlinear detectors for channels with signal-dependent noise
A non-linear detector for detecting signals with signal-dependent noise is disclosed. The detector may choose a data sequence that maximizes the conditional probability of detecting the channel... |
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8976904 |
Automated erasure slicer threshold control and modification of symbol estimates to be erased
Methods and systems to vary an erasure slicer threshold based on a measure computed from prior soft and/or hard symbol decisions, identify reliable symbol estimates based on the threshold,... |
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8971396 |
Windowed-based decision feedback equalizer and decision feedback sequence estimator
A method and system are provided for performing Decision Feedback Equalization (DFE) and Decision Feedback Sequence Estimation (DFSE) in high-throughput applications that are not latency critical.... |
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8971397 |
On-the-fly compensation of sampling frequency and phase offset in receiver performing ultra-high-speed wireless communication
Received data oversampled twice is polyphased by the receiver, feedback is applied using an adaptive algorithm, and the filter coefficients (tap coefficient sequence) of a compensation filter are... |
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8971395 |
Decision feedback equalizer having programmable taps
A Decision Feedback Equalizer (DFE) with programmable taps includes a summer configured to receive a DFE input signal. Delay elements are coupled to the summer. The delay elements are connected in... |
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8964818 |
Use of multi-level modulation signaling for short reach data communications
A short reach communication system includes a plurality of communication SERDES that communicate data over a short reach channel medium such as a backplane connection (e.g., PCB trace) between,... |
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8964827 |
Adaptation of equalizer settings using error signals sampled at several different phases
An apparatus includes an error sample generating circuit and an adaptation circuit. The error sample generating circuit is generally configured to generate error samples at a plurality of phases.... |
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8964826 |
Time domain analog multiplication techniques for adjusting tap weights of feed-forward equalizers
Feed-forward equalizer (FFE) circuits and methods are provided which implement time domain analog multiplication for adjusting FFE tap weights. For example, a method includes inputting data... |
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8958512 |
System and method for receiver equalization adaptation
One embodiment relates to a method of adapting a receiver for equalization of an input data signal. A variable gain amplifier (VGA) loop adapts a VGA circuit using an initial threshold voltage so... |
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8953669 |
Decision feedback equalizer
A decision feedback equalizer that can operate at higher speed is provided. The decision feedback equalizer includes a weighting addition circuit (adder 21, coefficient units Tap1a, Tap2 to Tapn)... |
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8948240 |
System and method for terrestrial high-definition television reception
An adaptive receiver is disclosed for optimally receiving and processing signals. The receiver utilizes one or more memory blocks to store groups of incoming symbols. The groups of symbols are... |
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8948705 |
Multiple-access hybrid OFDM-CDMA system
In one aspect of a multiple-access OFDM-CDMA system, data spreading is performed in the frequency domain by spreading each data stream with a respective spreading code selected from a set of... |
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8937994 |
Partial response decision feedback equalizer with selection circuitry having hold state
A partial response decision feedback equalizer (PrDFE) includes a receiver including at least first and second comparators operative to compare an input signal representing a sequence of symbols... |
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8938037 |
High speed gain and phase recovery in presence of phase noise
A circuit for reducing phase errors in a digital communication systems signal is provided. The circuit comprises a demodulator block, a feed-forward path, a feed-back path, and a slicer. The... |
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8937996 |
Receiver with ICI noise estimation
The invention concerns receive circuitry for demodulating an input signal received from a transmission channel, the receive circuitry having a decision feedback equalizer including an... |
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8937995 |
Equalizer and equalizing method thereof
An equalizer and an equalizing method for equalizing a received signal, where the received signal includes at least one primary interference and a plurality of secondary interferences. The Viterbi... |
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8934557 |
Statistical joint precoding in multi-cell, multi-user MIMO
A network node jointly precodes multi-user (MU) multiple-input multiple-output (MIMO) transmissions simultaneously sent from geographically distributed base stations to a plurality of mobile... |
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8934527 |
Architecture for very high-speed decision feedback sequence estimation
A method for providing a next-cycle input sample from a decision feedback equalizer to a symbol decoder using look-ahead computations such that timing contention between the decision feedback... |
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8934526 |
Improvements relating to equalizers
Methods and apparatus adapting equalizers for compensating for signal distortion of a received digital signal are disclosed. The method comprises deriving equalizer settings for a received signal,... |
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8929429 |
Adaptive pade filter and transceiver
According to an embodiment of the disclosure, a communication transmitter and receiver include an adaptive filter and a decision feedback equalizer as well as cross-talk cancellers. The adaptive... |
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8923382 |
Tap adaptation with a fully unrolled decision feedback equalizer
Described embodiments adapt one or more taps of a decision feedback equalizer of a receiver by setting a reference voltage for each of one or more data recovery comparators to a corresponding... |
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8923375 |
On die jitter tolerance test
A system and method are disclosed for performing on die jitter tolerance testing. A set of clocks are generated based on an input signal. The set of clocks include in an in-phase signal based on... |
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8917803 |
Circuits and methods for characterizing a receiver of a communication signal
Circuits and methods characterize a receiver. The circuit includes a decision feedback equalizer (DFE) circuit, a clock and data recovery (CDR) circuit, a data checker, and an eye-scan controller.... |
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8917762 |
Receiver with four-slice decision feedback equalizer
A decision feedback equalizer (DFE) slice for a receiver includes a plurality of non-speculative DFE taps; and 3 speculative DFE taps, wherein the 3 speculative DFE taps comprise first and second... |
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8913655 |
Feed-forward equalizer architectures
Circuits and methods are provided for efficient feed-forward equalization when sample-and-hold circuitry is employed to generate n time-delayed versions of an input data signal to be equalized. To... |
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8908754 |
Decision feedback equalization for signals having unequally distributed patterns
Tools capable of improving the accuracy of decision feedback equalization (DFE) are described. The tools may adapt a DFE using a more-equal distribution of signals than those actually received.... |
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8902963 |
Methods and apparatus for determining threshold of one or more DFE transition latches based on incoming data eye
Methods and apparatus are provided for determining the threshold position of one or mote DFE latches using an evaluation of the incoming data eye. A threshold position is determined for one or... |