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9001565 Semiconductor device with memory device  
A memory mat (101) includes a main body portion (200) that includes a first capacitor (203A), a linear conductive film (204) that is formed between the main body portion (200) and a peripheral...
8908412 Array architecture for reduced voltage, low power, single poly EEPROM  
An Electrically Erasable Programmable Read Only Memory (EEPROM) memory array (FIG. 7) is disclosed. The memory array includes a plurality of memory cells arranged in rows and columns. Each memory...
8879346 Mechanisms for enabling power management of embedded dynamic random access memory on a semiconductor integrated circuit package  
Power management of an embedded dynamic random access memory (eDRAM) by receiving an eDRAM power state transition event and determining both the current power state of the eDRAM and the next power...
8848417 Integrated circuit with a self-programmed identification key  
A structure for storing a native binary code in an integrated circuit, including an array of planar MIM capacitors above an insulating layer formed above a copper metallization network, wherein at...
8711606 Data security for dynamic random access memory using body bias to clear data at power-up  
A circuit and method erase at power-up all data stored in a DRAM chip for increased data security. All the DRAM memory cells are erased by turning on the transistors for the DRAM storage cells...
8611170 Mechanisms for utilizing efficiency metrics to control embedded dynamic random access memory power states on a semiconductor integrated circuit package  
Power management of an embedded dynamic random access memory (eDRAM) using collected performance counter statistics to generating a set of one or more eDRAM effectiveness predictions. Using a set...
8483002 Antifuse unit cell of nonvolatile memory device for enhancing data sense margin and nonvolatile memory device with the same  
Disclosed are a unit cell capable of improving a reliability by enhancing a data sensing margin in a read operation, and a nonvolatile memory device with the same. The unit cell of a nonvolatile...
8472234 Anti-fuse circuit and integrated circuit including the same  
An anti-fuse circuit and an integrated circuit (IC) including the same are disclosed, which are applied to a technology for use in all kinds of semiconductor devices or system ICs, each of which...
8467230 Data security for dynamic random access memory using body bias to clear data at power-up  
A circuit and method erase at power-up all data stored in a DRAM chip for increased data security. All the DRAM memory cells are erased by turning on the transistors for the DRAM storage cells...
8395923 Antifuse programmable memory array  
Techniques and circuitry are disclosed for efficiently implementing programmable memory array circuit architectures, such as PROM, OTPROM, and other such programmable non-volatile memories. The...
8339831 Single polysilicon non-volatile memory  
A one-time-programmable memory device comprises a one-time-programmable memory cell array, a voltage pumping circuit, and a programming verification circuit. The one-time-programmable memory cell...
8300450 Implementing physically unclonable function (PUF) utilizing EDRAM memory cell capacitance variation  
A method and embedded dynamic random access memory (EDRAM) circuit for implementing a physically unclonable function (PUF), and a design structure on which the subject circuit resides are...
8284605 Semiconductor storage device and reading method thereof  
An embodiment of the invention provides a semiconductor storage device including a NAND string, a SEN node, and a capacitor. The NAND string includes plural series-connected memory cells, and one...
8199552 Unit cell of nonvolatile memory device and nonvolatile memory device having the same  
A One-Time Programmable (OTP) unit cell and a nonvolatile memory device having the same are disclosed. A unit cell of a nonvolatile memory device includes: an anti-fuse connected between an output...
8149605 Compact and accurate analog memory for CMOS imaging pixel detectors  
An analog memory circuit, i.e. a sample and hold circuit, wherein the source and the gate of the switching transistor is maintained at a same potential prior and after the sampling process using a...
8081500 Method for mitigating imprint in a ferroelectric memory  
An array of ferroelectric memory cells that allows imprint mitigation includes ferroelectric memory cells respectively coupled to word lines, plate lines, and bit lines; a word line driver for...
7978502 Method of programming a memory device of the one-time programmable type and integrated circuit incorporating such a memory  
A memory device of the irreversibly electrically programmable type is provided with a memory cell having a dielectric zone disposed between a first electrode and second electrode. An access...
7973410 Semiconductor device  
Since a power source voltage is generated from a communication signal in a wireless chip, there is a risk that a large amount of voltage be generated in the wireless chip to electrically destroy a...
7903444 One-time programmable memory and operating method thereof  
A one-time programmable memory cell is provided, the one-time programmable memory cell comprises: a gate dielectric layer disposed on a well; a gate electrode disposed on the gate dielectric...
7864598 Dynamic random access memory device suppressing need for voltage-boosting current consumption  
In one embodiment, a semiconductor memory device includes a plurality of pairs of bit lines, each of said pairs including a first bit line, a second bit line, a memory cell coupled to said first...
7859890 Memory device with multiple capacitor types  
An integrated circuit includes a memory array portion and a support circuitry portion arranged on a semiconductor substrate. An insulative layer is formed on the semiconductor substrate. Data...
7830696 Ferroelectric semiconductor storage device  
A ferroelectric semiconductor storage device includes: a block having a plurality of ferroelectric memory cells connected in series, each of the plurality of ferroelectric memory cells including a...
7821803 Memory module having star-type topology and method of fabricating the same  
A memory module having a start-type topology and a method of fabricating the same are provided. The memory module includes a substrate. Memory devices are mounted on the substrate in at least two...
7719877 Memory cell array and method of controlling the same  
To increase the quantity of stored charges of memory cells by a simple configuration to improve the operating margin, and to allow dummy cells to be unnecessary to improve the operating margin of...
7715247 One-time programmable read-only memory with a time-domain sensing scheme  
For realizing high speed one time programmable memory, bit line is multi-divided for reducing capacitance, so that the bit line is quickly charged when reading and multi-stage sense amps are used...
7710784 Method of reading the bits of nitride read-only memory cell  
A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is...
7675796 Semiconductor device  
Information stored in a nonvolatile storage device mounted to a semiconductor device is read by inputting an address signal or the like and by using a sense amplifier or the like. At this time,...
7675795 Semiconductor device, wireless chip, IC card, IC tag, transponder, bill, securities, passport, electronic apparatus, bag, and garment  
The invention provides an ID chip to which data can be written only once in order to maintain high security as a non-contact type ID chip to which signals are inputted wirelessly from an antenna....
7483310 System and method for providing high endurance low cost CMOS compatible EEPROM devices  
A system and method are disclosed for providing EEPROM devices that combine the high endurance features of complex and expensive EEPROM devices and the low manufacturing costs of CMOS compatible...
7411833 Nitride trapping memory device and method for reading the same  
A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is...
7372716 Memory having CBRAM memory cells and method  
A memory cell arrangement has a plurality of memory cells of the CBRAM type and a programming apparatus, the memory cells being arranged along bit lines and each bit line having a programming...
7327596 Electrostatic capacitance detection device and smart card  
An electrostatic capacitance detection device, for detecting electrostatic capacitance that changes in accordance with a distance from a target object to read surface contours of the target...
7321502 Non volatile data storage through dielectric breakdown  
A method is described that induced dielectric breakdown within a capacitor's dielectric material while driving a current through the capacitor. The current is specific to data that is being...
7307280 Memory devices with active and passive doped sol-gel layers  
The present memory device includes first and second electrodes, an active layer; and a passive layer, the active and passive layers being between the first and second electrodes, with at least one...
7245516 Layout method and computer program product  
A required value of decoupling capacitance is calculated in advance for every functional cell, a virtual cell which has a functional cell, and a decoupling capacitance placing area required for...
7233516 Semiconductor device and method for fabricating the same  
A semiconductor device includes a first DRAM section formed on a semiconductor substrate and composed of a plurality of first memory cells and a second DRAM section formed on the semiconductor...
7223688 Single level metal memory cell using chalcogenide cladding  
An apparatus including a volume of phase change material disposed between a first conductor and a second conductor on a substrate, and a plurality of electrodes coupled to the volume of phase...
7218547 ROM embedded DRAM with anti-fuse programming  
A ROM embedded DRAM provides ROM cells that can be electrically programmed to a data state using DRAM capacitor memory cells. Numerous techniques for reading the memory cells are provided if a...
7206215 Antifuse having tantalum oxynitride film and method for making same  
A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen...
7177135 On-chip bypass capacitor and method of manufacturing the same  
An on-chip bypass capacitor and method of manufacturing the same, the on-chip bypass capacitor including at least two capacitor arrays, each capacitor array including a first layer connecting the...
7123500 1P1N 2T gain cell  
A two-transistor DRAM cell includes an NMOS device and a PMOS device coupled to the NMOS device.
7050345 Memory device and method with improved power and noise characteristics  
A memory device and method with reduced power consumption and improved noise performance. An illustrative embodiment provides a random access memory with an array of plural memory bit cells,...
6977836 Memory device that can be irreversibly programmed electrically  
A non-volatile memory device includes a memory plane formed from a matrix of memory cells, each including an access transistor and a capacitor. The matrix includes first and second groups of cells...
6944582 Methods for reducing bitline voltage offsets in memory devices  
A method of designing a memory device that has substantially reduced bitline voltage offsets is provided. The method includes providing a memory core having a depth that defines a plurality of...
6943395 Phase random access memory with high density  
A phase random access memory including a plurality of access transistors, each access transistor including a drain region, and a phase-changeable film shared by the plurality of access...
6903961 Semiconductor memory device having twin-cell units  
Each of twin-cell units each formed of two DRAM cells has a cell plate electrically isolated from the cell plates in the other twin-cell units. Thereby, voltages on two storage nodes storing...
6856533 Method of modulating threshold voltage of a mask ROM  
A method of modulating a threshold voltage of a mask read-only memory, including providing a substrate, providing a source region in the substrate, providing a drain region in the substrate,...
6788603 ROM embedded DRAM with bias sensing  
A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset...
6781867 Embedded ROM device using substrate leakage  
A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high...
6775171 Method of utilizing voltage gradients to guide dielectric breakdowns for non-volatile memory elements and related embedded memories  
A method and related embedded memories are disclosed for utilizing voltage gradients to guide dielectric breakdowns for non-volatile memory elements. Non-volatile memory cells and associated...

Matches 1 - 50 out of 149 1 2 3 >