Match Document Document Title
9035673 Method of in-process intralayer yield detection, interlayer shunt detection and correction  
A system and method for in-process yield evaluation and correction in an array type of device are provided. The system and method include measuring electrical resistance between individual GATE...
9030221 Circuit structure of test-key and test method thereof  
A circuit structure of a test-key and a test method thereof are provided. The circuit structure comprises a plurality of transistors, a first conductive contact, a plurality of second conductive...
9030189 Quantum dot photo-field-effect transistor  
Photo-field-effect transistor devices and associated methods are disclosed in which a photogate, consisting of a quantum dot sensitizing layer, transfers photoelectrons to a semiconductor channel...
9024652 Electronic circuit and method for testing and keeping a MOS transistor switched-off  
The electronic circuit includes a transistor having a gate terminal, a source terminal and a drain terminal. A resistor has a first terminal connected to the gate terminal and has a second...
9014381 Switch techniques for load sensing  
Techniques for sensing the resistance of a load. In an aspect, a sense resistor is provided in series with the load. Each terminal of the sense resistor is alternately coupled via switches to a...
9007079 System and method for compensating measured IDDQ values  
An IDDQ test system and method that, in one embodiment, includes 1) an empirical extraction subsystem operable to generate an IDDQ versus temperature model for a given semiconductor device design,...
8988117 Gate-stress test circuit without test pad  
A high side driver circuit includes a driver stage having an input, an output, a first power terminal and a second power terminal, a transistor having a first power terminal, a second power...
8957723 Apparatus and method for power switch health monitoring  
A method includes obtaining a standard value for a characteristic of a power switch and obtaining a measured value of the characteristic, via a gate drive unit connected to a gate terminal of the...
8907687 Integrated circuit with stress generator for stressing test devices  
An integrated circuit device includes at least one test device and a stress generator coupled to the test device and operable to cycle the at least one test device to generate an AC stress. A...
8901951 High density test structure array to support addressable high accuracy 4-terminal measurements  
Circuits for performing four terminal measurement point (IMP) testing of devices under test (DUT) is provided. The DUT and the circuit is to be defined on a semiconductor chip. The circuit...
8890542 On-chip measurement of AC variability in individual transistor devices  
An apparatus for determining alternating current (AC) delay variation of a transistor device under test includes a ring oscillator, the ring oscillator having the transistor device under test...
8884641 Methods and system for electrostatic discharge protection of thin-film transistor backplane arrays  
The present invention provides devices and methods for testing the electrical performance of thin-film transistor backplane arrays and protecting thin-films during testing and handling.
8884642 Circuit having an external test voltage  
A circuit having an external test voltage includes an amplifier, a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, at least one reference...
8866489 Test apparatus with power cutoff section having variable maximum and minimum thresholds  
A test apparatus that tests a device under test, including a power supply section that supplies the device under test with power, a comparing section that detects a characteristic value indicating...
8866507 Method for testing trap density of gate dielectric layer in semiconductor device having no substrate contact  
A method for testing trap density in a gate dielectric layer of a semiconductor device having no substrate contact is provided in the invention. A source and a drain of the device are bilateral...
8866488 Power compensation in 3DIC testing  
A device, such as a 3DIC stacked device includes a first device under test (DUT) connected to a first force pad by a first through substrate via (TSV) stack and connected to a first sense pad by a...
8823411 Fatal failure diagnostics circuit and methodology  
A fault diagnostic circuit (100) and associated method of operation are described for testing an FET device (114) for a gate-drain short failure (113) by floating the FET gate during a...
8823380 Capacitive charge pump  
One or more charge pumps may be used to amplify the output voltage from a chemically-sensitive pixel that comprises one or more transistors. A charge pump may include a number of track stage...
8816715 MOS test structure, method for forming MOS test structure and method for performing wafer acceptance test  
A MOS test structure is disclosed. A scribe line region is disposed on a substrate which has a first side and a second side opposite to the first side. An epitaxial layer is disposed on the first...
8779796 Method and apparatus for device parameter measurement  
A method of measuring a parameter of a device in a circuit includes providing a device under test (DUT). The DUT includes a metal oxide semiconductor (MOS) transistor having a gate, a source, and...
8779804 Gate-stress test circuit without test pad  
A high side driver circuit includes a driver stage having an input, an output, a first power terminal and a second power terminal, a transistor having a first power terminal, a second power...
8749222 Method of sensing magnitude of current through semiconductor power device  
A cascode current sensor includes a main MOSFET and a sense MOSFET. The drain terminal of the main MOSFET is connected to a power device whose current is to be monitored, and the source and gate...
8723528 Active 2-dimensional array structure for parallel testing  
A structure and method is provided for testing a 2-dimensional array of electrical devices, such as a 2-dimensional array in the first metal level (M1) of an electronic structure. The method for...
8717058 Semiconductor apparatus and method of detecting characteristic degradation of semiconductor apparatus  
A semiconductor apparatus (IPD) includes a set value storage unit that stores a set value determined based on an initial characteristic value of the IPD, and a detector that detects characteristic...
8686750 Method for evaluating semiconductor device  
To provide a simple method for evaluating reliability of a transistor, a simple test which correlates with a bias-temperature stress test (BT test) is performed instead of the BT test....
8659302 Monitoring and recoverable protection of thermostat switching circuitry  
Voltage is detected on both sides of a protection fuse within a thermostat, such that a determination can be made as to the status of the fuse. When a blown fuse is detected, the user can be...
8643397 Transistor array for testing  
A transistor array for testing is provided. The transistor array includes a plurality of tested units. Each of the tested unit includes a tested transistor and a first to third switches. The...
8614436 Solid state klystron  
A solid state Klystron structure is fabricated by forming a source contact and a drain contact to both ends of a conducting wire and by forming a bias gate and a signal gate on the conducting...
8610451 Post silicide testing for replacement high-k metal gate technologies  
A test structure for testing transistor gate structures in an IC device includes one or more probe pads formed at an active area of the IC device; one or more first conductive lines formed at the...
8551841 IO ESD device and methods for forming the same  
A method includes forming an ESD diode including performing an epitaxy growth to form an epitaxy region comprising silicon and substantially free from germanium. The epitaxy region is doped with a...
8547131 System and method for observing threshold voltage variations  
A system and method for observing threshold voltage variations are provided. A ring oscillator circuit comprises a plurality of inverters arranged in a sequential loop, a plurality of test...
8542004 Semiconductor device and driving method of the same  
An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and the number of times of writing is not limited. The...
8531203 Mask alignment, rotation and bias monitor utilizing threshold voltage dependence  
The present invention provides a method and apparatus for measuring alignment, rotation and bias of mask layers in semiconductor manufacturing by examining threshold voltage variation.
8493296 Method of inspecting defect for electroluminescence display apparatus, defect inspection apparatus, and method of manufacturing electroluminescence display apparatus using defect inspection method and apparatus  
A dark spot defect of an EL element is detected based on an emission brightness or a current flowing through the EL element when an element driving transistor which controls a drive current to be...
8476917 Quiescent current (IDDQ) indication and testing apparatus and methods  
An embodiment of an electronic device includes a logic circuit, a switching element, and a quiescent current (IDDQ) evaluation circuit. The logic circuit is coupled to a first ground node. The...
8466707 Method and apparatus for testing a memory device  
In a particular embodiment, a method includes receiving a testing activation signal at a controller coupled to a semiconductor device. The method further includes biasing a well of at least one...
8456169 High speed measurement of random variation/yield in integrated circuit device testing  
A test structure is provided that utilizes a time division sampling technique along with a statistical modeling technique that uses metal-oxide-semiconductor field effect transistor (MOSFET)...
8445961 Measuring floating body voltage in silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET)  
In one embodiment, a body region of a body-contacted silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET) is connected to a gate of another MOSFET in a sensing...
8446163 Test circuit and test method for testing differential input circuit  
A test circuit includes a signal level modifying circuit. The signal level modifying circuit modifies at least one of signal levels of an inverting input signal and a noninverting input signal...
8436635 Semiconductor wafer having test modules including pin matrix selectable test devices  
A semiconductor wafer includes a plurality of die areas including circuit elements, and at least one test module (TM) on the wafer outside the die areas. The TMs include a test circuit including...
8384409 Ultra-thin organic TFT chemical sensor, making thereof, and sensing method  
An embodiment of the invention is an organic thin film transistor chemical sensor. The sensor includes a substrate. A gate electrode is isolated from drain and source electrodes by gate...
8362794 Method and system for assessing reliability of integrated circuit  
The present invention provides a method. The method includes operating a plurality of field-effect-transistors (FETs) under a first operation condition; reversing an operation direction for at...
8354835 Wide range current sensing  
A current sense circuit, including a voltage regulator, for detecting current conducted by a device under test (DUT) for a wide range of currents, while still providing fine granularity for...
8354858 Apparatus and method for hardening latches in SOI CMOS devices  
A method of determining one or more transistors within a particular circuit to be respectively replaced with a hardened transistor includes: identifying, as not requiring hardening, one or more...
8344750 Surface-plasmon detector based on a field-effect transistor  
According to one embodiment, a surface-plasmon (SP) beam generated by an SP source and directed via an SP waveguide is applied to a gate node of a field-effect transistor (FET). The FET also has a...
8339151 High voltage thyristor valve multi-injection test method  
This invention provides a high voltage thyristor valve multi-injection test method, it can meet one way valve and double valve operation test and over current test requirements. It has high...
8330478 Operating parameter monitoring circuit and method  
A monitoring circuit 14, 16, 18, 20, 22 for monitoring an operating parameter of an integrated circuit 2 comprises a ring oscillator circuit 80 comprising a plurality of serially connected...
8319515 Systems and methods for adjusting threshold voltage  
Systems and methods for adjusting threshold voltage. A threshold voltage of a transistor of an integrated circuit is measured. A bias voltage, which when applied to a body well of the transistor...
8314606 Current sensing and measuring method and apparatus  
A method can include obtaining a voltage across a first transistor as an obtained voltage. The method can also include multiplying the obtained voltage by a predetermined multiple M to yield a...
8305149 Semiconductor circuit apparatus and delay difference calculation method  
A semiconductor circuit apparatus having a clock oscillating circuit includes a first inverter circuit having a power supply terminal connected to a power supply potential via a first power supply...