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9034755 Method of epitaxially forming contact structures for semiconductor transistors  
Embodiments of the present invention provide a method of forming contact structure for transistor. The method includes providing a semiconductor substrate having a first and a second gate...
8895435 Polysilicon layer and method of forming the same  
The method of forming a polysilicon layer is provided. A first polysilicon layer with a first grain size is formed on a substrate. A second polysilicon layer with a second grain size is formed on...
8896098 Power storage device and method for manufacturing the same  
To provide a power storage device with improved cycle characteristics and a method for manufacturing the power storage device, a power storage device is provided with a conductive layer in contact...
8878365 Semiconductor device having a conductive layer reliably formed under an electrode pad  
A semiconductor device, including: a semiconductor layer; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first...
8853862 Contact structures for semiconductor transistors  
Embodiments of the present invention provide a contact structure for transistor. The contact structure includes a first epitaxial-grown region between a first and a second gate of, respectively, a...
8633544 Twin MONOS array for high speed application  
A stitch area configuration for word gates and control gates of a twin MONOS metal bit array comprises control gates on sidewalls of the word gates wherein the word gates and control gates run in...
8558381 Semiconductor device  
The present teachings provides a semiconductor device which has a semiconductor substrate, and a lower electrode including a first layer in contact with a lower surface of the semiconductor...
8441125 Semiconductor device  
A semiconductor device, including: a semiconductor layer having an active region; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer...
8304300 Method of manufacturing display device including transistor  
An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an...
8289694 Disaster-proof storage unit having transmission capabilities  
A storage device includes a memory and a wireless transmitter, both contained in a disaster-proof enclosure. The memory is configured to receive and store data, and the wireless transmitter is...
8269220 Transparent transistor with multi-layered structures and method of manufacturing the same  
Provided is a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer...
8188590 Integrated circuit package system with post-passivation interconnection and integration  
An integrated circuit package system including: providing an integrated circuit die, forming a first layer over the integrated circuit die, forming a bridge on and in the first layer, forming a...
8102052 Process for the simultaneous deposition of crystalline and amorphous layers with doping  
One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy....
8026606 Interconnect layers without electromigration  
A structure and a method for forming the same. The structure includes (a) an interlevel dielectric (ILD) layer; (b) a first electrically conductive line and a second electrically conductive line...
7936066 Flexible film and display device comprising the same  
A flexible film is provided. The flexible film includes a dielectric film; and a metal layer disposed on the dielectric film, wherein the ratio of the thickness of the metal layer to the thickness...
7936064 Semiconductor device  
A semiconductor device, including: a semiconductor layer having an active region; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer...
7893455 Semiconductor light emitting device with stress absorber, LED printhead, and image forming apparatus  
An inclined surface having an inclination angle θ is formed in an edge portion which forms an opening portion of an inter-layer insulating film, thereby reducing a stress by the inclined surface.
7859110 Solder resist material, wiring board using the solder resist material, and semiconductor package  
The present invention provides a solder resist material, which can suppress the warpage of a semiconductor package upon exposure to heat or impact even when used in a thin wiring board and meets a...
7843014 Small size transistor semiconductor device capable of withstanding high voltage  
In one embodiment of the present invention, a high withstand voltage transistor is disclosed having small sizes including an element isolating region. The semiconductor device is provided with the...
7713887 Method for forming isolation layer in semiconductor device  
A method for forming an isolation layer in a semiconductor device includes forming a trench in a semiconductor substrate, forming a first liner nitride layer on an exposed surface of the trench,...
7714435 Semiconductor device and method for fabricating the same  
A method for fabricating a three dimensional type capacitor is provided. The method includes forming a first insulation layer including first contact layers over a substrate, forming a second...
7709962 Layout structure having a fill element arranged at an angle to a conducting line  
A layout structure is provided with a conducting line extending in a conducting line direction, the conducting line being arranged within a substrate area, a fill element being arranged within the...
7701058 Undoped polysilicon metal silicide wiring  
Defect density of a polysilicon metal silicide wiring is reduced by employing a block of undoped polysilicon metal silicide in locations in which dopants are not needed in the underlying...
7679191 Polysilicon film with increased roughness  
The semiconductor device, in which a flaking of a layer or an element is prevented, is provided. A bonding pad section 13 of a semiconductor device 1 includes a polysilicon film 131, a barrier...
7659542 Silicon plate, producing method thereof, and solar cell  
A polycrystalline silicon plate has grain boundary lines on a surface thereof, and at least one of the grain boundary lines is a quasi-linear grain boundary line (1). The silicon plate is used to...
7635919 Low modulus stress buffer coating in microelectronic devices  
A method for protecting an electronic component including a semiconductor chip with a first elastic modulus includes steps as follows. At least one application of a first protective substance is...
7566974 Doped polysilicon via connecting polysilicon layers  
The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory...
7514274 Enhanced uniqueness for pattern recognition  
The present invention describes a test structure with a first set of features which is a subset of product features; and a second set of features adjacent to the first set of features, the second...
7423344 Bi-layer etch stop process for defect reduction and via stress migration improvement  
A method of forming a film stack in an integrated circuit, said method comprising depositing a layer of silicon carbide adjacent a first layer of dielectric material, depositing a layer of silicon...
7397124 Process of metal interconnects  
A process of metal interconnects and a structure of metal interconnect produced therefrom are provided. An opening is formed in a dielectric layer. A metal layer is formed over the dielectric...
7332811 Integrated circuit interconnect  
A method for forming an electrical interconnect overlying a buried contact region of a substrate is characterized by a deposition of a first polycrystalline silicon layer and the patterning and...
7250680 Semiconductor circuitry constructions  
The invention includes a method of forming semiconductor circuitry wherein a first semiconductor structure comprising a first monocrystalline semiconductor substrate is bonded to a second...
7245015 Display apparatus  
In a display apparatus, a display panel receives a driving signal from a driving chip through a pad and displays an image in response to the driving signal. The driving chip includes a terminal...
7211896 Semiconductor device and method of manufacturing the same  
There is provided a method of manufacturing a semiconductor device in which interconnect capacitance is restrained. The semiconductor device 200 comprises a semiconductor substrate; a second...
7151314 Semiconductor device with superimposed poly-silicon plugs  
A semiconductor device includes a first insulating layer; a first poly-silicon plug formed in the first insulating layer; a second insulating layer, formed on the first insulating layer; and a...
7119005 Semiconductor local interconnect and contact  
An integrated circuit is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped...
7023090 Bonding pad and via structure design  
A bonding pad design, comprising: a substrate; a lower series of metal pads upon the substrate; and an intermediate series of metal pads over the lower series of metal pads. The lower series of...
6995411 Image sensor with vertically integrated thin-film photodiode  
An image sensor has a vertically integrated thin-film photodiode. In one implementation, the image sensor has a substrate, an interconnection structure adjacent to the substrate, wherein the...
6987322 Contact etching utilizing multi-layer hard mask  
A method for forming contact holes using a multi-layer hard mask. A substrate with a device region and an alignment region having an opening therein to serve as an alignment mark is provided. A...
6894364 Capacitor in an interconnect system and method of manufacturing thereof  
A fabrication method for an integrated device having a capacitor in an interconnect system is described. At least a first exposed metal line and a second metal line are provided in an insulating...
6876045 Semiconductor device and process for manufacturing the same  
This specification relates to a process for manufacturing a semiconductor device, comprising the steps of: forming a lower gate electrode film on a semiconductor substrate 10 via a gate insulating...
6867474 Monolithic circuit inductance  
An inductance integrated in a monolithic circuit, including a conductive spiral having an internal end connected to a connection track, the spiral and the connection track belonging to a same...
6852566 Self-aligned rear electrode for diode array element  
A PIN active pixel sensor array including self aligned encapsulated electrodes and a method for forming the same the method including forming an electrically conductive layer over a substrate;...
6833624 System and method for row decode in a multiport memory  
The invention provides overlapping row decode in a multiport memory. Overlapping row decode includes predecode wires positioned on a first metallization layer and configured to address wordline...
6812551 Defect-free dielectric coatings and preparation thereof using polymeric nitrogenous porogens  
Defect-free dielectric coatings comprised of porous polymeric matrices are prepared using nitrogen-containing polymers as pore-generating agents. The dielectric coatings are useful in a number of...
6800911 Method of making a polycide interconnection layer having a silicide film formed on a polycrystal silicon for a semiconductor device  
A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon...
6783862 Toughness, adhesion and smooth metal lines of porous low k dielectric interconnect structures  
A structure useful for electrical interconnection comprises a substrate; a plurality of porous dielectric layers disposed on the substrate; an etch stop layer disposed between a first of the...
6747340 Multi-level shielded multi-conductor interconnect bus for MEMS  
A multi-level shielded multi-conductor interconnect bus for use in interconnecting MEM devices with control signal sources and a method of fabricating a multi-level shielded multi-conductor...
6700211 Method for forming conductors in semiconductor devices  
A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically...
6686638 Micromechanical component including function components suspended movably above a substrate  
A micromechanical component and method for its manufacture, in particular an acceleration sensor or a rotational speed sensor, includes: function components suspended movably above a substrate; a...

Matches 1 - 50 out of 219 1 2 3 4 5 >