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US20050273685 Automated and customizable generation of efficient test programs for multiple electrical test equipment platforms  
Automating techniques provide a way to create efficient test programs for characterizing semiconductor devices, such as those on a silicon die sample. Typically, test program creation is a drawn...
US20060107159 Intelligent storage of device state in response to error condition  
An algorithm helps ensure recordation of the state corresponding to an error or a catastrophic failure that requires a failing device to be sent to the manufacturer, rather than just the state of...
US20080098272 Networked test system  
An automatic test system that can be configured to perform any of a number of test processes. The test system contains multiple functional modules that are interconnected by a network. By using...
US20060206773 Tester simulation system and tester simulation method using same  
It is an object of the invention to implement a tester simulation system capable of checking timing margins of an input pattern in a short time, and a tester simulation method using the same. The...
US20060195748 Electronic product testing procedure supervising method and system  
An electronic product testing procedure supervising method and system is proposed, which is designed for use in conjunction with a testing platform and a supervising platform in a factory, and...
US20080307283 Complex Pattern Generator for Analysis of High Speed Serial Streams  
The present invention provides systems, devices and methods for generating user-defined test patterns within serial controller to facilitate signal testing and verification. These user-defined...
US20060156141 Defect symptom repair system and methods  
The present invention is related to the repair of defective items where the defect symptom does not readily suggest the action to repair the item. Test and repair technicians isolate and repair...
US20090259428 METHOD AND PRODUCT FOR TESTING A DEVICE UNDER TEST  
In a method of testing a device under test (DUT) using a test device adapted to provide a connection to a central controller, a test procedure activation signal is supplied from the central...
US20070226572 Soft error rate analysis system  
A method for improving reliability of an electronic system by evaluating a soft error rate is disclosed. A gate-level representation of the electronic system is converted to a graph, the graph...
US20060053357 Integrated circuit yield and quality analysis methods and systems  
Methods, apparatus, and systems for testing, analyzing, and improving integrated circuit yield and quality are disclosed herein. For example, in one exemplary embodiment, design defect extraction...
US20070234169 Generating masking control circuits for test response compactors  
Disclosed herein are exemplary embodiments of a so-called “X-press” test response compactor. Certain embodiments of the disclosed compactor comprise an overdrive section and scan chain selection...
US20050229064 Methods and systems for digital testing on automatic test equipment (ATE)  
Methods and systems for digital testing of semiconductor devices are disclosed. The inventions include testing modules (10) for use with automatic test equipment (ATE) 20 and device interface...
US20060085715 Test board of semiconductor tester having modified input/output printed circuit pattern and testing method using the same  
A test board for a semiconductor device tester having a modified input/output printed circuit pattern and a testing method using the same are provided. In an embodiment, a modified input/output...
US20070226574 AUTOMATED HIGH VOLTAGE DEFIBRILLATOR TESTER  
The present invention is directed to an automated high voltage (HV) defibrillator tester system that is able to asynchronously test a plurality of devices (e.g. defribillators etc.). The HV...
US20050204243 Method and testing system for storage devices under test  
A testing system for storage devices under test (SDUT) is provided. The system comprises a storage device testing subsystem configured to send testing commands, to process feedback data from said...
US20080082888 Measurement and calibration method for embedded diagnostic systems  
An apparatus for performing an embedded diagnostic test on a piece of equipment, the equipment including a plurality of components and defining various pathways through respective subsets of the...
US20080046791 Software Testing Method and System  
A software product is tested by first obtaining a performance matrix for the software product, the performance matrix containing the profile results of a plurality of tests on the software...
US20060282735 Fasttest module  
In a method and system for testing a device, a tester provides a first plurality of test signals to the device. A test module includes a plurality of logic circuits operable to concurrently...
US20070089013 SYSTEM AND METHOD FOR TESTING PORTS OF A COMPUTER  
The present invention provides a method for testing ports of a computer. The method includes steps of: connecting the testing ports and the non-testing ports of the computer according to a...
US20060282734 Test access control for secure integrated circuits  
Test access to an integrated circuit 2 is controlled by the use of test access enabling keys. A plurality of different test access enabling levels may be supported corresponding to different keys....
US20050022086 Method for generating tester controls  
The invention refers to a method which generates an IC tester control consisting of numerous test instructions for a plurality of specific test environments, which can generate and measure analog...
US20060253762 FPGA emulation system  
This invention features an FPGA emulation system including an FPGA device under test having a plurality of pins. A bus functional model circuit responsive to signals representing predetermined...
US20070011544 Reprogramming of tester resource assignments  
A method including creating a mapping file and a package test program for testing an electronic package. The package comprises a device. The package test program comprises source code for a device...
US20070234167 SEMICONDUCTOR DEVICE  
A disclosed semiconductor device includes one or more test terminals; a test control circuit configured to receive signals as one or more inputs thereof from the one or more test terminals to test...
US20070089012 SYSTEM AND METHOD FOR TESTING A LIGHT EMITTING DIODE PANEL  
An exemplary system for testing light emitting diode (LED) panel is disclosed. The system includes: a symbol arranging module (12) for arranging a group of symbols; an input/output module (14) for...
US20070067693 Method of testing driving circuit and driving circuit for display device  
A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying...
US20140380111 TESTING SYSTEM FOR SERIAL INTERFACE  
A testing system includes a circuit board, and an inserting unit. The circuit board includes a first serial interface and a serial chip connected to the first serial interface. The first serial...
US20070266290 Test apparatus, test method, and program  
There is provided a test apparatus that tests a device under test. The test apparatus includes a period generator that generates a rate signal determining a test period according to an operating...
US20050055618 Test arrangement and method for selecting a test mode output channel  
The invention provides a test arrangement for testing circuit units under test (101, 101a-101n) having a test apparatus for holding the circuit units under test (101, 101a-101n), input/output...
US20070226571 PROTOCOL ANALYZER FOR CONSUMER ELECTRONICS  
A protocol analyzer for analyzing traffic on a bus. A tap card is used to tap into a bidirectional bus. The tap provides a pass through connection from the card to the host and taps off of the...
US20070208984 Methods and apparatus using a service to launch and/or monitor data formatting processes  
In one embodiment, a method of operating a number of data formatters 1) blocks execution of a tester's test processes that generate test results, the test results pertaining to test of at least...
US20080244348 DETERMINING DIE PERFORMANCE BY INCORPORATING NEIGHBORING DIE PERFORMANCE METRICS  
A method includes receiving a first set of parameters associated with a plurality of die. A first die performance metric associated with a selected die is determined based on the first set of...
US20070089014 Semiconductor integrated circuit and method of fabricating the same  
To provide a semiconductor integrated circuit device in which an occupied area is suppressed from increasing and a high-performance test circuit is included, There is provided a semiconductor...
US20060123301 Transconductance stage operating as an active load for pin electronics  
A circuit operating as a bridgeless current load in pin testing equipment for testing a pin of a device under test is disclosed. The circuit includes a transconductance stage having at least a...
US20080092006 Optimizing a Set of LBIST Patterns to Enhance Delay Fault Coverage  
A method and system for mitigating the impact of voltage supply variations on logic built-in self-test (LBIST) results. The method includes, but is not limited to: creating a set of customized...
US20060212770 Error detection in compressed data  
A device under test—DUT—, comprising the steps of receiving a first data sequence from the DUT in response to a first stimulus signal, wherein the data of a plurality of internal data sequences of...
US20080115029 ITERATIVE TEST GENERATION AND DIAGNOSTIC METHOD BASED ON MODELED AND UNMODELED FAULTS  
A diagnostic and characterization tool applicable to structural VLSI designs to address problems associated with fault tester interactive pattern generation and ways of effectively reducing...
US20070288823 Apparatus including a fluid coupler interfaced to a test head  
One embodiment of the present invention is an apparatus including a fluid coupler interfaced to a test head that includes: (a) a first ring having a top surface disposed in a first plane; (b) a...
US20070245200 Semiconductor apparatus and test method therefor  
A SiP includes a logic chip and a memory chip. The memory chip includes a memory circuit to be tested, and the logic chip includes an internal logic circuit and a test processor electrically...
US20070061657 Delay fault testing apparatus  
A delay fault testing apparatus includes a scan device having a first input for receiving a data to the core under test, an update device including an input electrically connected to a first...
US20070011545 SYSTEM AND METHOD FOR TESTING A NAS  
A system for testing a NAS includes: a data storage device (3) connected with a NAS (6) for storing function test program and test data; a host computer (1) connected with the NAS being used to...
US20070157175 Software resource testing  
A software resource testing system and method. A computing system comprising a software application receives data identifying an expected state for an external resource required for execution of...
US20070061659 Methods for testing a plurality of semiconductor devices in parallel and related apparatus  
A method for testing a semiconductor device includes generating chip identification data for each of a plurality of devices under test to collect a plurality of chip identification data...
US20070300118 Method and system for controlling multiple physical pin electronics channels in a semiconductor test head  
Methods and apparatuses for processing test execution instructions on a plurality of devices under test (DUTs) simultaneously include functionality for receiving a test instruction, extracting a...
US20070234168 Semiconductor integrated circuit device and inspection method therefor  
A semiconductor integrated circuit device includes: a plurality of devices under test formed on a substrate; a selection circuit formed on the substrate which selects two of the plurality of...
US20060174177 Apparatus and method for using MEMS filters to test electronic circuits  
A mixed-signal integrated circuit testing device includes test electronics for generating a test signal for input to a device under test and receiving a response signal from the device under test,...
US20080172588 SYSTEM AND METHOD FOR TESTING MULTIPLE PACKET DATA TRANSMITTERS  
A system and method for testing a plurality of packet data transmitters in which multiple devices-under-test (DUTs) are tested by providing similar transmit data streams to the DUTs each of which,...
US20140229784 DYNAMIC HARD ERROR DETECTION  
A method of testing a circuit includes halting a flow of normal data through the circuit, running test data through the circuit while subjecting the circuit to a stress condition, and determining...
US20120304033 CLOCK DOMAIN CHECK METHOD, CLOCK DOMAIN CHECK PROGRAM, AND RECORDING MEDIUM  
To reduce pseudo errors. A stationary signal is propagated through the circuit to be checked. A combination is extracted in which different asynchronous transfers occur between a transmitting side...
US20060150047 Apparatus and method for generating a high-frequency signal  
An apparatus for generating an output signal having a higher frequency than a first signal received from a first external connector of a test equipment associated to a first channel and a second...

Matches 1 - 50 out of 51 1 2 >