Matches 1 - 50 out of 298 1 2 3 4 5 6 >


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US20150052408 GENERATING SOFT READ VALUES WHICH OPTIMIZE DYNAMIC RANGE  
A plurality of bins and a plurality of soft read values are stored in a lookup table where those bins that are either a leftmost bin or a rightmost bin correspond to soft read values having a...
US20140040682 METHOD AND SYSTEM FOR SYMBOL ERROR RATE ESTIMATION AND SECTOR QUALITY MEASUREMENT  
A probabilistic approach of symbol error estimation is disclosed. The probabilistic approach of symbol error estimation reflects the number of symbol errors more precisely than the number of...
US20120173935 PLUGGABLE TRANSCEIVER MODULE WITH ENHANCED CIRCUITRY  
Pluggable transceiver modules with additional functions and circuitry contained within the module. In a first embodiment, additional circuitry is added to determine bit error rates at the point of...
US20150012783 Techniques for Radio Link Problem and Recovery Detection in a Wireless Communication System  
A technique for radio link detection in a wireless communication system includes estimating a first error rate of an indicator channel. In this case, the indicator channel includes an indication...
US20110087933 POWER CONSUMPTION IN LDPC DECODER FOR LOW-POWER APPLICATIONS  
This disclosure relates generally to low power data decoding, and more particularly to low power iterative decoders for data encoded with a low-density parity check (LDPC) encoder. Systems and...
US20100303038 Method for optimizing network structures in radio networks  
In WirelessHART networks, mechanisms are already known that ensure a practical composition of a radio network with regard to its structure, whereby for this purpose, so-called health reports are...
US20110191645 METHOD AND APPARATUS FOR ADJUSTING NUMBER OF ITERATIONS IN ITERATIVE DECODING PROCEDURE  
In a method of determining an iteration value for an iterative decoding process of a hard disk drive, a bit error rate (BER) of a digital signal is measured in multiple iterations. A difference is...
US20130132784 DEVICE AND METHOD FOR DETERMINING A PHYSICAL QUANTITY  
In a method and a device for determining a physical quantity from a number of measured values containing errors, grouping of the number of measured values containing errors into a plurality of...
US20050210342 Recognition of reduced service capacities in a communication network  
On establishing and/or changing a service, information relating to the functional properties and topological arrangement of network elements relevant to provision of said service is stored in a...
US20100095166 Protocol Aware Error Ratio Tester  
A method and an apparatus for testing the physical layer of high speed serial communication devices and systems with a protocol aware test and measurement system is disclosed. This system includes...
US20080240212 Transmitter/receiver device and method of testing transmitter/receiver device  
A transmitter/receiver device includes: a transmitter unit including a parallel/serial converting circuit, a waveform deteriorating circuit, and a transmitter circuit; and a receiver unit...
US20140101498 METHOD FOR ESTIMATING BLOCK ERROR RATE AND COMMUNICATION DEVICE  
A method for estimating a block error rate and a communication device are applied to the field of communications technologies. The method for estimating a block error rate includes: decoding N...
US20130042157 THROUGHPUT IMPROVEMENT IN WIRELESS SYSTEMS  
Systems and methods are disclosed for improving throughput in a wireless system utilizing Hybrid Automatic Repeat Request (HARQ) retransmission. In general, prior to a HARQ-enabled transmission,...
US20090271668 Bus Failure Management Method and System  
A method, apparatus and program product improve computer reliability by, in part, identifying a plurality of error occurrences from Error Correction Codes. It may then be determined if the...
US20130254604 METHODS AND APPARATUS FOR ERROR RATE ESTIMATION  
Methods and apparatus for estimating received error rates. In one embodiment, the estimation of received error rates is conducted in relation to a bus interface such as a high-speed...
US20140189446 FORWARD ERROR CORRECTION WITH CONFIGURABLE LATENCY  
A method of performing forward error correction with configurable latency, where a configurable latency algorithm evaluates a target Bit Error Rate (BER) against an actual BER and adjusts the size...
US20120166895 MULTICAST DIGITAL VIDEO LOST PACKET RECOVERY  
An electronic communication network supports delivery of video program Internet protocol packets. A source device transmits both first and second video program Internet protocol packets. A first...
US20110264790 Method And Apparatus For Measuring Business Transaction Performance  
A method for measuring business transaction performance, includes the steps of, at a top-level component, assigning a correlation tag and original time stamp to a server request, passing the...
US20110010592 INFORMATION TRANSMITTING METHOD AND INFORMATION TRANSMITTING SYSTEM  
Information transmitting arrangements for transmitting information through a plurality of base stations from a master station to a plurality of slave stations which communicate with the base stations.
US20110055643 RECEIVER POWER SAVING VIA BLOCK CODE FAILURE DETECTION  
A communication system includes a receiver configured to receive a packet that contains plural codewords, and a codeword failure detector cooperatively operable with the receiver. The codeword...
US20100083060 SYSTEM AND METHOD FOR MPEG CRC ERROR BASED VIDEO NETWORK FAULT DETECTION  
Disclosed herein are systems, methods, and computer readable-media for detecting and identifying network faults. The method includes recording cyclic redundancy check (CRC) errors gathered by a...
US20150169396 REDUNDANT ENCODING  
Analyzing data is disclosed. Error events are tracked. The error events are classified based on a number of errors included in each event. A desired level of error event to be able to be corrected...
US20080178051 DVB-H SYSTEM AND METHOD FOR PERFORMING FORWARD ERROR CORRECTION  
A DVB-H system for performing forward error correction is disclosed, including: a tuner for receiving a data stream; a base-band receiver, coupled to the tuner, for extracting data bytes of an...
US20110113294 TUNABLE EARLY-STOPPING FOR DECODERS  
A method of decoding channel outputs using an iterative decoder to provide hard decisions on information bits includes activating each SISO decoder of the iterative decoder to provide...
US20140331096 Cross-Decoding for Non-Volatile Storage  
Cross-decoding assists decoding of an otherwise uncorrectable error when decoding a desired page of a multi-level-cell technology flash memory. A solid-state disk (SSD) controller adjusts space...
US20120151286 Cross-Decoding for Non-Volatile Storage  
Cross-decoding assists decoding of an otherwise uncorrectable error when decoding a desired page of a multi-level-cell technology flash memory. A solid-state disk (SSD) controller adjusts space...
US20100031096 INTERNAL FAIL BIT OR BYTE COUNTER  
Briefly, in accordance with one or more embodiments, an internal fail byte counter is disclosed.
US20080294948 Protocol Tester and Method for Performing a Protocol Test  
Embodiments of the present invention provide a protocol tester for performing a protocol test, said protocol tester exhibiting an input for the feeding in of data, a protocol decoding device for...
US20100131807 DECODING ALGORITHM FOR QUADRATIC RESIDUE CODES  
A decoding algorithm for quadratic residue codes applicable to the decoding of all quadratic residue codes is provided. The decoding algorithm employs digital signals to obtain a plurality of...
US20130076545 TIME ERROR ESTIMATING DEVICE, ERROR CORRECTION DEVICE AND A/D CONVERTER  
A time error estimating device for estimating a sampling time error of each of a plurality of sampling circuits when the sampling circuits generates a plurality of sampling output signals by...
US20090287970 COMMUNICATION TERMINAL DEVICE AND RECEPTION ENVIRONMENT REPORTING METHOD  
A communication terminal device and a reception environment reporting method produce a more excellent throughput, by making a report of a reception environment with higher accuracy. An SIR...
US20150179284 SYSTEM AND METHOD OF MANAGING TAGS ASSOCIATED WITH READ VOLTAGES  
A data storage device includes a controller coupled to a non-volatile memory. The non-volatile memory is configured to store multiple tags that include a first tag and a second tag. The controller...
US20090217110 METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT INVOLVING ERROR THRESHOLDS  
A system for processing errors in a processor comprising, an error counter, a pass counter, and a processing portion operative to determine whether a first error is active, increment an error...
US20100097071 Integrated Circuit Having Receiver Jitter Tolerance ("JTOL") Measurement  
An integrated circuit capable of on-chip jitter tolerance measurement includes a jitter generator circuit to produce a controlled amount of jitter that is injected into at least one clock signal,...
US20100039943 FRAME LOSS MEASUREMENT APPARATUS AND METHOD FOR MULTICAST SERVICE TRAFFIC  
An apparatus and method for measuring frame loss in multicast service traffic are provided. The method of measuring frame loss includes: counting the number of data frames of a predetermined...
US20070245176 BER monitoring circuit  
In a BER monitoring circuit, error cycles of input data are detected by a parity check portion and an error cycle detecting portion, a maximum (average/median) value is detected from among the...
US20110066901 Automated Quality Management System  
Various embodiments of the invention provide methods and systems for automated quality management and/or monitoring of organization operations, including for example data processing operations. In...
US20100287423 TAIL EXTRAPOLATOR AND METHOD  
This invention discloses a method which comprises quantizing an input signal. The number of equal quantized values during a period of time is counted thereby obtaining said number of counts (22)....
US20110191644 Method and apparatus for SAS speed adjustment  
A method for maintaining reliable communication on a bidirectional communication link is provided. A receiver on the bidirectional communication link detects an error and maintains a count of...
US20090282319 HIERARCHICAL DECODING APPARATUS  
A decoder includes multiple decoder stages and a controller. The decoder stages perform decoding operations with respect to a received signal using corresponding different decoding algorithms. The...
US20120159269 Measurement Device and Measurement Method  
Disclosed is means for quantifying resistance to soft errors in a logic circuit. A logic block group 120 having at least one set comprising a logic block having at least one logic circuit and a...
US20140040681 DEVICE BASED WEAR LEVELING  
A system for improving the management and usage of blocks based on intrinsic endurance may be used to improve memory usage for flash memory, such as a memory card. The overall card endurance may...
US20070143645 GPON rogue-ONU detector  
A system, for identifying faults in a GPON that includes an OLT and a plurality of ONUs, including: a global error-counter, coupled to the OLT, for counting FEC-correctable errors, for each ONU,...
US20080215934 DETECTING METHOD AND SYSTEM FOR CONSISTENCY OF LINK SCRAMBLING CONFIGURATION  
A detecting method for the consistency of a link scrambling configuration, comprises: setting the first threshold of the data packet error rate received by the receiving end; when the receiving...
US20100058125 DATA DEVICES INCLUDING MULTIPLE ERROR CORRECTION CODES AND METHODS OF UTILIZING  
A method of utilizing at least one block of data, wherein the at least one block of data includes a plurality of cells for storing data and at least one error flag bit, the method including:...
US20110296258 ERROR CORRECTING POINTERS FOR NON-VOLATILE STORAGE  
Architecture that implements error correcting pointers (ECPs) with a memory row, which point to the address of failed memory cells, each of which is paired with a replacement cell to be...
US20100064185 Link Performance Abstraction for ML Receivers based on RBIR Metrics  
A PHY abstraction mapping between the link level and system level performance is presented based on mapping between the mean RBIR (Received Bit Information Rate) of the transmitted symbols and...
US20080155361 ERROR DETECTION ON MEDICAL HIGH SPEED TRANSMISSION ROUTES  
In a transmission error logging device, method and computer-readable medium for logging transmission errors that occur on a high speed transmission route of a medical technology diagnostic...
US20150227403 Decoding System and Method for Electronic Non-Volatile Computer Storage Apparatus  
Methods are systems for calculating log-likelihood ratios for a decoder utilized in an electronic non-volatile computer storage apparatus are disclosed. A log-likelihood ratio handler is...
US20090077426 METHOD AND SYSTEM FOR IDENTIFYING COMMUNICATION ERRORS RESULTING FROM RESET SKEW  
An electronic system includes a counter and a first component. The first component includes a reset input configured to receive a reset event, an interface to a communications interface coupleable...

Matches 1 - 50 out of 298 1 2 3 4 5 6 >