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Match Document Document Title
US20110197088 METHOD AND SYSTEM TO PROVIDE A COMPLIANCE CLOCK SERVICE SUITABLE FOR CLOUD DEPLOYMENT  
A method and system for providing an improved compliance clock service are described. An example method comprises establishing a system compliance clock (SCC) for a storage system that provides a...
US20130191677 Regional Clock Gating and Dithering  
A system and method for dithering a clock signal during idle times is disclosed. An integrated circuit (IC) includes a number of functional units and a clock tree. The clock tree includes a root...
US20140089719 PLANNING UNAMBIGUOUSLY ACROSS MULTIPLE TIME ZONES  
A time slot of regular time length and capacity is defined in time local to a time zone. The slot is defined by a local time start timestamp and a local time end timestamp. In one aspect, upon...
US20110320852 CLOCK CIRCUIT AND RESET CIRCUIT AND METHOD THEREOF  
A clock circuit is suitable for use in a timing circuit which provides time information according to a reference clock. The clock circuit includes a clock detector to detect whether or not an...
US20070208963 SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD OF SUPPLYING A CLOCK TO INTERNAL BLOCKS PROVIDED IN A SEMICONDUCTOR INTEGRATED CIRCUIT  
In a semiconductor integrated circuit having a plurality of internal blocks, a clock is supplied successively to each of the plurality internal blocks in the course of changing the operating state...
US20110214004 PACKAGED CIRCUIT  
A packaged circuit includes an internal circuit, an embedded clock generator, a plurality of multi-function pins and a control pad. The embedded clock generator is for generating an internal...
US20090217068 Structure For Detecting Clock Gating Opportunities In A Pipelined Electronic Circuit Design  
A design structure for a pipeline electronic processor device may be embodied in a machine readable medium for designing, manufacturing or testing a processor integrated circuit. The design...
US20100185781 System and Method for Measuring Clock Skew on a Network  
A system and method for measuring clock skew in a network is disclosed. The method comprises sending an echo message at a periodic rate from a plurality of servers in the network to an anchor...
US20090013205 Information Leakage Prevention Apparatus and Information Leakage Prevention Method  
A clock signal extractor (11) is connected to an interface of an information equipment (2) for processing an information signal, to extract a clock signal component from the information signal. A...
US20090312855 METHOD FOR OPERATING AN AUTOMATION SYSTEM  
A method of operating an automation system with a plurality of automation devices connected for communication with a central unit is provided. Each automation device handles communication in...
US20110113066 ADAPTING A TIMER BOUNDED ARBITRATION PROTOCOL  
Example apparatus, methods, and computers prevent a split brain scenario in a pair of high availability servers by maintaining single writer access to a resource. One example method includes...
US20080046774 Blade Clustering System with SMP Capability and Redundant Clock Distribution Architecture Thereof  
A redundant clock distribution architecture is provided for a blade clustering system to achieve SMP (symmetric multi-processor) capability and flexible system configuration. The architecture...
US20100077248 CLOCK GENERATING DEVICE, METHOD THEREOF AND COMPUTER SYSTEM USING THE SAME BACKGROUND OF THE INVENTION  
A clock generating device, method thereof and a computer system using the same are provided. The clock generating device includes a PLL module and a tuning module. The PLL module receives a...
US20090158077 Circuit and method for generation of duty cycle independent core clock  
A disclosed embodiment is a circuit for producing a core clock from a system clock so that a core clock cycle is independent of a duty cycle of the system clock. The circuit comprises a system...
US20140013150 Monitoring Circuit with a Window Watchdog  
A method of monitoring a processing circuit is disclosed. The processing circuit is operable, in a normal operation mode, to generate a sequence of trigger commands, with at least one trigger...
US20150026504 CONTROLLER TIMING SYSTEM AND METHOD  
A controller timing system according to an exemplary aspect of the present disclosure includes, among other things, a master controller to generate a timing signal, a first slave controller...
US20110296185 Protection of Control Plane Traffic Against Replayed and Delayed Packet Attack  
Techniques are provided for determining freshness of control messages in a network. At a first device that is to enter into a secure communication session with a second device, timestamp...
US20070033427 Power efficient cycle stealing  
Arrangements and methods to cycle steal and reduce power consumption in an integrated circuit are disclosed. Embodiments of the invention exploit the art of cycle stealing for increased system...
US20070259639 Multi-standard module integration  
An electronic module that operates at various radio frequency standards is provided. The module includes a first integrated circuit die formed in a first semiconductor substrate and manufactured...
US20050114725 Calibrating an integrated circuit to an electronic device  
Systems and techniques are disclosed relating to calibrating an integrated circuit to an electronic component. The systems and techniques include an integrated circuit configured to generate a...
US20080201596 Clock buffer circuit of semiconductor device  
A clock buffer circuit of a semiconductor device is disclosed which receives an external clock signal and generates an internal clock signal with no duty distortion. The clock buffer circuit...
US20110231693 NUMERICALLY CONTROLLED OSCILLATOR AND OSCILLATION METHOD FOR GENERATING FUNCTION VALUES USING RECURRENCE EQUATION  
Numerically controlled oscillators and oscillation methods for generating function values in respective clock cycles by using a recurrence equation are provided. The oscillation circuit generates,...
US20080270818 Serial Communication Interface with Low Clock Skew  
A communication interface for use in an integrated circuit comprises a clock root circuit (110) configured to receive the clock reference signal and to generate a clock tree signal. A first lane...
US20120054513 APPARATUS FOR PERFORMING TIMER MANAGEMENT REGARDING A SYSTEM TIMER SCHEDULER SERVICE, AND ASSOCIATED METHOD  
An apparatus for performing timer management regarding a system timer scheduler service includes: a processor arranged to control operations of the apparatus; an ordinary timer arranged to provide...
US20070234098 Self-timed clock-controlled wait states  
A peripheral device in a processor system which can generate system level wait states to temporarily stop the clock of a processor is disclosed. The system comprises at least one peripheral...
US20110022864 REAL-TIME CLOCK  
A real-time clock circuit, comprising: an oscillator; and a counter, coupled to an output of the oscillator, for generating a real-time clock value. In a first mode the oscillator is configured to...
US20060195714 Clock control device, microprocessor, electronic device, clock control method, and clock control program  
The number of pulses of an operation clock to a microprocessor can be easily and instantaneously controlled and changed, in which a clock control device 2 supplies a clock of the same pulse number...
US20050097382 Techniques to regulate power consumption  
Briefly, a power regulator system that regulates power spikes during power-up and power-down modes.
US20120137217 SYSTEM AND METHOD FOR ADJUSTING INACTIVITY TIMEOUT SETTINGS ON A DISPLAY DEVICE  
In general, embodiments of the invention provide an approach to proactively adjust timeout settings on a display device based on user activity. Specifically, a system and method are presented to...
US20120144224 Adjusting a Device Clock Source to Reduce Wireless Communication Interference  
Adjusting a clock source of a device clock to reduce wireless communication (e.g., radio frequency (RF)) interference within a device. The device clock may be derived from an input clock to a...
US20140164816 DISTRIBUTED MANAGEMENT OF A SHARED CLOCK SOURCE TO A MULTI-CORE MICROPROCESSOR  
Microprocessors are provided with decentralized logic and associated methods for indicating power related operating states, such as desired voltages and frequency ratios, to shared microprocessor...
US20060101300 Phase-locked-loop power control during standby  
A clock generator for supplying one or more clock signals to integrated circuits within a processor-based system is disclosed. The clock generator includes one or more PLLs and one or more...
US20090172320 Keystroke monitoring apparatus and method  
Keystrokes input by a user are stored in non-volatile memory together with time stamps, creating a record of keystrokes and associated time stamps. At least some of the time stamps are generated...
US20070011482 Clock generator, radio receiver using the same, function system, and sensing system  
A clock generator having phase locked loops to receive reference signals from a shared reference signal source and generate clock signals differing in frequency, respectively, includes a phase...
US20110060935 Generating A Random Number In An Existing System On Chip  
A system for generating a true random number and implemented within an existing System on Chip (SoC) is provided herein. The system includes one or more sub circuitry synchronous modules...
US20080126774 Microcomputer with reset pin and electronic control unit with the same  
In a microcomputer for executing at least one task in normal operation mode, a reset pin is provided. The microcomputer is configured to be reset upon a reset signal with an active level being...
US20090228733 Power Management On sRIO Endpoint  
Clock signals used to operate core receive logic and core transmit logic within a serial buffer are dynamically enabled and disabled to minimize power consumption. A physical layer interface and...
US20130047023 Adaptive Clocking Scheme to Accommodate Supply Voltage Transients  
Adaptive clocking schemes for synchronized on-chip functional Hocks are provided. The clocking schemes enable synchronous clocking which can be adapted according to changes in signal path...
US20090172684 SMALL LOW POWER EMBEDDED SYSTEM AND PREEMPTION AVOIDANCE METHOD THEREOF  
Provided are a small low power embedded system and a preemption avoidance method thereof. A method for avoiding preemption in a small low power embedded system includes fetching and running a...
US20110145623 SYSTEM ON A CHIP WITH CLOCK CIRCUITS  
An embodiment of a system on a chip includes a reference clock circuit configured to produce a reference clock signal, a first clock circuit configured to produce a first clock signal, and...
US20100199118 MICROCONTROLLER WITH COMPATIBILITY MODE  
A microcontroller is operable to enable a compatibility mode where a clock source of the microcontroller is adjusted to support timing requirements of applications written for legacy...
US20150095688 EARLY WAKE-WARN FOR CLOCK GATING CONTROL  
A request associated with a particular cache record is generated to be sent to a system component associated with a cache bank over an interconnect. A wake-warn signal is sent over a dedicated...
US20140089718 CLOCK DOMAIN BOUNDARY CROSSING USING AN ASYNCHRONOUS BUFFER  
An apparatus includes a plurality of channels, where each of the channels includes an asynchronous buffer, a latency determination block, a tap selection circuit, and a variable delay. A latency...
US20140082400 ENHANCED CLOCK GATING IN RETIMED MODULES  
Embodiments of the invention may include receiving a design netlist representing a datapath operable to execute a function corresponding to an opcode combination. The datapath may include an input...
US20090249088 SEMICONDUCTOR APPARATUS INCLUDING POWER MANAGEMENT INTEGRATED CIRCUIT  
Provided is a semiconductor apparatus including a power management integrated circuit. The semiconductor apparatus includes an application processor and a voltage management integrated circuit....
US20090049326 CLOCK SIGNAL GENERATOR FOR GENERATING STABLE CLOCK SIGNAL, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME, AND METHODS OF OPERATING  
A clock signal generator can include a clock signal generation unit that is configured to generate a clock signal. A clock signal control unit is configured to count a number of pulses of the...
US20070260907 Technique to modify a timer  
A technique to modify a timer. More particularly, at least one embodiment of the invention relates to a technique to modify a timer value without the timer advancing by a significant amount.
US20090164677 TIMING ADJUSTMENT IN A RECONFIGURABLE SYSTEM  
This disclosure provides a method for adjusting system timing in a reconfigurable memory system. In a Dynamic Point-to-Point (“DPP”) system, for example, manufacturer-supplied system timing...
US20120036389 Precision Oscillator for an Asynchronous Transmission System  
A precision oscillator for an asynchronous transmission system. An integrated system on a chip with serial asynchronous communication capabilities includes processing circuitry for performing...
US20100058104 SEMICONDUCTOR DEVICE AND DATA TRANSMISSION SYSTEM  
To provide a semiconductor device including a data input circuit and a data output circuit connected to a plurality of data input/output terminals, where at least one of the data input circuit and...

Matches 1 - 50 out of 337 1 2 3 4 5 6 7 >