Matches 1 - 50 out of 78 1 2 >


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US20140325250 DISTRIBUTED SYNCHRONIZATION AND TIMING SYSTEM  
A method and apparatus for controlling the phase and frequency of the local clock of a USB device, the apparatus comprising circuitry for observing USB traffic and decoding from the USB traffic a...
US20100031077 Alternate Signaling Mechanism Using Clock and Data  
Control events may be signaled to a target system having a plurality of components coupled to a scan path by using the clock and data signals of the scan path. While the clock signal is held a...
US20140298072 METHOD AND APPARATUS FOR SYNCHRONISING THE LOCAL TIME OF A PLURALITY OF INSTRUMENTS  
A method of determining the downstream propagation time of signals from a USB Host Controller across one or more USB cables and one or more USB Hubs to a SuperSpeed USB device, including locking a...
US20140229756 COMPOUND UNIVERSAL SERIAL BUS ARCHITECTURE PROVIDING PRECISION SYNCHRONISATION TO AN EXTERNAL TIMEBASE  
A method of synchronising a compound SuperSpeed USB device, comprising: providing data communication between a host computing device and the compound SuperSpeed USB device across the SuperSpeed...
US20050132245 Data modem  
An improved data modem (IDM) and method includes a communication processor module, a mass storage module, a power converter module, and one or more DSP modules. The communication processor module...
US20090249222 SYSTEM AND METHOD FOR SIMULTANEOUS MEDIA PRESENTATION  
Described herein are systems and methods for presenting content to a plurality of users at a plurality of computers. Presenting content may comprise presenting media content (e.g., playing media...
US20080140862 APPLIANCE NETWORK FOR A NETWORKED APPLIANCE AND A CLOCK ACCESSORY  
An appliance network has a networked appliance and a clock accessory in communication with one another. Optionally, the clock accessory can have or more functionalities, such as time...
US20150082072 MEMORY CONTROLLER WITH FLEXIBLE DATA ALIGNMENT TO CLOCK  
A system includes a memory controller and a plurality of memory devices that are connected in-series to the memory controller. The system operation is synchronous with clock that is provided in a...
US20140344612 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE TESTING METHOD, AND DATA PROCESSING SYSTEM  
To provide a semiconductor device including an interface chip and a core chip and a measurement-target signal line and a reference signal line each including a through silicon via provided in the...
US20050210306 Method and apparatus for time synchronization in a network data processing system  
A method, apparatus, and computer implemented instructions for synchronizing time in a network data processing system. A request for time synchronization is received at a target data processing...
US20120272087 Method For Ensuring Synchronous Presentation of Additional Data With Audio Data  
A recording medium, method and apparatus for managing data are discussed. According to an embodiment, the present invention provides a method of reproducing main data and additional data. The...
US20100192001 DEVICE TIME ADJUSTMENT FOR ACCURATE DATA EXCHANGE  
The clock of an endpoint device is adjusted to a collection system time in a meter reading system where the endpoint device is employed to read and record meter reading data for calculation of...
US20050055595 Software update method, apparatus and system  
A system for remotely updating software on at least one electronic device connected to a network. The electronic devices have a non-volatile rewritable storage unit divided into at least two...
US20090213265 SIGNAL INPUTTING APPARATUS AND SIGNAL INPUTTING METHOD  
A signal inputting apparatus that receives first and second input image signals transmitted and extracts image data is provided. The apparatus includes a first interface unit and a second...
US20070260906 Clock synchronization method and apparatus  
A clock synchronization apparatus; a network having master and slave clocks; and a method of synchronizing clocks are disclosed.
US20100318822 ENERGY SAVING IN SYSTEMS-ON-CHIP  
A System-on-Chip may include initiators, targets exchanging information with the initiators, and a control module. The control module may be configured to selectively set to one of different...
US20100312981 MEMORY ACCESS TIMING ADJUSTMENT DEVICE AND MEMORY ACCESS TIMING ADJUSTMENT METHOD  
A memory access timing adjustment device according to the present invention includes separate memory interfaces (632A to 632D) each of which is separately connected to a corresponding one of the...
US20090192639 SYSTEM TO PROCESS A PLURALITY OF AUDIO SOURCES  
Today, even despite the huge increase of available processing power, the commercial OS are not able to guarantee the response time necessary to process a plurality of audio sources and output the...
US20110060869 LARGE CAPACITY SOLID-STATE STORAGE DEVICES AND METHODS THEREFOR  
Non-volatile storage devices and methods capable of achieving large capacity SSDs containing multiple banks of memory devices. The storage devices include a printed circuit board, at least two...
US20090228732 METHOD FOR SYNCHRONIZATION OF NETWORK NODES  
Method for synchronization of network nodes in a LAN (10) including a central network master-node (11) and a plurality of synchronization domains (20, 30), each synchronization subnetwork (20,30)...
US20080222440 Real time clock calibration system  
A temperature-based real time clock calibration system and method for performing the same. The system in one embodiment includes a real time clock calibrated against a reference frequency, a...
US20090089842 POINT-TO-MULTIPOINT HIGH DEFINITION MULTIMEDIA TRANSMITTER AND RECEIVER  
A high definition video transmitter and receiver are disclosed. The transmitter provides high definition video to a one-point receiver or to multipoint receivers. The transmission network is...
US20100287402 TIMESTAMPING APPARATUS AND METHOD  
A timestamping apparatus and method are provided. The timestamping apparatus implements timestamping on a synchronization message at a physical layer when the synchronization message is...
US20140173322 PACKET DATA ID GENERATION FOR SERIALLY INTERCONNECTED DEVICES  
Various memory devices (e.g., DRAMs, flash memories) are serially interconnected. The memory devices need their identifiers (IDs). Each of the memory devices generates IDs for neighboring memory...
US20090132837 System and Method for Dynamically Selecting Clock Frequency  
A system and method for dynamically changing the clock frequency of a system clock is disclosed. The invention includes selecting a peripheral interface clock signal from a plurality of currently...
US20080256378 Audio/Video Content Synchronization Through Playlists  
A method is disclosed for performing bi-directional synchronization between a host device having a large capacity, e.g., a personal computer (20), in which a dedicated application program is...
US20090150706 WRAPPER CIRCUIT FOR GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS SYSTEM AND METHOD FOR OPERATING THE SAME  
Provided are a high-performance wrapper circuit for a globally asynchronous locally synchronous (GALS) system and a synchronization method using the same, which are capable of solving a...
US20160132072 LINK LAYER SIGNAL SYNCHRONIZATION  
Embodiments of the present disclosure are directed toward signal synchronization in a link layer interconnect fabric. In one instance, an apparatus with logic for signal synchronization may...
US20110252263 SEMICONDUCTOR STORAGE DEVICE  
Provided is a storage device of a serial attached small computer system interface/serial advanced technology attachment (PCI-Express) type, which provides data storage/reading services through a...
US20100135336 METHOD, APPARATUS, AND SYSTEM FOR SYNCHRONIZING TIME  
The present invention discloses a method, an apparatus, and a system for synchronizing time, and relates to communication technologies. The method includes: receiving a time synchronization signal...
US20100077247 COMPUTER AUDIO INTERFACE UNITS AND SYSTEMS  
A computer audio interface unit (110) comprises a serial computer interface (e.g. USB) (204) providing a connector (112) for connection to an external, computer-based source (100) of digital audio...
US20110099408 CLOCK DATA RECOVERY AND SYNCHRONIZATION IN INTERCONNECTED DEVICES  
For synchronizing a master device and a slave device connected by a data transfer link, the master device measures a phase offset in a signal received from the slave device with respect to the...
US20060031696 Method and apparatus for determining time  
An apparatus (200) for determining time within a global navigation satellite receiver comprises a correlator (1), a combiner (35, 37), a comparator, and a processor. The correlator (1) comprises a...
US20140281652 DATA SYNCHRONIZATION ACROSS ASYNCHRONOUS BOUNDARIES USING SELECTABLE SYNCHRONIZERS TO MINIMIZE LATENCY  
A system and apparatus that include a selectable synchronizer circuit for synchronizing data across asynchronous boundaries are disclosed. The apparatus includes a unit associated with a first...
US20110016343 Synchronizing a Clock in a Vehicle Telematic System  
A telematic module (12) in a mobile vehicle (10) has an internal clock that is synchronized with a master clock signal by an algorithm (22) that has a sequence of steps for determining if each of...
US20050071703 Fault-tolerant clock synchronisation  
A clock synchronization method is described for a system including N clocks, at least three and at most N−1 of which are master candidate clocks. A start message is broadcast from the fastest...
US20080276133 Software-Controlled Dynamic DDR Calibration  
A system, device and method are described that provide dynamic calibration of high-speed systems, such as high-speed DDR memory systems. In accordance with certain embodiments of the invention, a...
US20070038795 Asynchronous bus interface and processing method thereof  
An asynchronous bus interface which is capable of securing a sufficient access effective period and eliminating a useless access wait time even when a frequency of a clock changes is provided. An...
US20050015637 Data processing system  
A data processing system is claimed which comprises a plurality of processors (12a, 12b, 12c) which communicate data streams with each other via a shared memory (10). The data processing system...
US20140181567 COMMAND CONTROL CIRCUIT FOR MEMORY DEVICE AND MEMORY DEVICE INCLUDING THE SAME  
Exemplary embodiments disclose a command control circuit including a command decoder configured to generate an internal command signal using a chip select (CS) signal and a command signal, and a...
US20080162974 Universal serial bus host controller  
In some embodiments a signal is sent to start a current time frame for a Universal Serial Bus host controller. After the sending, a time period is entered during which a pending transaction may be...
US20060031697 Method and system for reducing the effects of simultaneously switching outputs  
A delay element is coupled to a first interface, which is coupled to a second interface via interconnect. Traces in the interconnect for propagating output signals from the first interface to the...
US20110099407 Apparatus for High Speed Data Multiplexing in a Processor  
A processer, for example a field programmable gate array (FPGA), comprises input/output (I/O) logic including timing adjustment logic operative to synchronize a time division multiplexed (TDM)...
US20130246831 SELECTION DEVICE, SELECTION METHOD AND INFORMATION PROCESSING DEVICE  
A selection device includes an interface connected to at least a clock signal line and a chip select signal line among output lines of a first device, a plurality of interfaces respectively...
US20120030496 Specification of Isochronous Data Transfer in a Graphical Programming Language  
System and method for transferring data. A system diagram is displayed, where the system diagram includes multiple device icons corresponding to respective devices, each device icon having...
US20100162261 Method and System for Load Balancing in a Distributed Computer System  
In an embodiment, a distributed computer system comprises a plurality of computers connected in substantial logical ring architecture. The computers are configured having a synchronized clock...
US20090193280 Method and System for In-doubt Resolution in Transaction Processing  
A method and system are provided for in-doubt resolution in transaction processing involving at least two distributed transaction processing systems. The method includes a resynchronization method...
US20060095808 Method and apparatus for using internal delays for adjusting setup and hold times in a memory device  
A method and apparatus for compensating address and control lines to account for clock delays within a memory device is disclosed. Latches are located directly within a the storage area of the...
US20100281289 Bidirectional Memory Interface with Glitch Tolerant Bit Slice Circuits  
A bit slice circuit having transmit and receive modes of operation is described. The bit slice circuit comprises: first transmit circuitry and first receive circuitry operating in a first clock...
US20080201598 Device and Method For Preventing Lost Synchronization  
A method and device for preventing a defect in a CDR circuit from hindering synchronization between connection nodes and for preventing connection failures. The CDR circuit generates a...

Matches 1 - 50 out of 78 1 2 >