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US20140351616 |
VOLTAGE-CONTROLLABLE POWER-MODE-AWARE CLOCK TREE, AND SYNTHESIS METHOD AND OPERATION METHOD THEREOF
A voltage-controllable power-mode-aware (PMA) clock tree in an integrated circuit (IC) and a synthesis method and an operation method thereof are provided. The PMA clock tree includes at least two... |
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US20130145189 |
SERVER SYSTEM CAPABLE OF DECREASING POWER CONSUMPTION AND METHOD THEREOF
A server system and a control method applied therein are illustrated. The server system includes a server cabinet, servers accommodated in the server cabinet, a cooling fan module for cooling the... |
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US20110271128 |
STATE TRANSITIONING CLOCK GATING
In some embodiments, new clock gating approaches, referred hereafter as State Transition Gating (STG) methods and circuits are provided. In areas of circuit designs including sequential elements,... |
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US20120204045 |
System and Method for Reducing Power Consumption During Periods of Low Link Utilization
A system and method for reducing power consumption during periods of low link utilization. A single enhanced core can be defined that enables operation of subset of parent physical layer devices... |
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US20120054521 |
SYSTEM AND METHOD FOR IMPLEMENTING AN INTEGRATED CIRCUIT HAVING A DYNAMICALLY VARIABLE POWER LIMIT
An integrated circuit having a dynamically variable power limit is provided. The integrated circuit comprises power management logic operable to receive notification of a dynamically set power... |
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US20110154076 |
TIME NEGOTIATION USING SERIAL VOLTAGE IDENTIFICATION COMMUNICATION
According to some embodiments, a method and system are provided to initiate communication at an integrated circuit that is electrically coupled to a plurality of voltage regulators, determine a... |
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US20130117594 |
CONFIGURABLE THERMAL AND POWER MANAGEMENT FOR PORTABLE COMPUTERS
Improved approaches to providing thermal and power management for a computing device are disclosed. These approaches facilitate intelligent control of a processor's clock frequency and/or a fan's... |
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US20130086401 |
CONFIGURABLE THERMAL AND POWER MANAGEMENT FOR PORTABLE COMPUTERS
Improved approaches to providing thermal and power management for a computing device are disclosed. These approaches facilitate intelligent control of a processor's clock frequency and/or a fan's... |
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US20140215241 |
COMPUTER POWER MANAGEMENT
A power management module can select one of a plurality of different operational modes for a hardware component in a computer system based on application performance and total computer system... |
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US20140372778 |
SERVER BACKPLANE
A server backplane includes a circuit board, a first connector, a second connector, a power connector, a plurality of hard disk drive interfaces to be coupled to HDDs, a HDD controller interface,... |
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US20120084588 |
VOLTAGE REGULATOR WITH DRIVE OVERRIDE
Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock... |
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US20090217068 |
Structure For Detecting Clock Gating Opportunities In A Pipelined Electronic Circuit Design
A design structure for a pipeline electronic processor device may be embodied in a machine readable medium for designing, manufacturing or testing a processor integrated circuit. The design... |
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US20140068298 |
SYSTEM AND PROCESS FOR ACCOUNTING FOR AGING EFFECTS IN A COMPUTING DEVICE
Embodiments of the claimed subject matter are directed to methods and systems that allow tracking and accounting of wear and other aging effects in integrated circuits and products which include... |
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US20120198257 |
MULTIPROCESSOR
Timers #0 through #3 are each supplied with a period for prohibiting a change in a power supply voltage. An OS #A or an OS #B determines necessity to change an operating frequency for a CPU core... |
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US20150177824 |
DYANAMICALLY ADAPTING A VOLTAGE OF A CLOCK GENERATION CIRCUIT
In one embodiment, a processor includes a plurality of functional units each to independently execute instructions and a clock distribution circuit having a clock signal generator to generate a... |
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US20120066530 |
Configurable Power Switch Cells and Methodology
In one embodiment, a configurable power switch cell methodology may include designing multiple power switch cells which may be assembled to form a set of power switches such as a power switch... |
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US20130061077 |
Power Management For A System On A Chip (SoC)
In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU) of a system on a chip (SoC) to... |
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US20110099400 |
METHOD AND SYSTEM THEREOF FOR OPTIMIZATION OF POWER CONSUMPTION OF SCAN CHAINS OF AN INTEGRATED CIRCUIT FOR TEST
Scan blocks with scan chains are used to partition and test semiconductor devices using scan groups. The partitioning of the semiconductor device enables testing of all elements within each scan... |
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US20130080809 |
SERVER SYSTEM AND POWER MANAGING METHOD THEREOF
A server system and a power management method thereof are provided. The method includes following steps: detecting an utilization corresponding to at least one CPU in a specific node so as to... |
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US20150074436 |
In-Kernel CPU Clock Boosting on Input Event
One embodiment provides a method to wake an electronic device having a central processing unit (CPU) from an idle condition. The method includes creating a worker queue in an interrupt-request... |
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US20070250728 |
Work Based Clock Management for Display Sub-System
A system and method for enabling or disabling clocks to one or more portions of hardware circuitry, for example a display sub-system of a personal computer. A processor generates a command or data... |
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US20120144219 |
Method of Making Power Saving Recommendations in a Server Pool
A method, system and computer-usable medium are disclosed for optimizing the power consumption of a plurality of information processing systems. Historical usage data representing power usage of a... |
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US20140053008 |
METHOD AND SYSTEM FOR AUTOMATIC CLOCK-GATING OF A CLOCK GRID AT A CLOCK SOURCE
A system and method for power management by performing clock-gating at a clock source. In the method a critical stall condition is detected within a clocked component of a core of a processing... |
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US20140115361 |
LOAD STEP MANAGEMENT
Various embodiments of the present disclosure are directed to managing load steps caused by processing circuitry. The processing circuitry may generate a series of clock pulses at an average clock... |
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US20050251698 |
Cuttable illuminated panel
An illumination apparatus is provided having a panel including a plurality of circuit units on a dielectric surface. The circuit units include electrically conductive traces and at least one light... |
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US20100017634 |
DUAL-MODE COMMUNICATION APPARATUS AND POWER MANAGEMENT METHOD THEREOF
A dual-mode communication apparatus and a method thereof are provided. The dual-mode communication apparatus comprises a microprocessor, a first tick generator, a second tick generator, and an... |
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US20130124891 |
EFFICIENT CONTROL OF POWER CONSUMPTION IN PORTABLE SENSING DEVICES
The various embodiments of the invention relate generally to portable devices and systems, including wearable devices, that include sensors that are used for sensing the physiological, emotional... |
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US20150169025 |
EFFICIENT INTEGRATED SWITCHING VOLTAGE REGULATOR
Described herein is an integrated circuit which comprises: a switching voltage regulator (SVR), having one or more bridge drivers, to provide regulated power supply to a plurality of power... |
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US20120030488 |
METHOD AND APPARATUS FOR INDICATING MULTI-POWER RAIL STATUS OF INTEGRATED CIRCUITS
Methods and apparatus provide for indicating multi-power rail status of integrated circuits by taking into account a clock signal provided by, for example, core logic, in addition to considering... |
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US20130007492 |
TIMER INTERRUPT LATENCY
An indication that a subsystem is about to enter an idle state is received, and an original fire time for a next timer interrupt is determined. An idle state for a subsystem is selected based on... |
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US20140215242 |
Wearable Device-Aware Supervised Power Management for Mobile Platforms
Methods, systems, and computer program products are provided for supervised power management between a primary platform and a secondary platform. Communication between a primary platform and a... |
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US20130205147 |
BATTERY DISCHARGING METHOD
A battery discharging method for a computer system is disclosed. The battery discharging method is to detect a first detection value relative to a first status of a battery of the computer system... |
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US20120042313 |
SYSTEM HAVING TUNABLE PERFORMANCE, AND ASSOCIATED METHOD
A system having tunable performance includes: a plurality of units, wherein at least one unit includes a hardware circuit; at least one global/local busy level detector including at least one... |
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US20130179712 |
All-in-one Computer and Power Management Method thereof
An all-in-one computer includes a display module and a host provided in a housing of the display module. The host includes a power module, a cell module and a circuit board electrically connected... |
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US20140331067 |
PORTABLE ELECTRONIC DEVICE
A portable electronic device is provided. The portable electronic device includes a host, a power adapter and a signal transmission interface. The host generates state information according to... |
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US20090119523 |
Managing Power Consumption Based on Historical Average
In one embodiment, an upper power limit and an average power limit are specified for each server of a computer system. Power to each server is controlled so that the instantaneous power... |
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US20150019891 |
CONTROLLING POWER CONSUMPTION IN MULTI-CORE ENVIRONMENTS
Systems and methods of enabling modulation of a frequency of a first core in a multi-core environment include logic to determine a power limit assigned to the first core, logic to determine a... |
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US20120089853 |
HIGH SPEED NETWORK INTERFACE WITH AUTOMATIC POWER MANAGEMENT WITH AUTO-NEGOTIATION
A power management circuit for managing power of a network interface is provided. The network interface includes a medium interface unit coupled to a network media supporting at least a high speed... |
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US20090106572 |
Microcomputer system
A sub-microcomputer having a sub-CPU and a power supply control section that controls the power supply to a main microcomputer is disposed in addition to the main microcomputer having a main CPU.... |
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US20100318822 |
ENERGY SAVING IN SYSTEMS-ON-CHIP
A System-on-Chip may include initiators, targets exchanging information with the initiators, and a control module. The control module may be configured to selectively set to one of different... |
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US20140082387 |
Method and Apparatus for Controlling Central Processing Unit
A method for controlling a central processing unit (CPU), where the method includes: acquiring a usage rate and an operating frequency of one CPU of operating CPUs; if the operating frequency of... |
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US20080178024 |
Multilayered bus system
The present invention provides a multilayered bus system capable of performing transition to a power-saving mode reliably and rapidly. When a mode designation signal for designating the... |
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US20070043964 |
Reducing power consumption in multiprocessor systems
Techniques that may be utilized in a multiprocessor system to reduce power consumption are described. In one embodiment, one or more internal components of a processor core are clocked at least... |
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US20140351615 |
INTEGRATED CIRCUIT WAKE-UP CONTROL SYSTEM
An integrated circuit (IC) that operates in high and low power modes includes high and low power regulators, first and second sets of circuits, a switch connecting the high power regulator and the... |
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US20110022864 |
REAL-TIME CLOCK
A real-time clock circuit, comprising: an oscillator; and a counter, coupled to an output of the oscillator, for generating a real-time clock value. In a first mode the oscillator is configured to... |
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US20100318823 |
COMPUTER AND CONTROL METHOD THEREOF
A computer includes a CPU and a system unit, and further includes a power source, a system driving power generator which converts source power input from the power source to be outputted to the... |
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US20110029795 |
DEVICE FOR POWERING AN ELECTRONIC CIRCUIT, IN PARTICULAR A DIGITAL CIRCUIT, AND ASSOCIATED METHOD
A device for powering an electronic circuit that applies at least a first voltage or a second voltage, different from the first voltage, to the electronic circuit. The device includes a... |
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US20090271646 |
Power Management Using Clustering In A Multicore System
A multi-core system including cores and voltage sources supplying power to the cores. The cores are divided into clusters based on the particular voltage source supplying power to each core. Power... |
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US20140370940 |
BATTERY CONTROL SYSTEM, BATTERY PACK, ELECTRONIC DEVICE AND CHARGER
A plurality of battery cells (100) are connected in series to each other. A temperature measurement unit (300) measures temperatures of two or more battery cells (100). A battery control unit... |
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US20100241884 |
Power Adjustment Based on Completion Times in a Parallel Computing System
A method, apparatus, and program product optimize power consumption in a parallel computing system that includes a plurality of computing nodes by selectively throttling performance of selected... |