Matches 1 - 18 out of 18


Match Document Document Title
US20090077348 Providing a dedicated communication path for compliant sequencers  
In one embodiment, the present invention includes a method for communicating an assertion signal from a first instruction sequencer to a plurality of accelerators coupled to the first instruction...
US20090006810 MECHANISM TO SUPPORT GENERIC COLLECTIVE COMMUNICATION ACROSS A VARIETY OF PROGRAMMING MODELS  
A system and method for supporting collective communications on a plurality of processors that use different parallel programming paradigms, in one aspect, may comprise a schedule defining one or...
US20070239967 High-performance RISC-DSP  
A DSP superscalar architecture employing dual multiply accumulate pipelines. Dual MAC pipelines allow for a seamless transition between established RISC instruction sets and extended DSP...
US20090172354 HANDSHAKING DUAL-PROCESSOR ARCHITECTURE OF DIGITAL CAMERA  
A handshaking dual-processor architecture of a digital camera includes a microprocessor and a digital signal processor (DSP). After accepting a user command, the microprocessor transmits a wakeup...
US20060277393 Multi-image-source document camera  
A document camera is used to show image picked up from an object and/or image received from an external apparatus such as a computer on an image display. In the document camera, an image sensing...
US20080016321 Interleaved hardware multithreading processor architecture  
An architecture for a digital signal processor alleviates the difficulties and complexities normally associated with writing and optimizing programs to avoid stalls during which one instruction...
US20150193238 METHODS AND SYSTEMS FOR OPTIMALLY SELECTING AN ASSIST UNIT  
Methods, apparatuses, and systems that allow a microprocessor to optimally select an assist unit (co-processor) to reduce completion times for completing processing requests to execute functions....
US20080282064 System and Method for Speculative Thread Assist in a Heterogeneous Processing Environment  
A system and method for speculative assistance to a thread in a heterogeneous processing environment is provided. A first set of instructions is identified in a source code representation (e.g., a...
US20110099352 Automatic control of multiple arithmetic/logic SIMD units  
There is provided a method of performing single instruction multiple data (SIMD) operations. The method comprises storing a plurality of arrays in memory for performing SIMD operations thereon;...
US20110022652 DIGITAL SIGNAL PROCESSOR CLUSTERING IN INTEGRATED MEDIA-SERVICES GATEWAYS  
A Digital Signal Processor (DSP) cloud architecture for clustering DSP resources across multiple integrated media-services gateways. The control plane components use peer-to-peer overlay...
US20100332797 INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR INFORMATION PROCESSING APPARATUS, AND PROGRAM  
An information processing apparatus includes a first processing unit, a second processing unit which is different from the first processing unit, a supply unit configured to supply a clock to the...
US20100274989 ACCELERATING TRACEBACK ON A SIGNAL PROCESSOR  
A method executed by an instruction set on a processor is described. The method includes providing a tbbit instruction, inputting a first index for the tbbit instruction, loading a second value...
US20160328358 MULTIPROCESSOR PIPELINE ARCHITECTURE  
Exemplary embodiments for a multiprocessor pipeline architecture that converts signals from sequencing sample acquisition into sequence data, comprising: a custom coprocessor card configured to...
US20160124899 MULTI-CHIP PACKAGED FUNCTION INCLUDING A PROGRAMMABLE DEVICE AND A FIXED FUNCTION DIE AND USE FOR APPLICATION ACCELERATION  
One or more processing functions may be off-loaded from a general-purpose processing device to auxiliary processing devices. The auxiliary processing devices may include a programmable element and...
US20160012010 METHOD, APPARATUS AND SYSTEM FOR MODULAR ON-DIE COHERENT INTERCONNECT  
In an embodiment, an apparatus comprises: a first component to perform coherent operations; and a coherent fabric logic coupled to the first component via a first component interface. The coherent...
US20150220482 CONTEXT CONFIGURATION  
Certain examples described herein relate to configuring a call control context in a media gateway. The media gateway has a set of digital signal processors, each having one or more digital signal...
US20110246749 DYNAMIC ENERGY SAVINGS FOR A DIGITAL SIGNAL PROCESSOR MODULE  
In an example embodiment, there is described herein an apparatus comprising an interface for communicating with a plurality of digital signal processors and logic operable to send and receive data...
US20110099398 INTEGRATED CIRCUIT AND ELECTRONIC APPARATUS  
An integrated circuit includes a main processing unit, a peripheral connection port for connecting a peripheral device, and an auxiliary processing unit configured to control the peripheral...

Matches 1 - 18 out of 18