Matches 1 - 35 out of 35


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US20090119631 Variability-Aware Asynchronous Scheme for High-Performance Delay Matching  
A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation...
US20050091025 Methods and systems for improved integrated circuit functional simulation  
Methods and systems for performing symbolic simulation, including techniques for translating a conventional simulation into a symbolic simulation, for handling wait and delay states, and for...
US20050010460 Facilities control system and method of controlling facilities  
In an aspect of the present invention, a facilities control system includes a simulation section which carries out a simulation of a time change of a status of an object of a target based on a...
US20090012770 CIRCUIT SIMULATION  
A system, method, and apparatus select state variables for, build state equations of, and simulate time-domain operation of an electronic circuit. The circuit is modeled with three branch types...
US20090171646 METHOD FOR ESTIMATING POWER CONSUMPTION  
A method for determining system and software configuration that includes: calculating a power consumption estimate of a modeled system associated with an execution of a certain software code; and...
US20060080626 Visualization method and apparatus for logic verification and behavioral analysis  
A logic verification tool detects and flags a logic operation with high probability to cause a fault in an electronic system. An efficient logic debug method utilizes a partial sequence of signal...
US20070074141 Simulation apparatus and simulation method  
According to an aspect of the invention, a simulation apparatus includes: a computer configured to execute a program which is formed as an operating description having no temporal restriction; and...
US20070101302 Mixed signal circuit simulator  
The waveform created by a circuit simulator is selected. The input data 11 inputted by an inputting means are obtained for a point on the waveform or the waveform. The selected waveform and the...
US20080281572 INTEGRATED CIRCUIT (IC) DESIGN METHOD AND METHOD OF ANALYZING RADIATION-INDUCED SINGLE-EVENT UPSETS IN CMOS LOGIC DESIGNS  
A logic design tool, a tool for analyzing soft error sensitivities in logic, and a program product for logic design. A particle generator simulates events likely to occur for a given operating...
US20060247906 METHOD FOR ESTIMATING CLOCK JITTER FOR STATIC TIMING MEASUREMENTS OF MODELED CIRCUITS  
A method in accordance with the invention for modeling period jitter for testing a modeled logic circuit. Clock signals can be derived from a phase lock loop having a voltage controlled oscillator...
US20090193225 SYSTEM AND METHOD FOR APPLICATION SPECIFIC ARRAY PROCESSING  
A processing architecture and methods therein for building application specific array processing utilizing a sequential data bus for control and data propagation. The methods of array processing...
US20060156264 Method and apparatus for supporting verification of system, and computer product  
In a verification support apparatus, an input unit accepts input of an unverified specification description representing an unverified design object constituted by unverified model elements. A...
US20110178789 RESPONSE CHARACTERIZATION OF AN ELECTRONIC SYSTEM UNDER VARIABILITY EFFECTS  
A method and device for performing a characterization of a description of the composition of an electronic system in terms of components used are disclosed. Performances of the components are...
US20090192777 Method for Estimating a Noise Generated in an Electronic System and Related Method for Testing Noise Immunity  
The invention concerns a method for testing immunity to noise derived from interferences between components in a mixed analogic and digital electronic system. The method comprises determining by...
US20080208557 SIMULATION METHOD AND SIMULATION SYSTEM  
A simulation executing unit 1, an execution list forming unit 2, and an execution list 3 are prepared. The simulation executing unit 1 does not execute all of function models 4 every cycle, but...
US20080195368 METHOD, SYSTEM AND PROGRAM PRODUCT FOR SELECTIVELY REMOVING INSTRUMENTATION LOGIC FROM A SIMULATION MODEL  
According to a method of simulation processing, a simulation model is received that includes a plurality of design entity instances modeling a digital system and one or more instrumentation entity...
US20070113210 Method and apparatus for supporting verification, and computer product  
In gates, a gate length is same as that of an isolated Poly on a layout, however, is different from that of the isolated Poly on an actual silicon wafer. When the distance between the gates that...
US20060190234 Property generating method, verification method and verification apparatus  
When a property for verifying a logic system is generated, a list of corresponding events is generated from specifications that the logic system should meet, an event of an undefined state in a...
US20100070257 Methods, Systems, and Computer Program Products for Evaluating Electrical Circuits From Information Stored in Simulation Dump Files  
Disclosed are methods, systems, and computer program products for evaluating performance aspects of electrical circuits, and particularly digital logic circuits. An exemplary method comprises...
US20080005709 VERIFICATION OF LOGIC CIRCUITS USING CYCLE BASED DELAY MODELS  
Methods and systems for verifying a logic circuit. In one embodiment, delay models based on clock cycles are developed and incorporated into the logic circuit so that timing considerations may be...
US20100269074 Predictive Power Management Semiconductor Design Tool and Methods for Using Such  
Various embodiments of the present invention provide systems and methods for improved semiconductor design. For example, various embodiments of the present invention provide methods for...
US20050251766 Circuit design interface  
According to an example embodiment of an approach to circuit design processing involves using an interface for retrieving and processing circuit design data for use by a plurality of simulation...
US20110218791 System for Simulating Processor Power Consumption and Method of the Same  
The present invention provides a method for simulating processor power consumption, the method comprises: simulating a simulated processor; utilizing a power analysis model to analyze the...
US20090112558 METHOD FOR SIMULTANEOUS CIRCUIT BOARD AND INTEGRATED CIRCUIT SWITCHING NOISE ANALYSIS AND MITIGATION  
A method and a design structure. The method includes: generating a board model of a circuit board design; generating a impedance spectrum of the board model; generating a chip model of an...
US20090164181 Apparatus and Method for Modeling MOS Transistor  
Disclosed are an apparatus and a method for modeling a MOSFET (Metal-Oxide Semiconductor Field Effect Transistor). The method includes establishing an equation and a variable that determine the...
US20080127006 Real-Time Data Stream Decompressor  
Method, system, and program product for expanding the effective capacity of embedded memory by storing data in a compressed form and reading the data out with subsequent data decompression,...
US20060277020 A reconfigurable system for verification of electronic circuits using high-speed serial links to connect asymmetrical evaluation and canvassing instruction processors  
A reconfigurable scalable system for verifying electronic circuit designs in anticipation of fabrication by compiling a hardware description to instructions for canvassing processors and...
US20050251767 Processing of circuit design data  
One example embodiment of an approach to circuit design analysis comprises partitioning a circuit design into first, second and boundary parts, the boundary part including circuit portions from...
US20050177357 Static timing model for combinatorial gates having clock signal input  
A method of modeling a combinatorial gate which includes providing a data signal input at the combinatorial gate, providing a clock signal input at the combinatorial gate, propagating the clock...
US20050038640 Method and apparatus for automatically testing the design of a simulated integrated circuit  
A method and apparatus for automatically testing the design of a simulated integrated circuit containing a network of flip-flops. The network is put into a reset state and each flip-flop is tested...
US20090222253 System and Method for Switch-Level Linear Simulation Using Verilog  
A method for rapidly simulating combined analog circuits and digital circuits includes separating the combined circuits into a linear sub-network and logic sub-network. Shared nodes, shared by the...
US20050228629 Method and a processor for parallel processing of logic event simulation  
A method and a processor for parallel processing of logic event simulation on circuits comprising a polarity of logic gates, the logic gates having interconnect lines therebetween, the processor...
US20090094014 Software System For Binding Model Data To View Components  
A flexible method of mapping view components to data model objects in an object oriented system. The mapping manages navigating the data model graph to access data needed by the view component and...
US20080262819 Programmable Logic Array for Schedule-Controlled Processing  
The electronic data processing circuit targets the emulation of a logic function. The circuit includes a single clock providing time unit signals, a programmable synchronous logic array for...
US20080127007 METHOD TO COMBINE ADDRESS ANONYMOUS HASH ARRAY WITH CLOCK, DATA PACK AND BIT ANONYMOUS ARRAYS TO GATHER DATA OF REGISTERS  
A method and system for combining address anonymous hash arrays with clock, datapack and bit anonymous arrays to gather data of registers is disclosed. The method includes receiving a set of...

Matches 1 - 35 out of 35