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US20070005327 |
DIGITAL WIRELESS BASESTATION
A digital wireless basestation is disclosed which is programmed with a hardware abstraction layer suitable for enabling one or more baseband processing algorithms to be represented using high... |
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US20090199145 |
Method for Accounting for Process Variation in the Design of Integrated Circuits
A method to simulate an electronic circuit includes determining process parameters and a process variation for each process parameter, and determining a value for each of a plurality of components... |
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US20050049843 |
Computerized extension apparatus and methods
Apparatus and methods for integrated circuit (IC) design, including the configuration and addition of extensions to the design. In one exemplary embodiment, a computer program rendered in an... |
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US20140095138 |
CHECKING FOR HIGH BACK-BIAS IN LONG GATE-LENGTH, HIGH TEMPERATURE CASES
A method for checking for reliability problems includes simulating a circuit having at least one MOS transistor that includes a first MOS transistor. Based on the results of this simulation of the... |
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US20090299716 |
Hot-Carrier Device Degradation Modeling and Extraction Methodologies
The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of... |
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US20090236701 |
Chip arrangement and a method of determining an inductivity compensation structure for compensating a bond wire inductivity in a chip arrangement
A chip arrangement is disclosed. The chip arrangement includes a first chip, a first bond wire having an inductive element and coupled with the first chip at its one end and an inductivity... |
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US20130278183 |
LOAD FILTERS FOR MEDIUM VOLTAGE VARIABLE SPEED DRIVES IN ELECTRICAL SUBMERSIBLE PUMP SYSTEMS
A medium voltage drive for driving a motor of an electric submersible pump can include inverter circuitry that includes an output for output of power and a load filter connected to the output that... |
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US20140095139 |
HOT-CARRIER INJECTION RELIABILITY CHECKS BASED ON BACK BIAS EFFECT ON THRESHOLD VOLTAGE
A method for checking for reliability problems that includes simulating a circuit having at least one MOS transistor. The circuit includes at least a first MOS transistor. Based on the results of... |
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US20140095140 |
BIAS-TEMPERATURE INSTABILITY RELIABILITY CHECKS BASED ON GATE VOLTAGE THRESHOLD FOR RECOVERY
A method of determining a saturation current degradation that includes measuring, for a MOS integrated circuit fabrication process, a first dependence of a saturation current (Idsat) degradation... |
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US20100030546 |
GUI-FACILITATED SIMULATION AND VERIFICATION FOR VEHICLE ELECTRICAL/ELECTRONIC ARCHITECTURE DESIGN
Disclosed herein are computer aided design (CAD) techniques to implement a unified data schema and graphical user interface (GUI) to link ECU/devices, in-vehicle communications, and vehicle... |
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US20130138248 |
THOUGHT ENABLED HANDS-FREE CONTROL OF MULTIPLE DEGREE-OF-FREEDOM SYSTEMS
Systems and methods are provided for controlling a multiple degree-of-freedom system. Plural stimuli are provided to a user, and steady state visual evoked response potential (SSVEP) signals are... |
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US20070162268 |
Algorithmic electronic system level design platform
A computing system and method are provided for algorithmic electronic system level design. An exemplary system comprises a plurality of databases for storing a plurality of functional models, a... |
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US20080091402 |
Methods for estimating power requirements of circuit designs
One embodiment of the present invention is a method for estimating a power requirement of a circuit design that includes: (a) selecting a set of targeted Energy Arcs and/or Power Arcs; (b)... |
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US20130179142 |
DISTRIBUTED PARALLEL SIMULATION METHOD AND RECORDING MEDIUM FOR STORING THE METHOD
Provided is a distributed parallel simulation method. In the method, a plurality of local simulations is executed in parallel for a plurality of local design objects, respectively. The local... |
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US20080147371 |
User Defined Virtual Instruments in a Simulation Environment
A system and method for developing a virtual instrument for a simulation environment. First user input may be received to a graphical user interface (GUI) specifying functionality of the virtual... |
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US20050240386 |
Method and system for interactive modeling of high-level network performance with low-level link design
A method and system for interactive modeling of high-level network performance with low-level link design provides a tool for optimizing networked computing systems and their link components... |
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US20080306721 |
Dynamic-Verification-Based Verification Apparatus Achieving High Verification Performance and Verification Efficiency and the Verification Methodology Using the Same
The present invention relates to a simulation-based verification apparatus and a verification method, which enhance the simulation performance and efficiency greatly, for verifying a digital... |
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US20060036980 |
Method and apparatus for jitter analysis and program therefor
A method, an apparatus and a program for comprehensively analyzing the power supply noise and consequent jitter for external output signals of the LSI in real time. From LSI layout designing data... |
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US20130226535 |
CONCURRENT SIMULATION SYSTEM USING GRAPHIC PROCESSING UNITS (GPU) AND METHOD THEREOF
A concurrent circuit simulation system simulate analog and mixed mode circuit using by exploiting parallel execution in one or more graphic processing units. In one implementation, the concurrent... |
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US20080120082 |
Transaction Co-Validation Across Abstraction Layers
A method, apparatus, and system in which a modeling tool made up of a testbench executable program validates behavior of one or more sub-components of an electronic system design modeled as one or... |
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US20140052430 |
Partitionless Multi User Support For Hardware Assisted Verification
Embodiments of the disclosed technology are directed toward facilitating the concurrent emulation of multiple electronic designs in a single emulator without partition restrictions. In certain... |
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US20090119084 |
SYSTEM, METHOD, AND PROGRAM PRODUCT FOR SIMULATING TEST EQUIPMENT
A simulation system includes a Response database for storing Response Data in which an output result of a device-under-test (DUT) model for a predetermined test item is set, and a framework for... |
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US20060235673 |
Radio communication network cell configuration model optimization device
A device is dedicated to optimizing configuration models of cells of a radio communication network. The optimization device comprises processor means adapted to analyze configuration data... |
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US20140379321 |
METHOD AND SYSTEM FOR SIMULATING POWER LINE CARRIER COMMUNICATION SYSTEM
The present invention relates to the field of power line carrier communication simulation technology, and more particularly to a method and system for simulating power line carrier communication... |
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US20080021689 |
Method for designing semiconductor integrated circuit and method of circuit simulation
By using, as a model expression, an expression showing an inverse proportion between a change rate ΔIdsat/Idsat of saturated current value and a product of a gate protrusion length E1 and a gate... |
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US20110191774 |
NOC-CENTRIC SYSTEM EXPLORATION PLATFORM AND PARALLEL APPLICATION COMMUNICATION MECHANISM DESCRIPTION FORMAT USED BY THE SAME
Network-on-Chip (NoC) is to solve the performance bottleneck of communication in System-on-Chip, and the performance of the NoC significantly depends on the application traffic. The present... |
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US20080040089 |
Efficient Characterization of High-Speed Circuits
Input parameters for a circuit that is to be characterized are provided. A characteristic of the circuit is determined. A simulated output parameter of the circuit is determined using a supervised... |
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US20070005322 |
System and method for complex programmable breakpoints using a switching network
Hardware logic for generating breakpoint signals (basic events) based on state changes in observed (“tagged”) hardware resource of a design under test is automatically generated and added to the... |
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US20160283629 |
COMPLEXITY-REDUCED SIMULATION OF CIRCUIT RELIABILITY
A system and method for simulating an electronic circuit is disclosed. The method includes creating a finite set of circuit or device parameter points selected from within an n-dimensional... |
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US20070005323 |
System and method of automating the addition of programmable breakpoint hardware to design models
Hardware logic for generating breakpoint signals based on state changes in observed (“tagged”) hardware resource of a design under test is automatically generated and added to the simulation model... |
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US20110301932 |
MOSFET MODEL OUTPUT APPARATUS AND METHOD, AND RECORDING MEDIUM
In one embodiment, a MOSFET model output apparatus is configured to output a MOSFET model for a simulation of a semiconductor circuit. The apparatus includes a shape data input part configured to... |
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US20080004855 |
DESIGN SUPPORT APPARATUS, DESIGN SUPPORT METHOD, AND DESIGN SUPPORT PROGRAM
A design support apparatus comprises: an experiment plan section 11 that selects a combination of design parameter values by allocating the design parameter values to an orthogonal table; a... |
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US20070005324 |
Method and apparatus for simulating circuits using s-parameters
An arrangement is provided for using s-parameters to obtain characteristics of a device under test (“DUT”) between a number of selected observation locations. The DUT may be represented by a... |
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US20050273309 |
Circuit simulation method, device model, and simulation circuit
A plurality of elements constituting a semiconductor integrated circuit to be designed are each converted to a device model which merges an electric model exhibiting electric characteristics of... |
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US20050149884 |
System and method for coevolutionary circuit design
The present invention is directed to a system and method for coevolutionary circuit design. A system suitable for providing integrated circuit design may include a memory suitable for storing a... |
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US20150286232 |
VOLTAGE REGULATION CIRCUIT
A circuit may include a low-dropout (LDO) voltage regulator. The LDO voltage regulator may include an output coupled to a supply of a load circuit. The LDO voltage regulator may be configured to... |
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US20140278328 |
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR CONSTRUCTING A DATA FLOW AND IDENTIFYING A CONSTRUCT
A system, method, and computer program product are provided for creating a hardware design. In use, one or more parameters are received, where at least one of the parameters corresponds to an... |
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US20140236561 |
EFFICIENT VALIDATION OF COHERENCY BETWEEN PROCESSOR CORES AND ACCELERATORS IN COMPUTER SYSTEMS
A method of testing cache coherency in a computer system design allocates different portions of a single cache line for use by accelerators and processors. The different portions of the cache line... |
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US20110313748 |
METHOD OF SIMULATION AND DESIGN OF A SEMICONDUCTOR DEVICE
The invention relates to a method of simulation of semiconductor devices, such as wide-bandgap devices. The method employs a device substitution technique and involves simulation of a device which... |
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US20160217240 |
Methodology Of Incorporating Wafer Physical Measurement With Digital Simulation For Improving Semiconductor Device Fabrication
A hot spot methodology incorporates wafer physical measurement with digital simulation for identifying and monitoring critical hot spots. Wafer physical data are collected from the processed wafer... |
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US20090138253 |
HARNESS DESIGN APPARATUS
First, the position and the length of a harness are set. Next, a shape setting function having an unknown variable that minimizes potential energy as a binding position is generated, and a... |
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US20130275111 |
NOISE ANALYSIS DESIGNING METHOD
To provide a simulation technology of ending multiphysics analysis on heat, vibration, and EMC within a practical time and with a low-price computation process at an early stage of product... |
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US20090248384 |
PROCESS CONTROL SYSTEM IN AN AUTOMATION INSTALLATION
A process control system is disclosed in an automation installation having field devices which are networked by means of a system bus and which can be operated using associated system control... |
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US20080140379 |
Approximations for simulations of systems
Approximations for previewer-based decomposition are disclosed. In one embodiment, the previewer uses only resistors, capacitors, and controlled sources. Thus, at least some circuit elements that... |
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US20120016652 |
SYSTEM AND METHOD FOR FAST POWER GRID AND SUBSTRATE NOISE SIMULATION
Systems and methods related to fast simulation of power supply networks and identification of a set of extrema (e.g., maxima or minima) waveforms associated with the power supply networks. In... |
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US20080126064 |
METHOD FOR SIMULATING CIRCUIT RELIABILITY AND SYSTEM THEREOF
A method and a system for simulating circuit reliability are provided. The method and the system calculate a variation of a device parameter of a thin-film transistor after the thin-film... |
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US20080046225 |
COMPRESSION AND COMPRESSED INVERSION OF INTERACTION DATA
A compression technique compresses interaction data. A fast method processes the compressed data without the need to first decompress the data. In one embodiment, the compression technique is used... |
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US20060142987 |
Circuit simulation method and circuit simulation apparatus
A circuit simulation apparatus and a modeling method are provided which are useful to design an integrated circuit in a very fine manner by forming a model of such a transistor that widths of... |
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US20110035203 |
SYSTEM LEVEL POWER EVALUATION METHOD
This invention relates to a system level power evaluation method in which detailed power macro-models (PMM) are created for operations of modules. These PMMs are stored in memory. A system level... |
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US20100180245 |
METHODS AND PRODUCTS FOR DETERMINING AND VISUALIZIN IC BEHAVIOR
A method (100) is disclosed for determining the behaviour of an integrated circuit comprising a plurality of resources and being configured to execute a plurality of operations that each require... |