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US20120276747 PREVENTION OF LINE BENDING AND TILTING FOR ETCH WITH TRI-LAYER MASK  
A method for etching features in an etch layer is provided. An organic mask layer is etched, using a hard mask as an etch mask. The hard mask is removed, by selectively etching the hard mask with...
US20140357080 METHOD FOR PREFERENTIAL SHRINK AND BIAS CONTROL IN CONTACT SHRINK ETCH  
A method for providing a shrink etch in which the features to be etched in a target layer have major and minor dimensions with the major dimension larger than the minor dimension. In the shrink...
US20070249175 Pitch-shrinking technologies for lithographic application  
Two pitch-shrinking technologies are invented, which allow us to further reduce the pitch size significantly smaller than the minimum feature size resolvable with any conventional lithographic...
US20140051256 ETCH WITH MIXED MODE PULSING  
A method for etching a dielectric layer disposed below a patterned organic mask with features, with hardmasks at bottoms of some of the organic mask features is provided. An etch gas is provided....
US20140187050 METHOD FOR ISOTROPIC ETCHING  
According to one embodiment, the invention relates to a method for the anisotropic etching of patterns in at least one layer to be etched through a hard mask comprising carbon in an...
US20050272265 Dual damascene integration structure and method for forming improved dual damascene integration structure  
Methods for forming a dual damascene dielectric structure in a porous ultra-low-k (ULK) dielectric material by using gas-cluster ion-beam processing are disclosed. These methods minimize hard-mask...
US20070281491 Residue free hardmask trim  
A method for forming features in a polysilicon layer is provided. A hardmask layer is formed over the polysilicon layer. A photoresist mask is formed over the hardmask layer. The hardmask layer is...
US20100297850 SELECTIVE SELF-ALIGNED DOUBLE PATTERNING OF REGIONS IN AN INTEGRATED CIRCUIT DEVICE  
A selective self-aligned dual patterning method. The method includes performing a single lithography operation to form a patterned mask having a narrow feature in a region of a substrate that is...
US20070215911 Magnetic tunnel junction patterning using Ta/TaN as hard mask  
An MTJ MRAM cell is formed by using a reactive ion etch (RIE) to pattern an MTJ stack on which there has been formed a bilayer Ta/TaN hard mask. The hard mask is formed by patterning a masking...
US20070105390 Oxygen depleted etching process  
A method for oxygen depleted plasma etching and mixed mode plasma etching are disclosed. The method includes using an oxygen free etch plasma or a substantially oxygen free etch plasma at a high...
US20060276043 Method and systems for single- or multi-period edge definition lithography  
Methods and systems for multiperiod, edge definition lithography are disclosed. According to one method, a first material is isotropically deposited on a substrate and on a field mesa also located...
US20090197422 REDUCING DAMAGE TO LOW-K MATERIALS DURING PHOTORESIST STRIPPING  
A method of forming features in a porous low-k dielectric layer disposed below a patterned organic mask is provided. Features are etched into the porous low-k dielectric layer through the...
US20150004795 PLASMA ETCHING METHOD AND PLASMA ETCHING APPARATUS  
A groove shape can be improved. A plasma etching method includes plasma-processing a photoresist film that is formed on a mask film and has a preset pattern; exposing an organic film formed under...
US20060105578 HIGH-SELECTIVITY ETCHING PROCESS  
The present invention provides a high-selectivity etching process for fabricating openings for a contact structure or a dual damascene structure in combination with a Si-rich silicon oxynitride...
US20150179511 Curing Photo Resist for Improving Etching Selectivity  
A method includes exposing and developing a negative photo resist, and performing a treatment on the negative photo resist using an electron beam. After the treatment, a layer underlying the photo...
US20080057705 TECHNIQUE FOR REDUCING PLASMA-INDUCED ETCH DAMAGE DURING THE FORMATION OF VIAS IN INTERLAYER DIELECTRICS  
By forming a conductive material within an etch mask for an anisotropic etch process for patterning openings, such as vias, in a dielectric layer of a metallization structure, the probability for...
US20080254638 ETCH PROCESS WITH CONTROLLED CRITICAL DIMENSION SHRINK  
Methods to etch an opening in a substrate layer with reduced critical dimensions are described. A multi-layered mask including a lithographically patterned photoresist and an unpatterned organic...
US20150064924 METHOD FOR ETCHING ORGANIC FILM AND PLASMA ETCHING DEVICE  
In a method for etching an organic film according to an embodiment, a target object that has an organic film is set in a processing chamber. Then, a processing gas containing COS gas and O2 gas is...
US20070111467 Method for forming trench using hard mask with high selectivity and isolation method for semiconductor device using the same  
Provided are a method for forming a trench using a hard mask with high selectivity and an isolation method for a semiconductor device using the same. The method includes: forming a first hard mask...
US20120003838 PLASMA ETCHING METHOD  
Line-wiggling and striation caused by collapse of a pattern after a silicon dioxide film is etched by plasma with the use of a multilayer resist mask are prevented or suppressed. In a plasma...
US20070264835 Photodiode Array, Method For Manufacturing The Same, And The Optical Measurement System Thereof  
A photodiode array for near infrared rays that includes photodiodes having a uniform size and a uniform shape, has high selectivity for the wavelength of received light between the photodiodes,...
US20050104113 Electrode forming method, capacitor element and fabricating method therefor  
An electrode forming method includes the steps of: forming a conductive film on a substrate; forming, on the conductive film, a first mask pattern extending in a first direction; forming a...
US20140273490 METHOD FOR IMPROVING CD MICRO-LOADING IN PHOTOMASK PLASMA ETCHING  
Embodiments of the present invention provides methods to etching a mask layer, e.g., an absorber layer, disposed in a film stack for manufacturing a photomask in EUV applications and phase shift...
US20060084268 Method for production of charge-trapping memory cells  
An oxide layer, a nitride layer, and a layer of amorphous silicon are applied to a surface of a semiconductor substrate. A resist mask is applied and implantations are performed to form doped...
US20070197041 PROCESSING METHOD AND PLASMA ETCHING METHOD  
A processing method includes a silicon oxide etching process of performing a plasma etching on a target layer mainly made up of silicon, a silicon oxide layer formed on the target layer and a...
US20070093070 Triple layer anti-reflective hard mask  
A method includes forming a layer of silicon oxynitride (SiON), silicon rich nitride (SiRN) or silicon nitride (Si3N4) over a layer of semiconducting material. The method further includes forming...
US20090061638 METHOD FOR FABRICATING MICROPATTERN OF SEMICONDUCTOR DEVICE  
A method for fabricating a micropattern of a semiconductor device is provided. The method includes forming a first hard mask over an etch target layer, forming a first sacrificial layer over the...
US20080020583 PLASMA ETCHING METHOD AND COMPUTER-READABLE STORAGE MEDIUM  
In a plasma etching method, a substrate, on which an oxide film as a target layer to be etched, a hard mask layer, and a patterned photoresist are sequentially formed, is loaded into the...
US20100184300 SELF-ALIGNED MASKS USING MULTI-TEMPERATURE PHASE-CHANGE MATERIALS  
A method of forming a pattern includes forming a first layer on a substrate, forming a second layer on the first layer, depositing a multi-temperature phase-change material on the second layer,...
US20140206199 ETCHING METHOD OF MULTILAYER FILM  
In an etching method of a multilayer film including a first oxide film and a second oxide film, a high frequency power in etching an organic film is set to be higher than those in etching a first...
US20070210030 Method of patterning conductive structure  
A method of patterning a conductive structure includes providing a semiconductor substrate, forming a conductive layer on the semiconductor substrate, forming a hard mask layer on the conductive...
US20060216943 Method for forming metal line  
A method for forming a metal line is provided. The method includes: forming a metal structure with a specific grain size on a substrate; forming a first hard mask layer on the metal structure;...
US20080014755 PLASMA ETCHING METHOD AND COMPUTER-READABLE STORAGE MEDIUM  
In a plasma etching method, a plasma of a processing gas containing CxFy (x, y are integers equal to or greater than 1), a rare gas and O2 by applying a high frequency power to the upper or the...
US20110250761 PLASMA ETCHING METHOD, PLASMA ETCHING APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM  
A plasma etching method is provided to perform a plasma etching on a silicon oxide film or a silicon nitride film formed below an amorphous carbon film by using a pattern of the amorphous carbon...
US20080146037 USE OF A POROUS DIELECTRIC MATERIAL AS AN ETCH STOP LAYER FOR NON-POROUS DIELECTRIC FILMS  
Interconnect structures possessing a non-porous (dense) low-k organosilicate glass (OSG) film utilizing a porous low-k OSG film as an etch stop layer or a porous low-k OSG film using a non-porous...
US20070243714 Method of controlling silicon-containing polymer build up during etching by using a periodic cleaning step  
A method of removing a silicon-containing hard polymeric material from an opening leading to a recessed feature during the plasma etching of said recessed feature into a carbon-containing layer in...
US20050250336 Semiconductor device and method for fabricating the same  
A method of fabricating a semiconductor device includes forming a film stack having a Ti film and a metal film containing Ni sequentially deposited on a surface of a substrate of a GaN based...
US20070224827 Methods for etching a bottom anti-reflective coating layer in dual damascene application  
Methods for two step etching a BARC layer in a dual damascene structure are provided. In one embodiment, the method includes providing a substrate having vias filled with a BARC layer disposed on...
US20050233588 Semiconductor constructions  
The invention includes methods by which the size and shape of photoresist-containing masking compositions can be selectively controlled after development of the photoresist. For instance,...
US20070212886 ORGANOSILANE POLYMERS, HARDMASK COMPOSITIONS INCLUDING THE SAME AND METHODS OF PRODUCING SEMICONDUCTOR DEVICES USING ORGANOSILANE HARDMASK COMPOSITIONS  
Provided herein, according to some embodiments of the invention, are organosilane polymers prepared by reacting organosilane compounds including (a) at least one compound of Formula I...
US20100173498 TRIM PROCESS FOR CRITICAL DIMENSION CONTROL FOR INTEGRATED CIRCUITS  
Methods of etching substrates employing a trim process for critical dimension control for integrated circuits are disclosed. In one embodiment, the method of etching includes providing a first...
US20080085593 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
A method of manufacturing a semiconductor device including forming a mask layer on a polycrystalline silicon film formed on a semiconductor substrate via an insulating film; forming a dense...
US20060040502 Method for manufacturing semiconductor device  
A wiring material film is formed by depositing a first conductive barrier film, an aluminum film, and a second conductive barrier film on a semiconductor substrate in this order. An organic...
US20100248491 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING A DOUBLE PATTERNING PROCESS  
A method for performing a double pattering process of a semiconductor device is provided. The method includes forming a hard mask layer having a stack structure of a first layer, a second layer...
US20100216310 Process for etching anti-reflective coating to improve roughness, selectivity and CD shrink  
A method of dry developing an anti-reflective coating (ARC) layer on a substrate is described. The method comprises disposing a substrate comprising a multi-layer mask in a plasma processing...
US20100130019 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE  
A manufacturing method for a semiconductor device includes: forming a first layer on a member to be etched; forming a first hard mask that includes a first hard mask pattern, in the first layer;...
US20100105213 FORMING METHOD OF AMORPHOUS CARBON FILM, AMORPHOUS CARBON FILM, MULTILAYER RESIST FILM, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM  
An amorphous carbon film forming method is performed by using a parallel plate type plasma CVD apparatus in which an upper electrode and a lower electrode are installed within a processing...
US20070207620 Method of forming contacts for a memory device  
The present invention is generally directed to a method of forming contacts for a memory device. In one illustrative embodiment, the method includes forming a layer of insulating material above an...
US20160351405 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD  
A plasma processing method includes forming plasma in a processing chamber; and performing etching to a film to be processed of a film structure that has previously been disposed on an upper...
US20160172205 PLASMA ETCHING METHOD  
A plasma etching method can form a hole having a required opening diameter in a silicon nitride layer, while suppressing a tip end portion of the hole from being narrowed. The plasma etching...

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