Applications in Class 438/285

Matches 1 - 50 out of 151

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Match	Document	Document Title
1	US20140054680	METHOD OF FORMING GROUP III NITRIDE SEMICONDUCTOR, METHOD OF FABRICATING SEMICONDUCTOR DEVICE, GROUP III NITRIDE SEMICONDUCTOR DEVICE, METHOD OF PERFORMING THERMAL TREATMENT A method of forming a group III nitride semiconductor comprises: preparing a group III nitride semiconductor which contains a p-type dopant or an n-type dopant; and performing a treatment of the...
2	US20060249750	Gallium nitride material devices including an electrode-defining layer and methods of forming the same Gallium nitride material devices and methods of forming the same are provided. The devices include an electrode-defining layer. The electrode-defining layer typically has a via formed therein in...
3	US20150287598	SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME A semiconductor device employing silicon carbide, and the like are provided. In the semiconductor device, even when an electrode material and an upper electrode material are different, a problem...
4	US20130240896	SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE A method of fabricating a semiconductor device may form a nitride semiconductor layer on a substrate, form a first insulator layer on the nitride semiconductor layer by steam oxidation of ALD,...
5	US20150031183	SEMICONDUCTOR DEVICES INCLUDING SILICIDE REGIONS AND METHODS OF FABRICATING THE SAME A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode...
6	US20110006344	Method for improving transistor performance through reducing the salicide interface resistance An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned...
7	US20080272366	Field effect transistor having germanium nanorod and method of manufacturing the same A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate oxide layer formed...
8	US20080185612	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD A semiconductor device has a Si substrate, a gate insulating film over the Si substrate, a gate electrode over the gate insulating film, a source region and a drain region in the Si substrate,...
9	US20140264488	METHODS OF FORMING LOW DEFECT REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE AND THE RESULTING DEVICES One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned...
10	US20120080723	FABRICATING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATED USING THE SAME METHOD A fabricating method of a semiconductor device includes providing a substrate having a first region and a second region, forming a plurality of first gates in the first region of the substrate,...
11	US20070166928	METHOD FOR MAKING AN ELECTRONIC DEVICE INCLUDING A SELECTIVELY POLABLE SUPERLATTICE A method for making an electronic device may include forming a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable...
12	US20150235903	Self-Aligned III-V MOSFET Fabrication With In-Situ III-V Epitaxy And In-Situ Metal Epitaxy and Contact Formation A method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V...
13	US20080242032	Carbon-Doped Epitaxial SiGe A method for forming carbon-doped epitaxial SiGe of a PMOS transistor by providing a semiconductor substrate having a PMOS transistor gate stack and recess etched active regions. The method...
14	US20050006639	Semiconductor electronic devices and methods Embodiments disclosed herein include electronic device designs based upon electronic properties of Group III-N materials and quantum-mechanical effects of specialized heterostructures. Such...
15	US20140287564	Semiconductor Devices Having Shallow Junctions Semiconductor devices are provided including a substrate having a first surface and a second surface recessed from opposite sides of the first surface, a gate pattern formed on the first surface...
16	US20120187505	Self-aligned III-V MOSFET fabrication with in-situ III-V epitaxy and in-situ metal epitaxy and contact formation A method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V...
17	US20120161105	UNIAXIALLY STRAINED QUANTUM WELL DEVICE AND METHOD OF MAKING SAME A planar or non-planar quantum well device and a method of forming the quantum well device. The device includes: a buffer region comprising a large band gap material; a uniaxially strained quantum...
18	US20050277255	Compound semiconductor device and manufacturing method thereof A pad electrode of a high electron mobility transistor is formed solely of a pad metal layer without providing a gate metal layer. A high concentration impurity region is provided below the pad...
19	US20130320349	IN-SITU BARRIER OXIDATION TECHNIQUES AND CONFIGURATIONS Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer...
20	US20090302348	STRESS ENHANCED TRANSISTOR DEVICES AND METHODS OF MAKING Stress enhanced transistor devices and methods of fabricating the same are provided. In one embodiment, a transistor device comprises: a gate conductor disposed above a semiconductor substrate...
21	US20130137232	METHOD FOR FORMING OXIDE SEMICONDUCTOR FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE An oxide semiconductor film is formed over a substrate. A sacrifice film is formed to such a thickness that the local maximum of the concentration distribution of an injected substance injected...
22	US20120097977	SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE A semiconductor device of the present invention has a (110)-plane-orientation silicon substrate and a p channel type field effect transistor formed in a pMIS region. The p channel type field...
23	US20110042719	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE It is an objective of the present invention to increase channel current density while allowing a GaN field effect transistor to perform normally-off operation. Provided is a a semiconductor device...
24	US20130149828	GaN-based Semiconductor Element and Method of Manufacturing the Same Provided is a GaN series semiconductor element, which is capable of obtaining an adequate normally-off characteristic, and a manufacturing method thereof. In a GaN series semiconductor element...
25	US20100109044	Optimized Compressive SiGe Channel PMOS Transistor with Engineered Ge Profile and Optimized Silicon Cap Layer A semiconductor process and apparatus includes forming PMOS transistors (72) with enhanced hole mobility in the channel region by epitaxially growing a bi-axially stressed forward graded silicon...
26	US20050064639	Method of fabricating SiC semiconductor device In a method of fabricating a SiC semiconductor device, a surface of a SiC layer (5, 48, 102) is processed into a cleaned surface terminated at Si. An oxide film (7, 49, 105) is formed on the...
27	US20050054164	Strained silicon MOSFETs having reduced diffusion of n-type dopants Processing is performed during fabrication of a strained silicon NMOS device to create point defects in silicon germanium portions of source regions, and optionally of drain regions, prior to...
28	US20160197155	SILICON CARBIDE SUBSTRATE, SILICON CARBIDE SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE A silicon carbide substrate has a silicon carbide epitaxial layer. The silicon carbide epitaxial layer has a first main surface and a second main surface opposite to the first main surface. The...
29	US20150076620	METHOD FOR MANUFACTURING TRANSISTORS AND ASSOCIATED SUBSTRATE The disclosed technology generally relates to semiconductor devices, and more particularly to different types of transistors having different channel materials. In one aspect, a method of...
30	US20100109046	Methods of forming low interface resistance contacts and structures formed thereby Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a tapered contact opening in an ILD disposed on a substrate, wherein a...
31	US20080153220	Method for fabricating semiconductor devices using strained silicon bearing material A method of manufacturing an integrated circuit on semiconductor substrates. The method includes providing a semiconductor substrate characterized by a first lattice with a first structure and a...
32	US20140322881	SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME Provided are a semiconductor device, which can facilitate a salicide process and can prevent a gate from being damaged due to misalign, and a method of manufacturing of the semiconductor device....
33	US20140127872	FIELD EFFECT TRANSISTORS HAVING A ROUNDED FIN A method of fabricating a fin field effect transistor may include forming a fin portion protruding from a substrate, forming a device isolation layer to cover a lower sidewall of the fin portion,...
34	US20110215299	SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND DOPANT DIFFUSION RETARDING IMPLANTS AND RELATED METHODS A semiconductor device may include a substrate and at least one MOSFET adjacent the substrate. The MOSFET may include a superlattice channel including a plurality of stacked groups of layers, a...
35	US20140080277	COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A compound semiconductor device including an electron transport layer that is formed on a substrate and includes a III-V nitride compound semiconductor, a gate insulating film that is positioned...
36	US20130037793	AMORPHOUS OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR FABRICATION METHOD This disclosure provides systems, methods and apparatus for fabricating thin film transistor devices. In one aspect, a substrate having a source area, a drain area, and a channel area is provided....
37	US20130011984	Using Hexachlorodisilane as a Silicon Precursor for Source/Drain Epitaxy A method includes forming a gate stack over a semiconductor region, and recessing the semiconductor region to form a recess adjacent the gate stack. A silicon-containing semiconductor region is...
38	US20150364330	TA BASED AU-FREE OHMIC CONTACTS IN ADVANCED AIGAN/GAN BASED HFETS AND/OR MOSHFETS FOR POWER SWITCH APPLICATIONS A method of forming an Ohmic contact including forming a Ta layer in a contact area of a barrier layer by evaporation at an evaporation rate of 1 Å/second, forming a Ti layer on the first Ta...
39	US20140209976	TRANSISTORS AND METHODS OF MANUFACTURING THE SAME A transistor and a method of manufacturing the same are disclosed. The transistor includes a first epitaxial layer, a channel layer, a gate structure and an impurity region. The first epitaxial...
40	US20110215376	PRE-GATE, SOURCE/DRAIN STRAIN LAYER FORMATION A method produces a transistor. The method forms a strain-producing layer on a base layer and then removes at least one portion of the strain-producing layer to create at least one opening in the...
41	US20140322879	METHOD OF FORMING SIGMA-SHAPED TRENCH A method of forming a Σ-shaped trench is disclosed. The method includes: providing a silicon substrate; and sequentially performing a plasma etching process and a wet etching process on the...
42	US20120161249	Reduction of Defect Rates in PFET Transistors Comprising a Silicon/Germanium Semiconductor Material by Providing a Graded Germanium Concentration When forming sophisticated gate electrode structures in an early manufacturing stage, the threshold voltage characteristics may be adjusted on the basis of a semiconductor alloy, which may be...
43	US20090146181	INTEGRATED CIRCUIT SYSTEM EMPLOYING DIFFUSED SOURCE/DRAIN EXTENSIONS An integrated circuit system that includes: providing a PFET device including a doped epitaxial layer; and forming a source/drain extension by employing an energy source to diffuse a dopant from...
44	US20080119025	Method of making a strained semiconductor device In a method of making a semiconductor device, a recess is formed in an upper surface of the semiconductor body of a first material. An embedded semiconductor region is formed in the recess. The...
45	US20140246696	TRANSISTOR WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIES FORMED IN A SILICON/GERMANIUM SUBSTRATE When forming sophisticated semiconductor devices including N-channel transistors with strain-inducing embedded source and drain semiconductor regions, N-channel transistor performance may be...
46	US20140242768	REDUCING WAFER DISTORTION THROUGH A HIGH CTE LAYER Provided is a method of fabricating a semiconductor device. The method includes providing a silicon substrate having opposite first and second sides. At least one of the first and second sides...
47	US20080224183	Method for Manufacturing a Compound Semiconductor Field Effect Transistor Having a Fin Structure, and Compound Semiconductor Field Effect Transistor Having a Fin Structure In another embodiment, the invention provides a compound semiconductor field effect transistor having a fin structure. A first layer is formed on or above a substrate, wherein the first layer...
48	US20060214187	Wafer for semiconductor device fabrication, method of manufacture of same, and field effect transistor A wafer for semiconductor device fabrication, from which large output power can be obtained by making the off-state breakdown voltage higher than in the prior art. The wafer for semiconductor...
49	US20150087125	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE A method of manufacturing a semiconductor device of an embodiment includes: preparing a substrate; and growing a p-type SiC single-crystal layer on the surface of the substrate from a liquid phase...
50	US20120286370	SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A semiconductor device and method for manufacturing the same are disclosed. The method comprises: forming a gate insulating layer and a gate above a substrate; forming a spacer on both sides of...

Matches 1 - 50 out of 151

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