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US20070020859 Method of making non-volatile field effect devices and arrays of same  
Methods of making non-volatile field effect devices and arrays of same. Under one embodiment, a method of making a non-volatile field effect device includes providing a substrate with a field...
US20050042810 Semiconductor processing methods of forming integrated circuitry  
Semiconductor processing methods of forming integrated circuitry are described. In one embodiment, memory circuitry and peripheral circuitry are formed over a substrate. The peripheral circuitry...
US20070007601 Vertical MOSFET SRAM cell  
A method of forming an SRAM cell device includes the following steps. Form pass gate FET transistors and form a pair of vertical pull-down FET transistors with a first common body and a first...
US20060008977 Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry  
Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry are described. In one...
US20150270272 Finfet Drive Strength Modification  
A method and circuit in which the drive strength of a FinFET transistor can be selectively modified, and in particular can be selectively reduced, by omitting the LDD extension formation in the...
US20060125024 Semiconductor device and a method of manufacturing the same  
To improve reliability of FETs having element isolation regions for electrically isolating field effect transistors adjacent to each other in the gate length direction in a mask ROM region, the...
US20070207583 METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING TRANSISTOR ELEMENTS WITH DIFFERENTLY STRESSED CHANNEL REGIONS  
A semiconductor structure comprising a first transistor element and a second transistor element is provided. Stress in channel regions of the first and the second transistor element is controlled...
US20070072376 Strained-induced mobility enhancement nano-device structure and integrated process architecture for CMOS technologies  
A CMOS semiconductor integrated circuit device. The CMOS device includes an NMOS device comprising a gate region, a source region, and a drain region and an NMOS channel region formed between the...
US20060189083 Field Effect Transistor With Etched-Back Gate Dielectric  
An ultrathin high-k gate dielectric made for use in a field-effect transistor is provided. The gate dialectric is made by depositing a high-k gate dielectric material on a substrate and forming an...
US20090321850 Threshold adjustment for MOS devices by adapting a spacer width prior to implantation  
Different threshold voltages of transistors of the same conductivity type in a complex integrated circuit may be adjusted on the basis of different Miller capacitances, which may be accomplished...
US20060105527 Semiconductor device and manufacturing method therefor  
A method of manufacturing a semiconductor device comprises forming a gate insulation film on a semiconductor substrate; forming a first gate electrode and a second gate electrode on the gate...
US20090108294 SCALABLE HIGH-K DIELECTRIC GATE STACK  
A stack comprising a dielectric interface layer, a high-k gate dielectric layer, a group IIA/IIIB element layer is formed in that order on a semiconductor substrate. A metal aluminum nitride layer...
US20120292708 Combined Substrate High-K Metal Gate Device and Oxide-Polysilicon Gate Device, and Process of Fabricating Same  
A semiconductor structure having combined substrate high-K metal gate device and an oxide-polysilicon gate device and a process of fabricating same are provided. The semiconductor structure...
US20150372114 SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF  
A manufacturing method of a semiconductor device having metal gate includes providing a substrate having a first semiconductor device formed thereon, and the first semiconductor device includes a...
US20060131575 Electronic device and manufacturing method thereof  
An electronic device includes an element group which generates a specific identification number and is composed of a plurality of elements. The specific identification number is set based on...
US20110210956 CURRENT SENSOR FOR A SEMICONDUCTOR DEVICE AND SYSTEM  
A current sensor which can be used to measure current flowing through a semiconductor substrate of a direct current (DC) to DC converter or other device. The current sensor can provide continuous...
US20070048920 Methods for dual metal gate CMOS integration  
Methods for fabricating two metal gate stacks for complementary metal oxide semiconductor (CMOS) devices are provided. A first metal layer may be deposited onto a gate dielectric. Next a mask...
US20060263985 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE  
A method of fabricating a semiconductor device to prevent the profiles of source/drain regions from being deformed due to the thermal budget. The method can simplify the overall process of...
US20100102399 Methods of Forming Field Effect Transistors and Devices Formed Thereby  
Methods of forming field effect transistors include forming a first gate electrode on a semiconductor substrate and forming insulating spacers on sidewalls of the first gate electrode. At least a...
US20160064507 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME  
To provide a semiconductor device having a memory cell equipped with a control gate electrode and a memory gate electrode adjacent to each other via a charge storage layer and having improved...
US20140106528 FINFET CIRCUITS WITH VARIOUS FIN HEIGHTS  
A method of forming a fin field effect transistor (finFET) includes forming a plurality of fins of varying heights on a substrate and forming a first gate structure on one or more fins of a first...
US20090224332 Semiconductor device  
An n-type embedded layer is formed in an N-LV region of a SRAM cell region after an element isolation insulating film is formed on a p-type Si substrate. Thereafter, a p-well and an n-well are...
US20060252209 Semiconductor memory integrated circuit and its manufacturing method  
A method of manufacturing a semiconductor memory integrated circuit intended to improve properties and reliability of its peripheral circuit includes the step of forming a tunnel oxide film (21a)...
US20130064012 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
A semiconductor device includes a first transistor, formed in a substrate, that includes a first gate insulating film, a source and a drain region, a first gate electrode, and a first sidewall,...
US20090263948 METAL OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MOSFET) AND METHOD OF FABRICATING THE SAME  
A Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) is provided. The MOSFET includes a semiconductor substrate, a device isolating region disposed on a predetermined portion of the...
US20090096036 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
There is provided an SOI-MISFET including: an SOI layer; a gate electrode provided on the SOI layer interposing a gate insulator; and a first elevated layer provided higher in height from the SOI...
US20110300680 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND DEPLETION-TYPE MOS TRANSISTOR  
A peripheral circuit includes at least a first transistor. The first transistor comprises a gate electrode formed on a surface of a semiconductor layer via agate insulating film. A channel region...
US20080064169 Method for manufacturing semiconductor device, and semiconductor device  
The present invention provides a technique for efficiently forming a high-breakdown voltage transistor and a low-breakdown voltage transistor on the same substrate while reducing the deterioration...
US20050272191 Replacement gate process for making a semiconductor device that includes a metal gate electrode  
A method for making a semiconductor device is described. That method comprises forming a sacrificial layer on a substrate, and forming a trench within the sacrificial layer. After forming a dummy...
US20090174001 SEMICONDUCTOR DEVICE HAVING FIN TRANSISTOR AND PLANAR TRANSISTOR AND ASSOCIATED METHODS OF MANUFACTURE  
Disclosed is a fin transistor and a planar transistor and a method of forming the same. The fin transistor and the planar transistor are formed to have gate electrodes with similar thicknesses by...
US20060270162 HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICES AND METHOD OF MAKING THE SAME  
A method for fabricating metal-oxide-semiconductor devices is provided. The method includes forming a gate dielectric layer on a substrate; depositing a polysilicon layer on the gate dielectric...
US20050208716 Semiconductor integrated circuit device and production method thereof  
A refresh characteristic of a DRAM memory cell is improved and the performance of a MISFET formed in the periphery thereof and constituting a logic circuit is improved. Each gate electrode in a...
US20050037580 Manufacturing method for semiconductor device  
Disclosed is a manufacturing method for a semiconductor device comprising forming a structure comprising a first gate insulating film provided in a first region, a first conducting portion...
US20100032754 Semiconductor device and method of manufacturing the semiconductor device  
A semiconductor device includes: a high withstanding voltage transistor (128); a gate electrode (110) formed on a channel region (170); a first conductivity type source region (116a) formed on one...
US20050186803 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device includes selectively forming a photoresist film on an insulating film formed on a surface of a underlying semiconductor region such that the...
US20080169510 PERFORMANCE ENHANCEMENT ON BOTH NMOSFET AND PMOSFET USING SELF-ALIGNED DUAL STRESSED FILMS  
In an integrated circuit comprising both PMOSFETs and NMOSFETs, carrier mobility is enhanced on both types of FETs using dual stressed films. The adverse impact of having both layers of stressed...
US20150137138 TRANSISTOR AND METHOD FOR PRODUCING TRANSISTOR  
A transistor that offers a high dielectric breakdown voltage of a gate insulating film with limited reduction of the current flowing between drain and source electrodes. The transistor has a...
US20150171860 CIRCUITS AND METHODS FOR IMPROVED QUALITY FACTOR IN A STACK OF TRANSISTORS  
Circuits and method for improved quality factor in a stack of transistors. A switching device can include a plurality of field-effect transistors (FETs) implemented in a stack configuration. The...
US20080079084 Enhanced mobility MOSFET devices  
Semiconductor devices having enhanced mobility regions and methods of forming such devices are disclosed. In some embodiments, a method includes providing a SiGe layer on a supporting substrate,...
US20080268597 TECHNIQUE FOR ENHANCING DOPANT ACTIVATION BY USING MULTIPLE SEQUENTIAL ADVANCED LASER/FLASH ANNEAL PROCESSES  
By performing multiple radiation-based anneal processes on the basis of less critical process parameters, the overall risk for creating anneal-induced damage, such as melting of gate portions, may...
US20050179078 Non-volatile memory devices including high-voltage transistors and methods of fabricating the same  
Non-volatile memory devices are provided including a cell array having a word line and a bit line. A row decoder is coupled to the word line and configured to apply word line voltages to the word...
US20140042552 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME  
Provided is a semiconductor device having an insulating gate field effect transistor equipped with a metal oxide film in a portion, on the side of a source region, between a gate insulating film...
US20090189224 SEMICONDUCTOR DEVICE AND FABRICATION PROCESS THEREOF  
A semiconductor device includes: an insulated gate field effect transistor of a first conductivity type as a first transistor, the first transistor having a gate insulating film and a gate...
US20080185661 Semiconductor device and method for fabricating the same  
A first MIS transistor includes: a first gate insulating film formed on a first active region; a first gate electrode formed on the first gate insulating film; first sidewall insulating films...
US20080111198 Stacked semiconductor device and method of manufacturing the same  
A stacked semiconductor device includes a first gate structure formed on a substrate, a first insulating interlayer covering the first gate structure on the substrate, a first active pattern...
US20050106813 Method of manufacturing flash memory device  
Provided is a method of manufacturing a flash memory device. In a flash memory device using a self-aligned shallow trench isolation scheme, a buffer oxide layer is formed between a first...
US20120018814 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
According to one embodiment, a method of manufacturing a semiconductor device is disclosed as follows. A first oxide film in a first region and a second oxide film in a second region are formed on...
US20090057779 Semiconductor Device and Method of Fabricating the Same  
A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes a semiconductor substrate having a first area implanted with first conductive type...
US20160093633 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor memory device includes a plurality of memory cell transistors that are formed above a semiconductor substrate and are connected to each other in series, first and second selection...
US20170033012 METHOD FOR FABRICATING FIN OF FINFET OF SEMICONDUCTOR DEVICE  
A method for fabricating a semiconductor device on a wafer includes: patterning a plurality of fins on the wafer; forming a shallow-trench isolation region to surround the plurality of fins; and...

Matches 1 - 50 out of 97 1 2 >