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US20070001208 DRAM having carbon stack capacitor  
A DRAM stack capacitor and a fabrication method thereof is disclosed. The DRAM stack capacitor is formed with a first capacitor electrode comprising a conductive carbon layer, a capacitor...
US20120040504 METHOD FOR INTEGRATING DRAM AND NVM  
The present invention discloses a method for integrating DRAM and NVM, which comprises steps: sequentially forming on a portion of surface of a DRAM semiconductor substrate a first gate insulation...
US20070111403 Polycide fuse with reduced programming time  
In one embodiment, a polycide fuse is provided that includes: a polysilicon layer; a silicide layer formed on the polysilicon layer; and a silicon nitride layer formed on the silicide layer by...
US20070111435 Schottky barrier finfet device and fabrication method thereof  
A Schottky barrier FinFET device and a method of fabricating the same are provided. The device includes a lower fin body provided on a substrate. An upper fin body having first and second...
US20110204428 IMPLEMENTING EDRAM STACKED FET STRUCTURE  
A method and circuit for implementing an embedded dynamic random access memory (eDRAM), and a design structure on which the subject circuit resides are provided. The embedded dynamic random access...
US20060199328 Non-dispersive high density polysilicon capacitor utilizing amorphous silicon electrodes  
The present invention provides, in one aspect, a method of fabricating a capacitor 615, comprising forming a first electrode 610, placing a dielectric 515 over the first electrode, and locating a...
US20070196978 Integrated circuitry comprising a pair of adjacent capacitors  
The invention includes methods and integrated circuitry. Pillars project outwardly from openings in a first material over individual capacitor storage node locations. Insulative material is...
US20060273456 Multiple spacer steps for pitch multiplication  
Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is...
US20110260230 CELL WITH SURROUNDING WORD LINE STRUCTURES AND MANUFACTURING METHOD THEREOF  
A memory cell with surrounding word line structures includes an active area; a plurality of first trenches formed on the active area in a first direction, each first trench has a bit line on a...
US20060177981 Capacitors and methods of manufacture thereof  
Capacitors are formed in metallization layers of semiconductor device in regions where functional conductive features are not formed, more efficiently using real estate of integrated circuits. The...
US20100237396 DRAM Unit Cells, Capacitors, Methods Of Forming DRAM Unit Cells, And Methods Of Forming Capacitors  
Some embodiments include methods of forming capacitors. A first capacitor storage node may be formed within a first opening in a first sacrificial material. A second sacrificial material may be...
US20070111431 MIM capacitor and associated production method  
An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first...
US20070018224 Devices and methods for preventing capacitor leakage  
Devices and methods for preventing capacitor leakage caused by sharp tip. The formation of sharp tip is avoided by a thicker bottom electrode which fully fills a micro-trench that induces...
US20080318378 MIM Capacitors with Improved Reliability  
A capacitor and methods for forming the same are provided. The method includes forming a bottom electrode; treating the bottom electrode in an oxygen-containing environment to convert a top layer...
US20070234539 Method for manufacturing capacitor embedded in PCB  
A method for manufacturing a capacitor embedded in a PCB includes: preparing a copper clad lamination (CCL) substrate having a reinforcement member and copper foils formed on both surfaces of the...
US20080203456 Dynamic random access memory devices and methods of forming the same  
Dynamic random access memory (DRAM) devices include first node pads and second node pads alternately arranged in a first direction on a substrate to form a first pad column. A width of the second...
US20090057741 Dram cell with enhanced capacitor area and the method of manufacturing the same  
A dynamic random access memory (DRAM) cell and the method of manufacturing the same are provided. The DRAM cell includes a cell transistor and a cell capacitor. The cell capacitor includes a...
US20050164449 Microelectronic capacitor structure and method for fabrication thereof  
Within a method for fabricating a capacitor structure within a microelectronic fabrication there is formed a capacitor structure comprising a pair of capacitor plate layers separated by a...
US20080057660 Step-gate for a semiconductor device  
A semiconductor device using a recessed step gate. An embodiment comprises a recessed region in a portion of the substrate, a transistor with one source/drain region located within the recessed...
US20060281252 Metal interconnect for capacitor  
A method and implementation for coupling a high current electrode to an energy storage device is disclosed.
US20070155115 Semiconductor device having capacitor large in capacitance and high in reliability and method of manufacturing the same  
A method according to the present invention includes forming a silicon nitride film on a lower electrode, oxidizing the silicon nitride film, and forming a dielectric film including aluminum on...
US20110086490 SINGLE-SIDE IMPLANTING PROCESS FOR CAPACITORS OF STACK DRAM  
A single-side implanting process for capacitors of stack DRAM is disclosed. Firstly, form a stacked structure with a dielectric layer and an insulating nitride layer on a semi-conductor substrate...
US20110260231 MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME  
The present application discloses a memory device and a method for manufacturing the same. The memory device comprising an MOSFET formed in a semiconductor layer and a capacitor structure below...
US20050106808 Semiconductor devices having at least one storage node and methods of fabricating the same  
A semiconductor device and methods of fabricating the semiconductor device, suitable for preventing electrical bridges between storage nodes without the increase of planar areas. In one...
US20070218627 Device and a method and mask for forming a device  
A method of forming a semiconductor device includes patterning a layer stack to form single conductive lines and single landing pads. Patterning of the layer stack includes two lithographic...
US20080191258 LOW VOLTAGE COEFFICIENT MOS CAPACITORS  
A low voltage coefficient MOS capacitor includes first and second dielectric layers between first and second capacitor plates, with a common plate separating the dielectric layers. First and...
US20120252178 PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A CAPACITOR  
A capacitor and an NVM cell are formed in an integrated fashion so that the etching of the capacitor is useful in end point detection of an etch of the NVM cell. This is achieved using two...
US20060284231 Dielectric memory and method for manufacturing the same  
A method for manufacturing a dielectric memory including the steps of: forming a second insulating film which covers wires formed above first contact plugs connected to impurity diffusion layers;...
US20090212288 THIN FILM TRANSISTOR, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE DISPLAY DEVICE  
A display device including the thin film transistor, and a method of manufacturing the display device are provided. The thin film transistor comprising a first gate electrode, a second gate...
US20100081395 DRAM HAVING STACKED CAPACITORS OF DIFFERENT CAPACITANCES  
A DRAM device having a plurality of memory blocks, including edge-located memory blocks and adjacent central memory blocks. An edge-located memory block shares a sense amplifier with an adjacent...
US20090008694 Integrated circuit and corresponding manufacturing method  
The present invention provides an integrated circuit including a field effect transistor formed in an active area segment of a semiconductor substrate, the transistor comprising: a first and a...
US20090236649 EMBEDDED MEMORY DEVICE AND A MANUFACTURING METHOD THEREOF  
An embedded memory device solves the problem of the low reliability of the circuit due to the unstable power source. The embedded memory includes a metal-oxide semiconductor (MOS) capacitor and a...
US20070284643 Capacitor structure of semiconductor memory and method for preparing the same  
A capacitor structure comprises a plurality of cylinders and a supporting ring positioned among the plurality of cylinders and connecting a portion of the sidewall of each cylinder. The cylinders...
US20070207579 Semiconductor device with capacitor and fuse and its manufacture method  
An upper electrode of a capacitor has a two-layer structure of first and second upper electrodes. A gate electrode of a MOS field effect transistor and a fuse are formed by patterning conductive...
US20070037349 Method of forming electrodes  
To form a semiconductor device, a plurality of upwardly extending conductors can be formed. The conductors extend outward from a surface of a semiconductor body, adjacent ones of the conductors...
US20070026604 Semiconductor device and fabrication method therefor  
A semiconductor device includes bit lines (12) that are provided in a semiconductor substrate (10) an ONO film (14) that is provided on the semiconductor substrate; word lines that are provided on...
US20100003794 METHOD FOR DEFECT REDUCTION FOR MEMORY CELL CAPACITORS  
A method for forming a cylindrical stack capacitor structure. A semiconductor substrate is provided. Storage node structures are formed in a memory cell region. A dielectric layer is formed...
US20110171796 VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY  
A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain...
US20050186732 Semiconductor devices having plug contact holes extending downward from a main surface of a semiconductor substrate and methods of forming the same  
According to some embodiments of the invention, semiconductor devices and DRAM cells have plug contact holes. Methods of forming the same include forming a channel-portion hole disposed in a...
US20060197135 Semiconductor device having a cylindrical capacitor element  
A semiconductor device includes a cylindrical capacitor having a bottom electrode, a capacitor insulator film and a top electrode. The top electrode includes first and second electrode portions...
US20060199330 Method of manufacturing semiconductor memory having capacitor of high aspect ratio to prevent deterioration in insulating characteristics  
A method of manufacturing a semiconductor memory according to the present invention includes steps of forming an insulating film, into which a conductive plug connected to a source or a drain in a...
US20110140187 Methods of Forming Vertical Field Effect Transistors, Vertical Field Effect Transistors, And DRAM Cells  
A method of forming a vertical field effect transistor includes etching an opening into semiconductor material. Sidewalls and radially outermost portions of the opening base are lined with masking...
US20060263976 Semiconductor device with capacitor structure for improving area utilization  
A semiconductor device with a capacitor structure for improving area utilization comprises a plurality of electrically conductive layers and a plurality of dielectric layers. The dielectric layers...
US20070120230 Layer structure, method of forming the layer structure, method of manufacturing a capacitor using the same and method of manufacturing a semiconductor device using the same  
In a layer structure, a method of forming the layer structure, a method of manufacturing a capacitor having the layer structure and a method of manufacturing a semiconductor device having the...
US20070167006 METHODS OF FORMING METAL LAYERS USING OXYGEN GAS AS A REACTION SOURCE AND METHODS OF FABRICATING CAPACITORS USING SUCH METAL LAYERS  
When a metal layer formed by reaction of a metal source and an oxygen (O2) source is deposited, oxidization of a conductive layer disposed under or on the metal layer can be reduced and/or...
US20070117311 Three-dimensional single transistor semiconductor memory device and methods for making same  
Single-transistor memory cell including a three-dimensional capacitor and methods for fabricating the cell are disclosed. The method includes steps for defining a source and drain, forming a...
US20060141702 Method for depositing titanium oxide layer and method for fabricating capacitor by using the same  
Disclosed are a method for depositing a titanium oxide (TiO2) layer and a method for fabricating a capacitor by using the same. The method for forming the TiO2 layer includes the steps of: a)...
US20070059880 HSG PROCESS AND PROCESS OF FABRICATING LARGE-AREA ELECTRODE  
A hemispherical silicon grain (HSG) process is described. A doped poly-Si layer is formed on a substrate, and then an oxidative gas is used to oxidize the surface of the doped poly-Si layer to...
US20060205141 Method of fabricating semiconductor devices having buried contact plugs  
A method includes forming a lower dielectric layer on a semiconductor substrate, forming a bit line landing pad and a storage landing pad that penetrate the lower dielectric layer, covering the...
US20060172489 Method for producing a dielectric material on a semiconductor device and semiconductor device  
Method for producing a dielectric material on a semiconductor device with an atomic layer deposition procedure, whereby an aluminum oxide nitride or a silicon oxide nitride or an aluminum silicon...

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