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US20050123140 Technique for implementing a security algorithm  
Performing a hash algorithm in a processor architecture to alleviate performance bottlenecks and improve overall algorithm performance. In one embodiment of the invention, the hash algorithm is...
US20050123139 METHOD FOR MANAGING A BUFFER MEMORY IN A CRYPTO ENGINE  
A method for managing a buffer memory in a crypto engine includes defining an IO writing address, a program reading address, a program writing address, and an IO reading address in the buffer...
US20160277221 CONFIGURABLE MULTI-LANE SCRAMBLER FOR FLEXIBLE PROTOCOL SUPPORT  
Various structures and methods are disclosed related to configurable scrambling circuitry. Embodiments can be configured to support one of a plurality of protocols. Some embodiments relate to a...
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