Matches 1 - 36 out of 36


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US20110032775 MEMORY DEVICES AND METHOD FOR DRIVING A SIGNAL LINE TO A KNOWN SIGNAL LEVEL  
A system and method for erasing a block of data in a plurality of memory cells includes clamping one of a digit line and an I/O line in a sensing circuit of a memory device to a fixed logic level....
US20150071013 Semiconductor Device Having Level Shift Circuit  
A semiconductor device includes: two level shift circuits having substantially the same circuit configuration; an input circuit that supplies complementary input signals to the level shift...
US20120026802 MANAGED HYBRID MEMORY WITH ADAPTIVE POWER SUPPLY  
Subject matter disclosed herein relates to a memory device, and more particularly to a managed hybrid memory that includes a power supply.
US20160099029 TECHNIQUES TO BOOST WORD-LINE VOLTAGE USING PARASITIC CAPACITANCES  
A memory device with word-line voltage boosting includes a set of first switches that are operable to couple a word-line of the memory device to a supply voltage to pull the word-line up to a rail...
US20120275244 SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE HAVING FUSE CIRCUIT  
A semiconductor integrated circuit includes: a fuse; a first driving unit configured to drive a sensing node in response to a first fuse sensing signal; a second driving unit configured to drive...
US20110149661 MEMORY ARRAY HAVING EXTENDED WRITE OPERATION  
In some embodiments, an apparatus comprising a memory array of static random access memory (SRAM) cells arranged in a plurality of rows and a plurality of columns and configured to receive a clock...
US20080094918 Memory read control circuit and control method thereof  
A control circuit to which a read requirement signal for data read of a memory and a burst length information signal for the read requirement are input controls a pull-up circuit so as to pull-up...
US20110141830 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME  
A semiconductor memory device includes a sense amplifier configured to sense and amplify data loaded into a bit line pair, a power line equalize signal generation unit configured to generate a...
US20070008807 Wordline driver  
The present invention describes systems and method for driving wordlines of memory devices. Some embodiments include a selection signal driver to generate a selection signal responsive to a first...
US20150364166 SEMICONDUCTOR DEVICE  
A semiconductor device includes: a sense amplification block suitable for sensing and amplifying a data loaded on a pair of data lines based on a pull-up driving voltage supplied through a pull-up...
US20150310901 MEMORY WITH A SLEEP MODE  
A memory and a method for operating the memory having a sleep mode are provided. The memory one or more storage elements and a bitline coupled to the one or more storage elements. A precharge...
US20080225610 Write driver of semiconductor memory device and driving method thereof  
A write driver of a semiconductor memory device over drives a local input/output line at a write operation in order to transmit data provided in a global input/output line to a core area at a...
US20090122622 LEVEL SHIFTER WITH REDUCED LEAKAGE CURRENT AND BLOCK DRIVER FOR NONVOLATILE SEMICONDUCTOR MEMORY DEVICE  
A level shifter is disclosed and generates an output signal having a swing voltage shifted by a positive boost voltage with respect to an input signal. The level shifter comprises; an enable unit...
US20090303803 Independent Bi-Directional Margin Control Per Level and Independently Expandable Reference Cell Levels for Voltage Mode Sensing  
A memory system includes reference level generators that may provide programmable margins, and programmable verify voltage levels. The reference levels may be shifted within a range of voltages...
US20150046723 SENSE-AMPLIFIER DRIVING DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME  
A sense-amplifier driving device includes: a power-supply driving unit configured to respectively provide a first pull-up voltage and a first pull-down voltage to a pull-up power line and a...
US20110002176 SEMICONDUCTOR MEMORY DEVICE  
A semiconductor memory device includes a repair node; a fuse, one side of which is coupled to the repair node; a pull-down unit configured to selectively transfer a ground voltage to the repair...
US20090059686 Sensing scheme for the semiconductor memory  
The present invention provides a sensing scheme for semiconductor memory. N-type devices coupling between ground and a bit line and a bit line-bar of memory cells quickly discharge a bit line and...
US20110134707 BLOCK ISOLATION CONTROL CIRCUIT  
A block isolation control circuit includes: a control signal generation unit configured to generate a control signal which is disabled when a defect occurs in a cell block and it is necessary to...
US20140029359 SENSE AMPLIFIER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME  
A sense amplifier circuit includes a first pull-up transistor configured to pull-up drive a data bar line in response to a voltage of a data line, a first pull-down transistor configured to...
US20100214845 NAND MEMORY CELL ARRAY, NAND FLASH MEMORY HAVING NAND MEMORY CELL ARRAY, DATA PROCESSING METHOD FOR NAND FLASH MEMORY  
A NAND memory cell array which can be programmed in a hot carrier injection scheme, a NAND flash memory having the NAND memory cell array, and a data processing method for the NAND flash memory...
US20090296448 DIODE AS VOLTAGE DOWN CONVERTER FOR OTP HIGH PROGRAMMING VOLTAGE APPLICATIONS  
A voltage down converter for programming a one-time-programmable (OTP) memory comprising is disclosed, the voltage down converter comprises a bonding pad for coupling to a programming power...
US20090080266 DOUBLE DATA RATE (DDR) LOW POWER IDLE MODE THROUGH REFERENCE OFFSET  
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a double data rate (DDR) low power idle mode through reference offset. In some embodiments, a host...
US20100195420 SEMICONDUCTOR MEMORY DEVICE AND SYSTEM  
A semiconductor memory system includes a memory controller and a memory. The memory controller includes a control signal converting unit converting a control signal into a converted control signal...
US20070230258 Semiconductor memory device for controlling bit line sense amplifying operation using row and column addresses  
A semiconductor memory device includes a memory cell block for charging and discharging data into corresponding bit lines when an active command is inputted and any one of a plurality of word...
US20070133320 Circuit and method of boosting voltage for a semiconductor memory device  
A voltage boosting circuit of a semiconductor memory device for decreasing power consumption can include a first precharge circuit, a second precharge circuit, a first capacitive element, a second...
US20090285039 METHOD AND APPARATUS FOR LOCALLY GENERATING A VIRTUAL GROUND FOR WRITE ASSIST ON COLUMN SELECTED SRAM CELLS  
A method and apparatus for write assist for a static random access memory (SRAM) array, is provided, which increases the write ability of the SRAM cell by locally raising the source voltage. One...
US20150255143 SEMICONDUCTOR DEVICE  
According to an embodiment, a semiconductor device includes a first pull-up driver, a first pull-down driver, a second pull-up driver and a second pull-down driver. The first pull-up driver is...
US20120275243 SEMICONDUCTOR MEMORY DEVICE  
A semiconductor memory device includes: a first switch configured to couple a bit line to a first input/output line in response to an output selection signal including a pulse which is generated...
US20090168557 Ultra wide voltage range register file circuit using programmable triple stacking  
Methods and apparatus relating to expanding the operational voltage range of data storage circuits are described. In an embodiment, low voltage data storage circuit operation is improved by...
US20120269012 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR DRIVING THE SAME  
A semiconductor integrated circuit includes a first signal generator configured to generate a third active signal that is selectively enabled in a first duration in response to a first active...
US20060077729 Low current consumption at low power DRAM operation  
A memory device connectable to an external power supply voltage, includes an array of memory cells defined by a plurality of bit lines and a plurality of word lines, each memory cell corresponding...
US20080080266 Memory driver circuits with embedded level shifters  
A memory line driver system may include a first input line to receive a clock-gated signal associated with a first supply power level, a second input line to receive an information signal...
US20090219768 SEMICONDUCTOR MEMORY DEVICE HAVING SHARED BIT LINE SENSE AMPLIFIER SCHEME AND DRIVING METHOD THEREOF  
A semiconductor memory device has a shared bit line sense amplifier. The semiconductor memory device includes: a bit line sense amplifier for amplifying data applied on bit line pair; an upper bit...
US20100195416 Anti-fuse circuit and semiconductor memory device  
An anti-fuse circuit uses first to fifth power supplies which have first to fifth power supply voltages, respectively, in the order of highest to lowest during writing. The anti-fuse circuit...
US20100027344 SEMICONDUCTOR MEMORY DEVICE  
A drain voltage generator circuit includes a first switching element coupled between a first power supply voltage and an output end of the drain voltage generator circuit, a second switching...
US20130070542 Replica Circuit and It's Applications  
A replica circuit includes: a first conductivity type first transistor; a first current path including a first conductivity type second transistor and a second conductivity type third transistor;...

Matches 1 - 36 out of 36