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US20150124514 Lifetime of Ferroelectric Devices  
A method and apparatus for increasing the lifetime of ferroelectric devices is presented. The method includes applying a waveform to the input pulse to increase the rise or fall time of the pulse....
US20130021833 DIFFERENTIAL PLATE LINE SCREEN TEST FOR FERROELECTRIC LATCH CIRCUITS  
Non-volatile latch circuits, such as in memory cells and flip-flops, that are constructed for reliability screening. The non-volatile latch circuits each include ferroelectric capacitors coupled...
US20120195096 DIFFERENTIAL PLATE LINE SCREEN TEST FOR FERROELECTRIC LATCH CIRCUITS  
Non-volatile latch circuits, such as in memory cells and flip-flops, that are constructed for reliability screening. The non-volatile latch circuits each include ferroelectric capacitors coupled...
US20100296329 Differential Plate Line Screen Test for Ferroelectric Latch Circuits  
Non-volatile latch circuits, such as in memory cells and flip-flops, that are constructed for reliability screening. The non-volatile latch circuits each include ferroelectric capacitors coupled...
US20060187700 Single event effect (SEE) tolerant circuit design strategy for SOI type technology  
A method of designing an integrated circuit to be Single Event Upset (SEU) immune by converting one or more Single Event Transient (SET) sensitive transistors into at least two serially connected...
US20120120708 METHOD OF SWITCHING OUT-OF-PLANE MAGNETIC TUNNEL JUNCTION CELLS  
A method of switching the magnetization orientation of a ferromagnetic free layer of an out-of-plane magnetic tunnel junction cell, the method including: passing an AC switching current through...
US20080151597 Wear-resistant multilayer probe  
A data storage device includes a probe having a first conductive element, a second conductive element and an insulator layer positioned between the first conductive element and the second...
US20130258750 DUAL-CELL MTJ STRUCTURE WITH INDIVIDUAL ACCESS AND LOGICAL COMBINATION ABILITY  
A dual-cell spin-transfer torque random-access memory including a first magnetic tunneling junction and a second magnetic tunneling junction. An access circuit is coupled to the first and second...
US20090040806 Reading circuit and method in a data-storage system  
A reading circuit for reading a datum stored in a storage material. In the reading circuit, a generating stage generates a read electrical quantity to be applied to the storage material, and a...
US20060067102 Non-volatile logic circuit and system LSI having the same  
A non-volatile logic circuit according to the present invention is comprised of: a logic circuit block; and an input/output unit operable to input and output data between the logic circuit block...
US20140050008 Electronic Device and Method for FRAM Power Supply Management  
The invention is an electronic device including a ferroelectric random access memory (FRAM), a first supply voltage domain, a second supply voltage domain and a low drop output voltage regulator...
US20110310651 Variable Impedance Circuit Controlled by a Ferroelectric Capacitor  
A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization...
US20100309710 Variable Impedance Circuit Controlled by a Ferroelectric Capacitor  
A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization...
US20130258751 FRAM COMPILER AND LAYOUT  
A computer program for generating a layout for a ferroelectric random access memory (FRAM) that is embodied on a non-transitory storage medium and executable by a processor is provided. FRAM...
US20050007811 Storage device and data conversion program  
An attribute for data to be issued is predetermined for each one of a plurality of read routes of a storage device. A data conversion unit identifies the attribute of the data read from the...
US20050226026 Repacking procedure for streaming packet switched services  
A method and apparatus of arbitrating network resource allocation request to reallocate Packet-Switched (PC) dedicated territory as circuit-switched (CS) territory usable for CS connections within...
US20140254235 POWER SUPPLY BROWNOUT PROTECTION CIRCUIT AND METHOD FOR EMBEDDED FRAM  
Corruption of data in a FRAM (2) is avoided by applying a regulated voltage (VLDO) to a conductive pin (5-1). A switch (SW1) is coupled between the conductive pin and a power terminal of the FRAM...
US20070041233 Wake-up of ferroelectric thin films for probe storage  
A method for improving the stability of ferroelectric storage devices comprises: providing a ferroelectric storage medium including a film of ferroelectric material; and repeatedly applying a...
US20080192528 Piezoelectric reading of ferroelectric data storage media  
An apparatus comprises mechanically scanned ferroelectric data storage media. A scanning electrode contacts the scannable surface with a contact force. The ferroelectric data storage media...
US20050002217 Large volume storage device  
A large volume storage device includes a circuit board, a power supply unit, storage media and a socket. The power supply unit is connected to the circuit board. The storage media is connected to...
US20130051109 Method of reading a ferroelectric memory cell  
A method of reading a memory cell is disclosed. The method includes the step of connecting (708) a reference voltage generator (600) to a first bitline (/BL). The first bitline is charged to a...
US20050162889 Storage circuit, semiconductor device, electronic apparatus, and driving method  
A storage circuit that is equipped with a storage section having a first ferroelectric capacitor and a second ferroelectric capacitor that are connected to each other in series, a potential...
US20120155144 FAST RESPONSE CIRCUITS AND METHODS FOR FRAM POWER LOSS PROTECTION  
A circuit to protect data on an FRAM during a read operation includes an FRAM voltage regulator having an output to supply an FRAM operating voltage to the FRAM. A voltage monitor monitors a...
US20120230079 ACTUATOR AND STORAGE DEVICE  
In one embodiment, an actuator has a movable member, a frame, and first and second electrodes. Each of the first electrodes has a pair of first and second planes perpendicular to a third direction...
US20090003030 METHODS FOR FERROELECTRIC DOMAIN READING  
Methods and arrangements for data storage are discussed. Embodiments include applying a first voltage between a tip and an electrode, thereby forming a polarized domain in a ferroelectric material...
US20120092918 VERIFICATION SYSTEM  
A verification system of the present invention is provided to perform unidirectional or bidirectional verification between a master apparatus and a slave apparatus comprising the master apparatus...
US20070235795 Ferroelectric storage device and manufacturing method thereof  
According to an aspect of the embodiment, there is provided a ferroelectric storage device including: a plurality of memory cells repeatedly arranged in a predetermined direction, each memory cell...
US20140133212 Non-Volatile Counter Utilizing a Ferroelectric Capacitor  
A counter that can include a plurality of count stages is disclosed. Each count stage includes a ferroelectric capacitor characterized by first and second polarization states, a variable impedance...
US20060083048 Multi-stable vortex states in ferroelectric nanostructure  
A ferroelectric nanostructure formed as a low dimensional nanoscale ferroelectric material having at least one vortex ring of polarization generating an ordered toroid moment switchable between...
US20120250391 MAGNETIC RANDOM ACCESS MEMORY CELL WITH A DUAL JUNCTION FOR TERNARY CONTENT ADDRESSABLE MEMORY APPLICATIONS  
The present disclosure concerns a MRAM cell comprising a first tunnel barrier layer comprised between a soft ferromagnetic layer having a free magnetization and a first hard ferromagnetic layer...
US20100080036 UNIDIRECTIONAL SPIN TORQUE TRANSFER MAGNETIC MEMORY CELL STRUCTURE  
Spin torque transfer magnetic random access memory devices configured to be programmed unidirectionally and methods of programming such devices. The devices include memory cells having two pinned...
US20140169061 METHOD OF IMPLEMENTING A FERROELECTRIC TUNNEL JUNCTION, DEVICE COMPRISING A FERROELECTRIC TUNNEL JUNCTION AND USE OF SUCH A DEVICE  
The invention relates to a method of implementing a ferroelectric tunnel junction, said junction comprising to films each forming an electrode-type conductive element, and separated by a film...
US20140334220 EMBEDDED NON-VOLATILE MEMORY CIRCUIT FOR IMPLEMENTING LOGIC FUNCTIONS ACROSS PERIODS OF POWER DISRUPTION  
A circuit having an autonomous ferroelectric memory latch (AML) is disclosed. An AML characterized by an AML input, an AML output, a first AML power contact, a second AML power contact and an AML...
US20120275209 Embedded Non-Volatile Memory Circuit for Implementing Logic Functions Across Periods of Power Disruption  
A circuit having an autonomous ferroelectric memory latch (AML) is disclosed. An AML characterized by an AML input, an AML output, a first AML power contact, a second AML power contact and an AML...
US20100097840 FRAM including a tunable gain amp as a local sense amp  
FRAM includes a tunable gain amp serving as a local sense amp, wherein the tunable gain amp is connected to a local bit line for reading a memory cell including a pass transistor and a...
US20120008365 METHOD FOR OPERATING A NONVOLATILE SWITCHING DEVICE  
A method of flowing a current selectively with a nonvolatile switching device according to the present disclosure includes a step of configuring, in the nonvolatile switching device, any one of a...
US20140211532 Four Capacitor Nonvolatile Bit Cell  
A system on chip (SoC) provides a memory array of nonvolatile bitcells. Each bit cell includes two ferroelectric capacitors connected in series between a first plate line and a second plate line,...
US20070047289 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE  
A semiconductor integrated circuit device capable of lengthening a life of a FeRAM. A RAM stores the same data as those of the FeRAM in the same address as that of the FeRAM. An FF (flip-flop)...
US20130229849 NONVOLATILE LATCH CIRCUIT AND MEMORY DEVICE  
A nonvolatile latch circuit includes: a latch circuit part; a charge absorption circuit part; and a first ferroelectric capacitor having a first electrode connected to a plate line and a second...
US20140268987 Thermally-Assisted Mram with Ferromagnetic Layers with Temperature Dependent Magnetization  
A technique is provided for a thermally assisted magnetoresistive random access memory device. The device has a synthetic antiferromagnetic layer disposed on an antiferromagnetic layer. The...
US20100002488 F-SRAM Margin Screen  
A process of testing an integrated circuit containing a programmable data storage component containing at least two ferroelectric capacitors coupled to complementary state nodes that includes...
US20070058416 Inspection method for semiconductor memory  
A method for inspecting a semiconductor memory having nonvolatile memory cells using ferroelectric capacitors is disclosed which comprises, after shelf-aging the ferroelectric capacitor in a first...
US20130322151 FERROMAGNETIC DEVICE PROVIDING HIGH DOMAIN WALL VELOCITIES  
The invention is directed to a ferromagnetic device (10), having an elongated structure extending along a longitudinal direction (11), comprising a ferromagnetic material, wherein a transverse...
US20060291269 Image projector with flexible reflective analog modulator  
An image projector comprises a plurality of flexible reflective analog modulators (FRAMs), an illumination optics for focusing at least one light source thereon, a conversion optics for converting...
US20070103961 RAM cell with soft error protection using ferroelectric material  
A static random access memory (SRAM) cell with single event and soft error protection using ferroelectric material is presented. The SRAM cell comprises two inverters in a mutual feedback loop,...
US20120243291 Crosspoint Array and Method of Use with a Crosspoint Array Having Crossbar Elements Having a Solid Electrolyte Material Used as a Rectifier with a Symmetric or Substantially Symmetric Resistive Memory  
A crosspoint array has been shown having a plurality of bitlines and wordlines; and a plurality of crossbar elements, with each crossbar element being disposed between a bitline and a wordline and...
US20110188287 High speed FRAM including a deselect circuit  
High speed FRAM including a deselect circuit is realized for replacing SRAM, wherein the deselect circuit is connected to a local bit line pair for forcing a middle voltage to storage nodes of...
US20080304307 USE OF A SYMMETRIC RESISTIVE MEMORY MATERIAL AS A DIODE TO DRIVE SYMMETRIC OR ASYMMETRIC RESISTIVE MEMORY  
A symmetrically resistive memory material (such as a phase change material) is described for use as a rectifying element for driving symmetric or asymmetric resistive memory elements in a...
US20050254310 Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same  
Provided are a nonvolatile semiconductor memory device including ferroelectric semiconductor patterns in respective memory cells and methods of writing and reading data. The device includes a...
US20100074002 TRI-STATE MEMORY DEVICE AND METHOD  
A non-volatile tri-state random access memory device, including a permanent magnetic bit; a write module in functional communication with the permanent magnetic bit and configured to selectably...

Matches 1 - 50 out of 306 1 2 3 4 5 6 7 >