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US20130088372 |
Measuring Capacitance of a Capacitive Sensor with a Microcontroller Having Digital Outputs for Driving a Guard Ring
A guard ring is provided around each capacitive sensor plate and charged to substantially the same voltage as a voltage on the capacitive sensor plate. The guard ring reduces parasitic... |
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US20110080309 |
BANDWIDTH MISMATCH ESTIMATION FOR TIME INTERLEAVED ADCS
With high speed, high resolution time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches between the various ADC branches can pose a significant problem. Previously,... |
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US20110128172 |
LOW POWER CONVERT AND SHUTDOWN SAR ADC ARCHITECTURE
With Successive Approximation Register (SAR) analog-to-digital converters (ADCs), there are several different architectures. One of these architectures is a “convert and shut down” architecture,... |
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US20110267212 |
CAPACITIVE INTERFACE CIRCUIT FOR LOW POWER SENSOR SYSTEM
This disclosure describes a capacitive interface circuit for a low power system. The capacitive interface circuit is configured to achieve very low noise sensing of capacitance-based transducers,... |
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US20130285706 |
INTERPOLATION CIRCUIT AND RECEPTION SYSTEM
An interpolation circuit includes: a first node to receive a first current; a second node to receive a second current; a third node to receive a third current; a first capacitor circuit including:... |
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US20140176354 |
Sampling circuit for ADC
A sampling circuit for ADC includes an external input terminal, a sampling circuit and an auxiliary circuit which are connected with the external input terminal, a clock circuit and an external... |
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US20120314822 |
INTERFERENCE RESISTANT COMPRESSIVE SAMPLING
Embodiments provide for dramatically improved interference resistance in advanced communications applications, where the frequency range can exceed 1 GHz. Such embodiments may be implemented using... |
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US20110254717 |
AD CONVERTER
Analog to digital conversion is performed by sampling an input voltage followed by AD conversion of the sampled voltage. In the sample and hold circuit a differential amplifier output voltage is... |
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US20090289822 |
AD CONVERTER AND DATA PROCESSING UNIT
An AD converter includes an input circuit, an operation circuit and a bus interface. The input circuit is provided with a pull-down circuit, which is capable of pulling down an analog signal input... |
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US20130113638 |
METHOD AND APPARATUS FOR EVALUATING WEIGHTING OF ELEMENTS OF DAC AND SAR ADC USING THE SAME
A method and an apparatus for evaluating weighting of elements of a DAC and a SAR ADC using the same are provided. An equivalent weighting of each composed element is obtained by adding a... |
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US20110304490 |
LOW POWER COMPARATOR FOR USE IN SAR ADCS
Successive approximation register (SAR) analog-to-digital converters (ADCs) generally use one or more comparators to convert an analog signal to a digital signal. These comparators, however, can... |
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US20140253353 |
APPARATUS AND METHOD FOR REDUCING SAMPLING CIRCUIT TIMING MISMATCH
An example apparatus, system, and method for sampling in an interleaved sampling circuit having multiple channels. In an embodiment, an input clock is used to synchronize the transitions of... |
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US20090295610 |
A/D converter having arbitration circuit which arbitrates operations of sample-and-hold circuit and comparator
When an A/D conversion start request for a potential supplied to an analog input terminal is generated during a conversion operation for converting a potential supplied to an analog input terminal... |
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US20130222163 |
TRACK AND HOLD CIRCUIT AND METHOD
A track and hold circuit has a main transistor for which the gate voltage is provided by a buffer circuit which is supplied with a different voltage supply than the circuit of the main transistor.... |
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US20090243902 |
SWITCHED-CAPACITOR CIRCUIT
In a switched-capacitor circuit such as a DAC, charges are accumulated by a plurality of sampling capacitors in dependence upon input digital data during a sampling phase; then, during a sharing... |
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US20120319880 |
SUCCESSIVE APPROXIMATION AD CONVERTER AND MOBILE WIRELESS DEVICE
A controller controls first and second supply switches so that, during a sampling period, a ground voltage is supplied to n first up-capacitors and n second up-capacitors while a power supply... |
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US20120127006 |
Two-Step Subranging ADC Architecture
First and second track and hold stages track and store an input voltage for a sample of an analog input signal. A coarse reference ladder provides a plurality of coarse references. The coarse... |
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US20140085117 |
SAMPLING CIRCUIT, A METHOD OF REDUCING DISTORTION IN A SAMPLING CIRCUIT, AND AN ANALOG TO DIGITAL CONVERTER INCLUDING SUCH A SAMPLING CIRCUIT
A sampling circuit comprising: an input node; a first signal path comprising a first sampling capacitor and a first signal path switch in a signal path between the input node and a first plate of... |
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US20100259430 |
POWER-SUPPLY-NOISE CANCELLING CIRCUIT AND SOLID-STATE IMAGING DEVICE
A reference voltage generation circuit generates a reference voltage and outputs it to an amplifier reference voltage line. A power-supply-noise adding circuit adds power supply noise superimposed... |
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US20090243900 |
ANALOG DIGITAL CONVERTER, A/D CONVERSION STAGE, METHOD FOR GENERATING DIGITAL SIGNAL CORRESPONDING TO ANALOG SIGNAL, AND METHOD FOR GENERATING SIGNAL INDICATING CONVERSION ERROR IN THE A/D CONVERSION STAGE
A conversion operation B is performed with respect to a sample value R in an A/D conversion stage 101 to generate a conversion result D3, and a sampling operation A is performed with respect to... |
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US20150213905 |
SIGNAL PROCESSING CIRCUIT AND A/D CONVERTER
A signal processing circuit according to one embodiment includes a rectifier, a holder, a controller, and a setter. The rectifier generates a rectified voltage by rectifying an input voltage in... |
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US20130127649 |
SAMPLING
There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for... |
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US20130099948 |
SAMPLING
There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for... |
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US20090289821 |
PIPELINE ANALOG-TO-DIGITAL CONVERTER HAVING OPERATIONAL AMPLIFIER SHARED BY SAMPLE AND HOLD CIRCUIT AND LEADING MULTIPLYING DIGITAL-TO-ANALOG CONVERTER
A pipeline analog-to-digital converter includes a sample and hold circuit; a plurality of multiplying digital-to-analog converters having a leading MDAC coupled to the sample and hold circuit; and... |
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US20120127007 |
COMPARISON CIRCUIT AND ANALOG-TO-DIGITAL CONVERSION DEVICE
A comparison circuit includes: an input circuit includes a first transistor for receiving a first signal, and a second transistor for receiving a second signal; a first current route of which the... |
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US20130038478 |
Systems, Devices and Methods for Capacitor Mismatch Error Averaging in Pipeline Analog-to-Digital Converters
Various embodiments of methods and devices for reducing capacitor mismatch errors in a pipeline analog-to-digital converter (ADC) are disclosed, where in a pipeline element circuit and during a... |
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US20100052957 |
Charge Domain Successive Approximation Analog-to-Digital Converter
An analog to digital conversion circuit and method is presented. The analog to digital circuit (100) comprises a first capacitor (103), arranged for being switchably (102) connected on one side to... |
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US20090295609 |
SYSTEM AND METHOD FOR REDUCING POWER DISSIPATION IN AN ANALOG TO DIGITAL CONVERTER
A system and method for reducing the power dissipated in an Analog to Digital Converter (ADC). The method includes the steps of: receiving a residue output from a previous phase of a plurality of... |
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US20090278716 |
SAMPLE HOLD CIRCUIT FOR USE IN TIME-INTERLEAVED A/D CONVERTER APPARATUS INCLUDING PARALLELED LOW-SPEED PIPELINE A/D CONVERTERS
A sample hold circuit is provided for use in a time-interleaved A/D converter apparatus including a plurality of low-speed pipeline A/D converters which are parallelized. The sample hold circuit... |
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US20090309778 |
SUCCESSIVE APPROXIMATION TYPE ANALOG/DIGITAL CONVERTER AND OPERATION METHOD OF SUCCESSIVE APPROXIMATION TYPE ANALOG/DIGITAL CONVERTER
In a successive approximation-type A/D converter, an S/H circuit samples and holds an analog input voltage. A D/A converter section receives current digital data corresponding to a current search... |
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US20120218132 |
INTEGRATED CIRCUITS, LIQUID CRYSTAL DISPLAY (LCD) DRIVERS, AND SYSTEMS
An integrated circuit includes a digital-to-analog converter (DAC) circuit including at least one first channel type DAC and at least one second channel type DAC. The integrated circuit includes a... |
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US20110032129 |
INTEGRATED CIRCUITS, LIQUID CRYSTAL DISPLAY (LCD) DRIVERS, AND SYSTEMS
An integrated circuit includes a digital-to-analog converter (DAC) circuit including at least one first channel type DAC and at least one second channel type DAC. The integrated circuit includes a... |
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US20130135129 |
Sensor Circuit for Concurrent Integration of Multiple Differential Signals and Operating Method Thereof
The present invention provides a circuit for concurrent integration of multiple differential signals. The circuit comprises a plurality of Stage 1 integration circuit arranged in array and a... |
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US20100225512 |
A/D CONVERSION CIRCUIT FOR USE WITH LOW-POTENTIAL AND HIGH-POTENTIAL POWER SUPPLIES
A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a... |
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US20080186216 |
Digital-analog (D/A) converter and data driver and flat panel display using the D/A converter and data driver
A Digital-Analog (D/A) converter, a data driver and a flat panel display using the D/A converter and data driver includes a controller to generate a first control signal or a second control signal... |
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US20130229293 |
LOW POWER SLOPE-BASED ANALOG-TO-DIGITAL CONVERTER
Providing for a two-stage single-slope analog to digital converter (ADC) exhibiting high resolution in conjunction with reduced power consumption is described herein. The ADC can achieve a digital... |
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US20120092199 |
PIPELINED ADC HAVING A THREE-LEVEL DAC ELEMENTS
In conventional pipelined analog-to-digital converters (ADCs), it is common to employ digital-to-analog converters (DACs) in the ADC stages that use two-state switches or segments. A problem with... |
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US20090021407 |
Analog to digital converter with a series of delay units
An A/D converter has a series of M delay units through which a pulse signal is transmitted while being delayed in each delay unit by a delay time depending on a level of an analog signal. A unit... |
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US20140070971 |
TRACK-AND-HOLD CIRCUIT FOR ANALOG-TO-DIGITAL CONVERTER WITH SWITCHED CAPACITOR COUPLING OF AMPLIFIER STAGE
A track-and-hold circuit comprises at least first and second amplifier stages, and switched capacitor circuitry coupled between the first and second amplifier stages. In a track mode of operation... |
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US20120309337 |
MULTI-LAYER TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTOR (ADC)
A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules,... |
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US20130009797 |
Distributed Bootstrap Switch
An input circuit for an analog-to-digital converter (ADC) includes at least one bootstrap circuit, including at least one first switch for connecting electrical power to a first terminal of at... |
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US20150009053 |
INPUT CONFIGURATION FOR ANALOG TO DIGITAL CONVERTER
A circuit comprising an input, two or more sampling capacitors, means for connecting each sampling capacitor to said input, means for discharging the sampling capacitors to a given voltage in a... |
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US20110241917 |
Method And Apparatus For Signal Reconstruction From Saturated Measurements
A method for recovering a signal by measuring the signal to produce a plurality of compressive sensing measurements, discarding saturated measurements from the plurality of compressive sensing... |
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US20120249352 |
SWITCHED-CAPACITOR INPUT CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER INCLUDING THE SAME
A switched-capacitor input circuit which receives an analog input signal, and samples and holds the analog input signal, comprising a differential amplifier, a first capacitor, one terminal of the... |
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US20110133974 |
SWITCHED-CAPACITOR INPUT CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER INCLUDING THE SAME
A switched-capacitor input circuit which receives an analog input signal, and samples and holds the analog input signal, comprising a differential amplifier, a first capacitor, one terminal of the... |
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US20100001889 |
Current-Time Digital-to-Analog Converter
A high resolution digital-to-analog converter comprises a programmable n-bit current digital-to-analog converter (IDAC), an m-bit programmable counter/timer, an integrator that converts the IDAC... |
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US20100026536 |
SAMPLE-HOLD CIRCUIT HAVING SPREADING SWITCH AND ANALOG-DIGITAL CONVERTER USING SAME
A sample-hold circuit includes a voltage-current converter, having a first input terminal pair to which an input differential signal is input and a first output terminal pair which outputs current... |
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US20110018751 |
FOLDING ANALOG-TO-DIGITAL CONVERTER
A folding analog-to-digital converter including: a reference voltage generator, a track-and-hold circuit and a first pre-amplification circuit. The reference voltage generator generates a... |
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US20090116373 |
SIGNAL PROCESSOR HAVING A SAMPLING ARRANGEMENT
In a signal processor, a sampling arrangement (SH11, S12, SH13, ADC1) samples at least a first signal (YA) and a second signal (UA, VA) so as to obtain sampled first signal (YD1) and a sampled... |
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US20110090105 |
Fast Readout Method and Switched Capacitor Array Circuitry for Waveform Digitizing
A method relates to a technique for reducing the readout time of switched capacitor array circuitries. An implementation is a SCA chip capable of sampling 12 differential input channels at a... |