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US20090167578 |
ANALOG-TO-DIGITAL CONVERTER AND COMMUNICATION DEVICE AND WIRELESS TRANSMITTER AND RECEIVER USING THE SAME
In a wireless transmitter and receiver, a background calibration type analog-to-digital converter generally occupies a large area because of the phase compensating capacity of an op-amp included... |
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US20150138004 |
METHOD FOR CALIBRATING A PIPELINED CONTINUOUS-TIME SIGMA DELTA MODULATOR
Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a... |
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US20120262319 |
METHOD FOR CALBRATING A PIPELINED CONTINUOUS-TIME SIGMA DELTA MODULATOR
Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a... |
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US20120086590 |
METHOD FOR CALBRATING A PIPELINED CONTINUOUS-TIME SIGMA DELTA MODULATOR
Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a... |
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US20150097710 |
ADC CALIBRATION
An analog-to-digital converter (ADC) includes a plurality of comparators connected to the ADC. The ADC further includes a plurality of switches, wherein switches connected to a corresponding... |
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US20120133535 |
Interleaved Pipelined Binary Search A/D Converter
The present invention is related to a pipelined analog-to-digital converter, ADC, for converting an analog input signal into a digital signal comprising—a plurality of comparing means having... |
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US20120223848 |
Calibration Device for Mobile Terminal and ADC Module Thereof
The present invention relates to the field of mobile terminal technology and describes a calibration device for a mobile terminal and an ADC module thereof, the ADC module being disposed inside a... |
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US20150116138 |
SYSTEM AND METHOD OF IMPROVING STABILITY OF CONTINUOUS-TIME DELTA-SIGMA MODULATORS
An analog-to-digital converter (ADC) can include a continuous-time delta sigma modulator and calibration logic. The calibration logic can calibrate direct feedback and flash clock delay... |
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US20110137604 |
REAL-TIME ADAPTIVE HYBRID BiST SOLUTION FOR LOW-COST AND LOW-RESOURCE ATE PRODUCTION TESTING OF ANALOG-TO-DIGITAL CONVERTERS
An integrated circuit configured to perform hybrid built in self test (BiST) of analog-to-digital converters (ADCs) is described. The integrated circuit includes an ADC. The integrated circuit... |
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US20100007535 |
Circuit with Calibration Circuit Portion
In an embodiment, a circuit is disclosed comprising a circuit portion coupled to a terminal and a calibration circuit portion coupled to said terminal. |
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US20120326903 |
METHOD AND APPARATUS FOR PERFORMING NONLINEARITY CALIBRATION
A method for performing nonlinearity calibration includes the steps of: obtaining temporarily values of a plurality of compensation parameters by performing a perturbation-based calibration... |
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US20100182175 |
Current Sensing and Background Calibration to Match Two Resistor Ladders
In one embodiment, a first resistor ladder includes a first voltage across the first resistor ladder. A second resistor ladder includes a second voltage across the second resistor ladder. A third... |
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US20150249459 |
ELECTRONIC SYSTEM AND OPERATING METHOD THEREOF
To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an... |
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US20140333459 |
ELECTRONIC SYSTEM AND OPERATING METHOD THEREOF
To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an... |
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US20110199244 |
Pipelined ADC Calibration
A method of calibrating a pipelined analog to digital converter (400) having a plurality of DAC elements (410) and an additional calibration DAC element (420), in which a combination of positive,... |
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US20130015990 |
TRACK AND HOLD ARCHITECTURE WITH TUNABLE BANDWIDTH
To date, bandwidth mismatch within time-interleaved (TI) analog-to-digital converters (ADCs) has been largely ignored because compensation for bandwidth mismatch is performed by digital... |
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US20090284629 |
A/D CONVERTER-INCORPORATED SOLID-STATE IMAGING DEVICE
The solid-state imaging device includes: a first node for receiving a first signal from outside the solid-state imaging device; a second node for receiving a second signal from outside the... |
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US20130050000 |
Synthesis Method Of Sigma-delta Modulator Capable Of Relaxing Circuit Specification And Reducing Power
A synthesis method of Sigma-Delta modulator capable of relaxing circuit specification and reducing power consumption, comprising the following steps: firstly, set a target bandwidth and a target... |
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US20110316730 |
ANALOG UNIT
An ADC code given in response to input of an analog input value to an A/D converter circuit is measured at a site where an A/D converter unit is used to measure a user-measured value. A user-set... |
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US20120249351 |
ADC CALIBRATION
An analog-to-digital converter (ADC) including a plurality of comparators connected to the ADC. The ADC further includes a first pair of terminals and a second pair of terminals connected to each... |
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US20110037632 |
ADC CALIBRATION
An analog to digital convertor (ADC) includes a plurality of comparators one of which is referred to as an auxiliary comparator (e.g., comparator “Aux”). This comparator Aux is calibrated in the... |
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US20110043395 |
DIGITAL BACKGROUND CALIBRATION IN PIPELINED ADCS
Digital background calibration in a pipelined ADC is performed by extracting a capacitor mismatch value Δ that represents a mismatch between a sampling capacitor C1 and a feedback capacitor C2 in... |
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US20130106631 |
INTERLEAVED ADC CALIBRATION
The present disclosure includes calibration circuitry for adjusting the bandwidth of at least one sub-converter of an interleaved analog to digital converter (ADC), the at least one sub-converter... |
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US20100073206 |
ANALOG-TO-DIGITAL CONVERSION CIRCUITS AND METHOD FOR CALIBRATING THEREOF
An analog-to-digital conversion circuit is provided and includes an input unit, at least one analog-to-digital converter, and a processing unit. The input unit receives an analog input signal and... |
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US20140333460 |
MEMORYLESS SLIDING WINDOW HISTOGRAM BASED BIST
A chip with a built-in self-test (BIST) component capable of testing the linearity of an ADC is described herein. The BIST component uses hardware registers to facilitate a sliding histogram... |
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US20110037630 |
VOLTAGE MODE DAC WITH CALIBRATION CIRCUIT USING CURRENT MODE DAC AND ROM LOOKUP
The invention is a novel scheme of calibrating a voltage-mode digital to analog converter using a current-mode digital to analog converter. A DAC system is comprised of a voltage-mode DAC with an... |
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US20130307712 |
CALIBRATING TIMING, GAIN AND BANDWIDTH MISMATCH IN INTERLEAVED ADCs USING INJECTION OF RANDOM PULSES
A method and a corresponding device for calibrating an interleaved analog-to-digital converter (ADC) involve injecting a pulsed, substantially-random signal into a plurality of channels in the... |
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US20120212359 |
ADC Calibration Apparatus
An analog-to-digital (ADC) calibration apparatus comprises a calibration buffer, a comparator and a digital calibration block. Each reference voltage is sent to a track-and-hold amplifier as well... |
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US20140167988 |
DIGITAL-TO-ANALOG CONVERTER (DAC) CIRCUIT AND WEIGHT ERROR ESTIMATION/CALIBRATION METHOD THEREOF
The present invention discloses a DAC circuit and a weight error estimation/calibration method thereof. In the method, an output switching circuit dynamically selects several conversion cells (at... |
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US20110309961 |
A/D CONVERSION CIRCUIT AND A/D CONVERSION METHOD
An analog-to-digital conversion circuit includes: comparators to compare an input analog signal and one of reference voltages corresponding to each operation in an analog-to-digital conversion; an... |
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US20090131010 |
ANALOG-DIGITAL CONVERTER CHIP AND RF-IC CHIP USING THE SAME
In a wireless receiving circuit of high data rate, a circuit area and current consumption occupied by an analog-digital converter increase. The present invention, in a wireless receiving circuit... |
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US20120169521 |
CALIBRATION OF TIME CONSTANTS IN A CONTINUOUS-TIME DELTA-SIGMA CONVERTER
A circuit for calibrating selective coefficients of a delta-sigma modulator is provided. The circuit includes a calibration logic module that is coupled to one of a plurality of stages of the... |
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US20120274492 |
METHOD FOR IMPROVING THE PERFORMANCE OF THE SUMMING-NODE SAMPLING CALIBRATION ALGORITHM
An integrated circuit allows for the isolation of the input of an analog-to-digital converter (ADC) from a summing-node (SNS) algorithm. The integrated circuit contains a gating device that is... |
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US20140203954 |
ADC TESTING
A histogram-based method for testing an electronic converter device, such as an analogue to digital converter, includes steps of defining at least one histogram hyperbin arranged to store hits for... |
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US20100164765 |
DAC calibration circuits and methods
Provided is a DAC with tuning circuitry in accordance with some embodiments for tuning current sources in the DAC. The DAC may be used for a sigma-delta converter in some embodiments. |
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US20120007757 |
DIGITAL-TO-ANALOG CONVERTER (DAC) CALIBRATION SYSTEM
The present invention relates generally to a digital-to-analog converter (DAC) calibration. The present invention may be implemented by a DAC calibration system including a first current source, a... |
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US20100039302 |
Correlation-based background calibration of pipelined converters with reduced power penalty
A device and method for correlation-based background calibration of pipelined converters with a reduced power penalty. A pipelined analog-to-digital converter (ADC) utilizes a random or... |
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US20080266153 |
HIGH RESOLUTION DIGITAL ANALOG CONVERSION CIRCUIT
To increase the accuracy and resolution of an m bit digital analog converter, n bit input values with n>m are fed to a control circuit and converted to a series of control values for the digital... |
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US20090322574 |
TIME-TO-DIGITAL CONVERSION WITH DELAY CONTRIBUTION DETERMINATION OF DELAY ELEMENTS
A time-to-digital converter includes at least one chain of delay elements, a status of which represents a digital signal relating to a time interval to be converted. The converter includes a... |
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US20100045496 |
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
A semiconductor device is described which includes a first comparator judging the level of an input signal based on a first judgment value, a second comparator judging the level of the input... |
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US20120001784 |
Integrating (SLOPE) DAC Architecture
A current source is used to pre-charge a capacitor to a known value. The capacitor can then be connected to a unity gain buffer to provide a low cost DAC. The DAC can include a self-calibration... |
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US20130335246 |
A/D Converter reference calibration
Calibrating of A/D converters is carried out by obtaining adjustable reference voltages which are used in in A/D conversion, comparing a first divided reference voltage of a full range voltage... |
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US20140266824 |
CALIBRATION OF A SWITCHING INSTANT OF A SWITCH
An apparatus for calibration of a signal converter is disclosed. This apparatus includes a first digital-to-analog converter (“DAC”) and a calibration system coupled to an output port of the first... |
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US20130127648 |
SAMPLING
There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for... |
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US20110304361 |
TIME-TO-DIGITAL CONVERTER WITH CALIBRATION
Time-to-digital converter arrangements and corresponding methods as well as applications thereof are described. The time-to-digital converter in a first mode is coupled with a calibration signal... |
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US20100085227 |
Stage-Resolution Scalable Opamp-Sharing Technique for Pipelined/Cyclic ADC
An analog-to-digital converter (ADC) for pipelined ADCs or cyclic ADCs is disclosed. The ADC includes at least one pair of two stages connected in series, and the two stages have different bits of... |
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US20110122006 |
CALIBRATION METHOD AND RELATED CALIBRATION APPARATUS FOR CAPACITOR ARRAY
A capacitor array includes a plurality of capacitor components each having a first node and a second node, and first nodes of the capacitor components are coupled to each other. A calibration... |
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US20100073207 |
Delta-Sigma Analog-to-Digital Converters and Methods to Calibrate Delta-Sigma Analog-to-Digital Converters
Delta-sigma analog-to-digital converters (ADCs) and methods to calibrate methods to delta-sigma ADCs are disclosed. In one particular example, a delta-sigma ADC is described, including an n-bit... |
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US20120133536 |
DAC CALIBRATION
Mechanisms to calibrate a digital to analog converter (DAC) of an SDM (sigma delta modulator) are disclosed. An extra DAC element in addition to the DAC is used to function in place of a DAC... |
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US20110037631 |
DAC CALIBRATION
Mechanisms to calibrate a digital to analog converter (DAC) of an SDM (sigma delta modulator) are disclosed. An extra DAC element in addition to the DAC is used to function in place of a DAC... |