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US20110304487 FLOATING POINT TIMER TECHNIQUES  
Aspects of the present disclosure relate to floating point timers and counters that are used in a variety of contexts. In some implementations, a floating point counter can be used to generate a...
US20070170970 SEMICONDUCTOR DEVICE AND DATA INPUT/OUTPUT SYSTEM  
There is provided a semiconductor device that operates at an internal clock based on a system clock and inputs/outputs data in synchronization with the internal clock. The semiconductor device...
US20150180456 3D CLOCK DISTRIBUTION CIRCUITS AND METHODS  
An integrated circuit includes a clock source tier and at least two clock distribution tiers disposed in a vertical stack with the clock source tier. The clock source tier includes a clock...
US20110215855 VOLTAGE GENERATING CIRCUIT  
A voltage generating circuit has: an operational amplifier, first to third voltage generating units, a first resistor and a second resistor. The operational amplifier generates a control signal...
US20150070067 3D CLOCK DISTRIBUTION CIRCUITS AND METHODS  
An integrated circuit includes a clock source tier and at least two clock tree tiers disposed in a vertical stack with the clock source tier. The clock source tier includes a clock circuit, and...
US20090115467 Semiconductor device and operation method thereof  
A semiconductor memory device can optimize the layout area and current consumption based on multi-phase clock signals which are generated by dividing a source clock signal using a reset signal...
US20090128213 INTEGRATED CIRCUIT CLOCK STRUCTURE  
An integrated circuit includes first and second circuits, and a clock structure. The clock structure consists of a crystal oscillation circuit, a plurality of buffers, and a plurality of clock...
US20100327982 INVERTING DIFFERENCE OSCILLATOR  
The described embodiments provide a configurable pulse generator circuit. More specifically, the described embodiments include a pulse generator circuit; an inverting difference oscillator (IDO)...
US20100253409 CLOCK GENERATION SYSTEM AND CLOCK DIVIDING MODULE  
A clock gating system includes a clock divider, a first clock gating unit and a second clock gating unit. The clock divider is employed to generate clock signals with different frequencies. The...
US20100001778 A/B-Phase Signal Generator, RD Converter and Angle Detection Unit  
An A/B-phase signal generator wherein an up/down count unit 52C counts up by an up-count command or counts down by a down-count command at fixed intervals, an angle comparison unit 51 compares the...
US20110234286 Three-Phase Generator for Motor Control  
A pulse generator that can generate pulses separated by 120 degrees phase on each of three separate phase output leads for use with a 3-phase motor power driver. These output pulses can be of any...
US20090267674 Clock control circuit and semiconductor memory device using the same  
A clock control circuit comprises a control signal generating unit configured to generate a control signal disabled in a predetermined state while in an active mode, and a clock transferring unit...
US20100019823 Semiconductor integrated circuit and control signal distributed method  
A semiconductor integrated circuit includes a plurality of areas, each of which generates phase clocks in accordance with an external clock and control signals and performs a predetermined process...
US20120212275 Gate Driving Circuit  
A gate driving circuit includes a first clock generator to output n output control clock pulses having different phases; a second clock generator to create m*n output clock pulses having different...
US20120092054 Charge pump with low noise and high output current and voltage  
The present invention discloses a charge pump system with low noise and high output current and voltage, comprising: a four phase clock generator used to generate a first signals group; a serial...
US20090174441 Peak Power Reduction Methods in Distributed Charge Pump Systems  
A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for...
US20130328605 Non-Overlapping Clock Generator  
A non-overlapping clock generator including an enabling module and N pulse-generating modules connected as a ring is provided. When the ith input node has a high voltage level, the enabling module...
US20080303575 PULSE GENERATING CIRCUIT AND UWB COMMUNICATION SYSTEM  
A pulse generating circuit includes a starting circuit which generates m (two or larger integer) starting signals at predetermined time intervals based on a generation starting signal, and m pulse...
US20140247080 MULTI-LEVEL CLOCK SIGNAL DISTRIBUTION NETWORK AND INTEGRATED CIRCUIT  
A multi-level clock signal distribution network comprises a plurality of lower network levels comprising at least a first lower network level and a lowermost network level that is connected to one...
US20110063000 HIERARCHICAL GLOBAL CLOCK TREE  
Methods, systems, and circuits for forming and operating a global hierarchical clock tree are described. The global hierarchical clock tree may comprise a clock circuit that operates to provide...
US20150234422 Tunable Sector Buffer for Wide Bandwidth Resonant Global Clock Distribution  
A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer...
US20110241749 Clock Distribution Circuit  
A circuit includes a clock generator to provide a clock signal, and a clock distribution circuit coupled to the clock generator and a plurality of pairs of outputs. The clock distribution circuit...
US20120146701 CLOCK SYSTEM AND METHOD FOR COMPENSATING TIMING INFORMATION OF CLOCK SYSTEM  
A clock system includes a clock signal generating circuit and a controlling circuit. The clock signal generating circuit is used for generating a primary clock signal and a reference clock signal...
US20110148486 CONTROLLED CLOCK GENERATION  
Methods and systems to generate multiple phases of a clock may include a delay locked loop (DLL) to generate a bias signal to control a delay time through DLL delay elements in response to a first...
US20100085099 MULTI-PHASE SIGNAL GENERATOR AND METHOD  
Multi-phase signal generators and methods for generating multi-phase signals are described. In one embodiment, the clock generator generates quadrature clock signals including those having 90,...
US20090302921 APPARATUS AND METHOD FOR GENERATING CLOCK SIGNALS OF SEMICONDUCTOR INTEGRATED CIRCUIT  
An apparatus for generating a clock signal of a semiconductor Integrated circuit includes a first clock driver block configured to generate a plurality of first clock signals, a second clock...
US20090102535 CLOCK SIGNAL CIRCUIT FOR MULTIPLE LOADS  
A clock signal circuit for multiple loads includes a clock generator and M loads. The clock generator includes N clock generator pins which output clock signals having a same frequency. The N...
US20140266377 HYBRID ANALOG/DIGITAL POINT-OF-LOAD CONTROLLER  
In one example, there is disclosed a hybrid analog-digital point-of-load controller (ADPOL) for use in a power supply. The ADPOL is configured to respond to transient current loads. In the...
US20090322399 CLOCK GENERATING CIRCUIT AND CLOCK GENERATING METHOD THEREOF  
A clock generating circuit, including a pulse generating unit to generate a plurality of pulse signals based on a reference clock, the pulse signals each having the same period, a phase difference...
US20100085100 Low-Power Clock Generation and Distribution Circuitry  
A communication IC includes a power-efficient clock-distribution system. A control loop monitors and adjusts the peak and trough voltages of a clock signal. The clock signal can be adaptively...
US20090243690 SINGLE-CLOCK-BASED MULTIPLE-CLOCK FREQUENCY GENERATOR  
In an embodiment of the present invention, a clock generator circuit is disclosed to include a phase locked loop (PLL) that is responsive to a clock signal quadrature output frequency and a clock...
US20100079175 PHASE DOUBLER  
A phase doubler driver circuit includes a first input for receiving a input PWM drive signal. First control logic generates a first output PWM drive signal and a second output PWM drive signal...
US20110019716 CLOCK GENERATING CIRCUIT, TRANSCEIVER AND RELATED METHOD  
A clock generating circuit includes: a phase detector for detecting a phase difference between an input clock and a reference clock to generate a control signal corresponding to the phase...
US20120013380 APPARATUS FOR GENERATING A PLURALITY OF DIFFERENT VOLTAGE LEVEL CLOCK SIGNALS  
A system is provided for generating a plurality of different voltage level clock signals. The system comprises an electrical energy storage pack having a plurality of series coupled electrical...
US20140333364 TUNABLE CLOCK DISTRIBUTION SYSTEM  
A memory-like structure composed of variable resistor elements for use in tuning respective branches and leaves of a clock distribution structure, which may be used to compensate for chip-by-chip...
US20100134171 CLOCK GENERATION CIRCUIT AND INTEGRATED CIRCUIT  
A clock generation circuit comprises: a first generation unit; a second generation unit; and a control unit that, using a plurality of third delay elements that respectively have a propagation...
US20090302918 CLOCK SIGNAL GENERATION APPARATUS  
A clock signal generation apparatus containing variable delay devices for varying the delay time of two-phase clock signals used in a load circuit that uses non-overlap clock signals; a...
US20090102529 SHIFTING INACTIVE CLOCK EDGE FOR NOISE REDUCTION  
An integrated circuit and a design structure are disclosed. An integrated circuit may comprise: multiple clocked elements; a clock signal source providing clock signals to the multiple clocked...
US20120182058 NEGATIVE CHARGE PUMP  
A charge pump includes a first node configured to receive a first voltage and a second node coupled to the first node through a first transistor. The second node is configured to output a voltage...
US20070216464 Circuit for distributing an initial signal with a tree structure, protected against logic random events  
An embodiment of the invention relates to a circuit for distributing an initial signal, comprising an input node receiving the initial signal, a plurality of terminal nodes each providing at least...
US20140035646 Phase Shift Generating Circuit  
A phase shift generation circuit has an edge detector for generating first and second edge signals indicating first and second edges of an input pulse signal. The circuit comprises a divide by N...
US20140002167 DIFFERENTIAL CLOCK SIGNAL GENERATOR  
Disclosed is a differential clock signal generator which processes a first differential clock signal using a combination of differential and non-differential components to generate a second...
US20080315933 PULSE SYNTHESIS CIRCUIT  
A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n...
US20090009228 CLOCK GENERATING APPARATUS  
A clock generating apparatus includes a clock generator and a controllable delay line. The clock generator receives an external clock signal and generates multiple clock signals having different...
US20100182066 Clock Generating Circuit  
A main (sub) clock circuit comprising a first (second) capacitor, a first (second) current-supply circuit to supply to the first (second) capacitor a first (third) current for charging at a...
US20090121767 SIGNAL PROCESSING APPARATUS  
The real number counter subtracts the positive integer C if the count value RC is equal to or larger than 0, or adds (the positive integer B-C) and outputs a Carry if the count value RC is...
US20110248763 CHARGE PUMPING CIRCUIT  
A charge pumping circuit is provided to regulate the amount of charge to be pumped according to a driving voltage to reduce the loss of power and increase charge pumping efficiency. The charge...
US20130039385 CLOCK GENERATING CIRCUIT, TRANSCEIVER AND RELATED METHOD  
A clock generating circuit includes: a phase detector for detecting a phase difference between an input clock and a reference clock to generate a control signal corresponding to the phase...
US20140152366 CONCURRENT TRUE AND COMPLEMENT SIGNAL GENERATION  
A circuit generates low-skew true and complement output signals from an input signal using an inverter, true signal generation circuitry, and complement signal generation circuitry. The inverter...
US20080164927 Low-Phase Noise Low-Power Accurate I/Q Generator Using A Dynamic Frequency Divider  
A signal generator and method for generating a plurality of signals of differing phase. The signal generator comprises a first single-phase frequency divider locked with a 90° phase shift that...

Matches 1 - 50 out of 85 1 2 >