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US20070182455 AND type match circuit structure for content-addressable memories  
This invention provides An AND type match circuit structure for content-addressable memories adopting the Pseudo-Footless Clock-and-Data Pre-charged Dynamic circuit as an AND type match circuit...
US20080061836 Current Mirror and Parallel Logic Evaluation  
Methods, apparatuses, and systems to improve performance of integrated circuits are discussed. Some embodiments comprise methods to increase rates of logic evaluation in integrated circuits. The...
Matches 1 - 2 out of 2