Matches 1 - 26 out of 26


Match Document Document Title
US20070262791 Integrated Circuit to Store a Datum  
An integrated circuit includes a programmable circuit with a programmable element, and a storage circuit to store a storage state depending on a programming state of the programmable element of...
US20090309631 CIRCUIT WITH ENHANCED MODE AND NORMAL MODE  
Circuit with enhanced mode and normal mode is provided and described. In one embodiment, switches are set to a first switch position to operate the circuit in the enhanced mode. In another...
US20130285703 ASYMMETRICAL BUS KEEPER  
Various embodiments are described herein for an asymmetrical bus keeper circuit that provides asymmetrical drive towards one logic level. The asymmetrical bus keeper circuit comprises a first...
US20130093465 ASYMMETRICAL BUS KEEPER  
Various embodiments are described herein for an asymmetrical bus keeper circuit that provides asymmetrical drive towards one logic level. The asymmetrical bus keeper circuit comprises a first...
US20090045845 Adjusting Output Buffer Timing Based on Drive Strength  
This invention operates to select a drive code for an adjustable drive strength transistor in a drive buffer. The drive code is determined employing a scaled-down drive transistor employing...
US20080122489 COMMUNICATION INTERFACE EMPLOYING A DIFFERENTIAL CIRCUIT AND METHOD OF USE  
A communication interface employing a differential circuit and method of use is disclosed. In one form, a circuit operable to communicate signals via a communication bus can include a differential...
US20070093979 Computer device configuration system and method  
A configuration method for a computer device comprises generating a load condition on at least one serial bus link using a plurality of differential voltage levels, determining a minimum voltage...
US20090140772 ARCHITECTURE FOR VBUS PULSING IN UDSM PROCESSES  
Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging...
US20110204922 Receiver to Match Delay for Single Ended and Differential Signals  
In one embodiment, a receiver circuit is provide that may receive either a differential input or a single-ended input corresponding to an interface. The receiver circuit may include at least two...
US20050280442 Semiconductor integrated circuit  
To obtain a delay circuit which does not involve an increase in a circuit area occupied by load transistors even when the number of inverters is increased, an integrated circuit device has four...
US20100207661 BI-DIRECTIONAL BUFFER FOR OPEN-DRAIN OR OPEN-COLLECTOR BUS  
Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output...
US20090289662 BRIDGE DESIGN FOR SD AND MMC DATA BUSES  
A circuit with bi-directional signal transmission, including a first signal source, for generating a first signal comprising one bit per clock cycle during a first plurality of clock cycles, a...
US20090278251 Pad Structure for 3D Integrated Circuit  
This invention discloses an I/O pad structure in an integrated circuit (IC) which comprises a first vertical region in the IC including a top metal layer and one or more semiconductor devices...
US20060125522 Output stage, amplifier control loop and use of the output stage  
An output stage includes a first transistor pair with a first conductivity type and a second transistor pair with a second conductivity type. The source connections of the first and second...
US20090153192 BI-DIRECTIONAL BUFFER FOR OPEN-DRAIN OR OPEN-COLLECTOR BUS  
Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output...
US20050258869 Balanced line output stage circuit providing reduced electromagnetic interference  
A differential line output cell (10) contains a current source (M1,M2) having an output; a plurality of switches (S1,S2,S3,S4) arranged in a bridge configuration and coupled between the output of...
US20150155868 INTELLIGENT CURRENT DRIVE FOR BUS LINES  
An intelligent current drive is disclosed that couples an active current source to a bus line to increase the rate of pull-up and decouples the active current source from the bus line prior to...
US20060066352 Low-voltage, low-skew differential transmitter  
A differential transmitter uses an H-bridge driver with upper and lower current paths switched in opposite phases. Switching occurs at the lowest level of each column of the H-bridge driver,...
US20120187980 TRANSMITTER CIRCUIT  
A transmitter circuit in which a driver circuit includes MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential...
US20100102853 Circuitry and Methods Minimizing Output Switching Noise Through Split-Level Signaling and Bus Division Enabled by a Third Power Supply  
Disclosed herein are circuitry and methods for transmitting data across a parallel bus using both high common mode and low common mode signaling. The transmitter stages are configured to work with...
US20080129341 SEMICONDUCTOR APPARATUS  
A semiconductor apparatus that is effective for problems of local characteristic variations and that enables higher speed and lower power consumption. Semiconductor apparatus 100 has: a plurality...
US20090085608 Systems, methods and devices for arbitrating die stack position in a multi-bit stack device  
Embodiments are described for arbitrating stacked dies in multi-die semiconductor packages. In one embodiment, die identification data for at least two stacked dies are arbitrated to select one of...
US20110234259 OPPORTUNISTIC BUS ACCESS LATENCY  
A bus system that includes a plurality of signal driving devices coupled to a common signal bus, a bus controlled circuit coupled to the common signal bus, and a compare circuit. The plurality of...
US20100164546 CIRCUIT SYSTEM INCLUDING FIRST CIRCUIT SUB-SYSTEM, SECOND CIRCUIT SUB-SYSTEM AND BIDIRECTIONAL BUS, CIRCUIT SUB-SYSTEM AND METHOD  
A circuit system has a first and a second circuit sub-system, and a bidirectional bus, the first circuit sub-system having a first control circuit that receives a control signal for controlling...
US20160065211 LOW POWER DRIVER WITH PROGRAMMABLE OUTPUT IMPEDANCE  
A low power programmable driver includes a first driver output, a first programmable driver leg and a second programmable driver leg. The first programmable driver leg has a pull-up half and a...
US20110199120 SEMICONDUCTOR INTEGRATED CIRCUIT  
A semiconductor integrated circuit capable of reducing unnecessary current consumption includes a plurality of bus drive circuits for receiving data input, a common bus coupled to the bus drive...

Matches 1 - 26 out of 26