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Document Title 

US20130234754 
MAJORITY DOMINANT POWER SCHEME FOR REPEATED STRUCTURES AND STRUCTURES THEREOF
Methods and structures for configuring an integrated circuit including repeated cells that are divided into banks having a respective power assist and a respective operational assist are provided.... 

US20150028920 
MULTIPLEXER, LOOKUP TABLE AND FPGA
The present invention relates to a multiplexer comprising at least a first input and a second input and one output connected to the first input via a first pass gate and to the second input via a... 

US20150102836 
PLD EDITOR AND METHOD FOR EDITING PLD CODE
A PLD editor and method for editing PLD code to be programmed into a PLD are provided. The PLD editor includes an interface, a storage system, and a processing system configured to obtain a PLD... 

US20140210512 
Rescaling
A novel method for designing an integrated circuit (“IC”) by rescaling an original set of circuits in a design of the IC is disclosed. The original set of circuits to be rescaled includes... 

US20120176155 
RESCALING
A novel method for designing an integrated circuit (“IC”) by resealing an original set of circuits in a design of the IC is disclosed. The original set of circuits to be resealed includes... 

US20100013517 
RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AND METHODS FOR CONFIGURING RECONFIGURABLE LOGIC FABRICS
In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics (302, 304) for integrated circuits and methods for designing asynchronous circuits to... 

US20120124257 
MULTICHIP MODULE FOR COMMUNICATIONS
An embodiment of a multichip module is disclosed. For this embodiment of the multichip module, a transceiver die has transceivers. A crossbar switch die has at least one crossbar switch. A... 

US20110316584 
FINGERPRINTED CIRCUITS AND METHODS OF MAKING AND IDENTIFYING THE SAME
A circuit having a fingerprint for identification of a particular instantiation of the circuit is disclosed. The circuit may include a plurality of digital circuits or gates. Each of the digital... 

US20130049801 
FPGA configuration equipment and configuration method
An FPGA (FieldProgrammable Gate Array) configuration equipment for sending configuration files stored in a smart card to an FPGA, includes a microprocessor, an FPGA interface connected with the... 

US20120105101 
MAGNETIC LOGIC GATE
This disclosure is directed to a magnetic logic gate for implementing a combinational logic function. The magnetic logic gate may include a write circuit configured to apply a spinpolarized... 

US20070139074 
Configurable circuits with microcontrollers
Configurable circuits with microcontrollers are described herein. The microcontrollers may perform a variety of functions including the control of configurations of the configurable circuits. 

US20140028347 
IMPLEMENTING LOGIC CIRCUITS WITH MEMRISTORS
Implementing logic with memristors may include circuitry with at least three memristors and a bias resistor in a logic cell. One of the at least three memristors is an output memristor within the... 

US20050270061 
Configurable logic circuit
A configurable logic circuit having a plurality of logic blocks and a connecting structure, via which the logic blocks are interconnectable, wherein the logic blocks are implemented in dual rail... 

US20090179667 
RECONFIGURABLE LOGIC CIRCUIT
It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin... 

US20130002294 
PROGRAMMABLE CIRCUIT
Provided is a programmable circuit. The programmable circuit includes a first path and a second path connected in parallel between a first voltage node and a second voltage node. The first path... 

US20070186203 
Reconfigurable logic block, programmable logic device provided with the reconfigurable logic block, and method of fabricating the reconfigurable logic block
A reconfigurable logic block has a first circuit that configures an arithmetic circuit and a second circuit that configures a circuit outside of the arithmetic circuit. A plurality of different... 

US20130314122 
APPLICATIONSPECIFIC INTEGRATED CIRCUIT EQUIVALENTS OF PROGRAMMABLE LOGIC AND ASSOCIATED METHODS
Providing ASIC equivalents of FPGAs is facilitated and made more efficient and economical by using an ASIC architecture including a plurality of socalled hybrid logic elements (“HLEs”), each of... 

US20130002295 
APPLICATIONSPECIFIC INTEGRATED CIRCUIT EQUIVALENTS OF PROGRAMMABLE LOGIC AND ASSOCIATED METHODS
Providing ASIC equivalents of FPGAs is facilitated and made more efficient and economical by using an ASIC architecture including a plurality of socalled hybrid logic elements (“HLEs”), each of... 

US20150137851 
Configurable IC's With Large Carry Chains
Some embodiments provide a configurable IC that includes several configurable logic circuits, where the logic circuits include several sets of associated configurable logic circuits. For each... 

US20130038347 
CONFIGURABLE IC'S WITH LARGE CARRY CHAINS
Some embodiments provide a configurable IC that includes several configurable logic circuits, where the logic circuits include several sets of associated configurable logic circuits. For each... 

US20110031998 
CONFIGURABLE IC'S WITH LARGE CARRY CHAINS
Some embodiments provide a configurable IC that includes several configurable logic circuits, where the logic circuits include several sets of associated configurable logic circuits. For each... 

US20090153187 
Monolithically integrated interface circuit
The invention relates to integrated circuits comprising a monolithically integrated logic IC and a monolithically integrated interface circuit that is conductively connected to the logic IC. The... 

US20130099819 
NONSEQUENTIALLY CONFIGURABLE IC
Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a... 

US20120217995 
Reconfigurable memristrobased computing logic
An apparatus for reconfigurable computing logic implemented by an innovative memristor based computing architecture. The invention employs a decoder to select memristor devices whose ON/OFF... 

US20150145558 
METHOD FOR CREATING DIGITAL CIRCUITS OF A FEEDBACK CONTROL SYSTEM THAT IMPLEMENTS AN APPROXIMATION TECHNIQUE FOR MODEL PREDICTIVE CONTROL (MPC)
Method for creating digital circuits of an MPC controller (2), which implements an approximation technique for Model Predictive Control (MPC), in which a quadratic programming (QP) or linear... 

US20080278196 
LOGIC CIRCUITS HAVING DYNAMICALLY CONFIGURABLE LOGIC GATE ARRAYS
A logic gate array for implementing logical expressions is provided. The array includes a dynamically configurable logic gate having a chaotic updater for causing the logic gate to alternately... 

US20150171868 
COMPUTATION OF BOOLEAN FORMULAS USING SNEAK PATHS IN CROSSBAR COMPUTING
Memristorbased nanocrossbar computing is a revolutionary computing paradigm that does away with the traditional Von Neumann architectural separation of memory and computation units. The... 

US20150200673 
METHOD OF OUTPUTTING POSITIONING PULSE BY PLC
A method of outputting a positioning pulse by a programmable logic controller (PLC) is provided. The method includes setting up the desired cycle of a pulse to be output; determining a number of... 

US20140077837 
LOGIC CIRCUIT DEVICE COMPRISING AT LEAST ONE DIGITAL INPUT
The invention pertains to a logic circuit device comprising at least one digital input furnished with a fuse (FUS) being, in the closed state, suitable for applying an electrical input voltage of... 

US20090096481 
SCHEDULER DESIGN TO OPTIMIZE SYSTEM PERFORMANCE USING CONFIGURABLE ACCELERATION ENGINES
A reusable hardware control structure is provided for a hardware acceleration engine that can be configured for implementation within an electronic integrated circuit design according to any one... 

US20120217997 
NONVOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME
A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected... 

US20120217996 
NONVOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME
A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected... 

US20120112787 
NONVOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME
A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected... 

US20120068732 
NONVOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME
A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected... 

US20090219051 
HYBRID NANOTUBE/CMOS DYNAMICALLY RECONFIGURABLE ARCHITECTURE AND AN INTEGRATED DESIGN OPTIMIZATION METHOD AND SYSTEM THEREFOR
A hybrid nanotube, highperformance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A runtime reconfigurable architecture... 

US20090189637 
Machine for programming onboard chipsets
The present invention discloses a machine for programming onboard chipsets, wherein the onboard chipsets means that some chipsets are mounted on a circuit board, and the circuit board has a... 

US20090002022 
CONFIGURABLE IC WITH DESKEWING CIRCUITS
Some embodiments provide a configurable integrated circuit (IC) comprising multiple deskew circuits for delaying data passage. Each of the deskew circuits comprises a stepwise delay circuit with... 

US20100061166 
DYNAMIC REALTIME DELAY CHARACTERIZATION AND CONFIGURATION
In mask programmable integrated circuit, such as a structured ASIC, a delay chain provides a delay that is set by a mask programmable switch. The delay chain receives an input to allow the delay... 

US20120319727 
CONFIGURABLE REFERENCE CIRCUIT FOR LOGIC GATES
This disclosure is directed to techniques for generating a reference current based on a combinational logic function that is to be performed by a magnetic logic device. A comparator circuit may... 

US20090140767 
Universal circuit for secure function evaluation
An exemplary method enables implementation of a universal circuit capable of emulating each gate of a circuit designed to calculate a function. A first selection module receives inputs associated... 

US20120212255 
Logic Circuit, Integrated Circuit Including The Logic Circuit, And Method Of Operating The Integrated Circuit
The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected... 

US20080197877 
Per byte lane dynamic ondie termination
Embodiments of the invention are generally directed to systems, methods, and apparatuses for per byte lane dynamic ondie termination. In some embodiments, an integrated circuit includes logic to... 

US20120105103 
MAGNETIC LOGIC GATE
This disclosure is directed to a magnetic logic device for implementing a combinational logic function. The magnetic logic device may include a network of at least two magnetoresistive devices... 

US20080278197 
PROGRAMMABLE LOGIC DEVICE WITH EMBEDDED SWITCH FABRIC
The invention in the simplest form is a programmable logic device consisting of gate arrays, external I/O endpoints, and an embedded switch fabric configurable for connecting gates to gates,... 

US20130069691 
INTEGRATED CIRCUIT HAVING A STANDARD CELL AND METHOD FOR FORMING
An integrated circuit includes a first plurality of transistors and a second plurality of transistors coupled together to form a standard cell that performs a logic function. Each of the first... 

US20120105102 
MAGNETIC LOGIC GATE
This disclosure is directed to a magnetic logic device for implementing a combinational logic function. The magnetic logic device may include a chain of at least two magnetoresistive devices... 

US20090267643 
FLEXIBLE ADDER CIRCUITS WITH FAST CARRY CHAIN CIRCUITRY
Configurable adder circuitry is provided on an integrated circuit that includes redundant circuitry. The integrated circuit may contain nonvolatile memory and logic circuitry that produces a... 

US20090080260 
Programmable CSONOS logic element
A complementary SONOStype (CSONOS) logic device is programmed and erased with a common voltage. The CSONOS device retains data integrity over extended read endurance cycles. 

US20080258759 
UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING
A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other microcontroller elements, peripherals and external Inputs... 

US20120119781 
RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AND METHODS FOR CONFIGURING RECONFIGURABLE LOGIC FABRICS
In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics for integrated circuits and methods for designing asynchronous circuits to be... 