Matches 1 - 50 out of 188 1 2 3 4 >


Match Document Document Title
US20120119777 Dynamic Voltage and Frequency Management  
In one embodiment, an integrated circuit includes a self calibration unit configured to iterate a test on a logic circuit in the integrated circuit at respectively lower supply voltage magnitudes...
US20100315110 HERMETICITY TESTING  
Electrical circuit apparatus and methods including hermeticity testing structures for testing the hermeticity of the electrical circuit apparatus.
US20120161807 SINGLE LEVEL OF METAL TEST STRUCTURE FOR DIFFERENTIAL TIMING AND VARIABILITY MEASUREMENTS OF INTEGRATED CIRCUITS  
A test structure for an integrated circuit device includes one or more experiments selectively configured to receive one or more high-speed input signals as inputs thereto and to output at least...
US20060125504 Printed circuit board for burn-in testing  
A burn-in PCB comprising an adapter socket for receiving at least one program card; a plurality of test sockets for receiving test components; wherein one or more of the test sockets are...
US20090315578 PROBE AND PROBE CARD FOR INTEGRATED CIRCUIT DEVICES USING THE SAME  
A vertical probe comprises a linear body, a tip portion connected to one side of the linear body, and at least one slot positioned on the linear body. In particular, the vertical probe includes a...
US20050012516 Burn-in socket adapt to assembly sensor thereon  
A burn-in socket (1) includes a base (10) receiving an IC and a number of contacts (12) received in the base, and a pressing member (14). The base defines a slot (1024) in a wall thereof and...
US20070069745 PROBE CARD FOR INTEGRATED CIRCUITS  
A probe card for integrated circuit devices comprises a printed circuit board, at least one probe pin positioned on the printed circuit board, and at least one ultrasonic generator configured to...
US20080150569 Contactor with angled spring probes  
A spring probe contactor includes an angled spring probe configuration that causes the tips of the spring probes to “swipe” the contact pads/solder balls of an IC device under test as the contacts...
US20110082680 COMPACT MODEL FOR DEVICE/CIRCUIT/CHIP LEAKAGE CURRENT (IDDQ) CALCULATION INCLUDING PROCESS INDUCED UPLIFT FACTORS  
A system, method and computer program product for implementing a quiescent current leakage specific model into semiconductor device design and circuit design flows. The leakage model covers all...
US20080030210 Test socket  
A test socket includes a socket body (20) having a passageway (42), and a terminal (30) insertable into the passageway. The passageway has a portion with an interior contour (421) in a...
US20090230986 SEMICONDUCTOR INTEGRATED CIRCUIT, FUSE CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND CONTROL METHOD OF THE SAME  
A fuse circuit for a semiconductor integrated circuit includes a control unit configured to activate a fuse set control signal in response to an external command signal, and a plurality of fuse...
US20110080184 METHOD FOR TESTING THROUGH-SILICON-VIA AND THE CIRCUIT THEREOF  
The method and circuit for testing a TSV of the present invention exploit the electronic property of the TSV under test. The TSV under test is first reset to a first state, and is then sensed at...
US20090033352 HANDLER AND PROCESS FOR TESTING A SEMICONDUCTOR CHIPS USING THE HANDLER  
A test handler includes a loading unit including a loading picker and a loading ascending/descending unit, an unloading unit including an unloading picker and an unloading ascending/descending...
US20150198661 TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS  
Approaches for testing phase rotators are provided. A circuit for testing phase rotators includes a compare element including a first input and a second input, wherein the compare element is...
US20050258856 High-speed interface circuit test module, module under high-speed interface circuit test, and high-speed interface circuit test method  
In the shipment test of an LSI provided with a high-speed interface circuit, both cost reduction and a high test guarantee level are realized. The following are provided: a high-speed interface...
US20080007279 Probe Cards  
A probe card for testing IC circuits is provided that comprises a probe member for each IC contact that comprises a flexible membrane structure secured at two points to a reverse surface of a...
US20080143361 Automated loader for removing and inserting removable devices to improve load time for automated test equipment  
An SOC tester having test cards with memory cards is presented. The SOC tester may automatically swap memory cards between a memory card rack and a test head between tests on devices under test....
US20100244883 COMPENSATION FOR VOLTAGE DROP IN AUTOMATIC TEST EQUIPMENT  
Providing reliable testing of a device under test (DUT) by compensating for a reduced voltage inside the device without changing the internal circuitry of the device. The DUT has multiple...
US20090160466 SELF-ISOLATING MIXED DESIGN-RULE INTEGRATED YEILD MONITOR  
Assessing open circuit and short circuit defect levels in circuits implemented in state of the art ICs is difficult when using conventional test circuits, which are designed to assess continuity...
US20070236242 Integrated circuit with improved test capability via reduced pin count  
An integrated circuit that supports testing of multiple pads via a subset of these pads includes at least two sections. Each section has multiple pads and multiple test access circuits coupled to...
US20150247892 METHOD FOR THE CHARACTERIZATION AND MONITORING OF INTEGRATED CIRCUITS  
A method for characterizing an integrated circuit that includes ramping the supply voltage to an integrated circuit as a function of time for each of the transistors in the integrated circuit, and...
US20130262018 APPARATUS AND METHOD FOR IDDQ TESTS  
A method for conducting IDDQ tests for a device having a plurality of test sites is disclosed. The method includes identifying voltage ranges for each of the plurality of test sites, closing a...
US20130187677 SYSTEM AND METHOD FOR CALIBRATING CHIPS IN A 3D CHIP STACK ARCHITECTURE  
A system and method is disclosed for adaptively adjusting a driving strength of a signal between a first and second chip in a 3D architecture/stack. This may be used to adaptively calibrate a chip...
US20150123696 METHODOLOGY FOR TESTING INTEGRATED CIRCUITS  
An integrated circuit is disclosed. The integrated circuit includes input and output pads, a first integrated circuit portion having first circuitry, and a second integrated circuit portion having...
US20110025359 BOND AND PROBE PAD DISTRIBUTION  
An integrated circuit (IC) that includes a plurality of bond pads disposed on a surface of the IC and a plurality of probe pads disposed on the surface of the IC is provided. Each of the plurality...
US20050099196 Semiconductor inspection device based on use of probe information, and semiconductor inspection method  
A semiconductor inspection device and a method of inspection capable of reducing labor for species registration using a prober and of improving operation rate of the prober. The semiconductor...
US20070164729 Verification of Performance Attributes of Packaged Integrated Circuits  
Packaged integrated circuits (ICs) of some types, such as processors, are graded and sold according to a performance scale, such as maximum specified clock speed, set by the manufacturer as a...
US20070080703 Camera based pin grid array (PGA) inspection system with pin base mask and low angle lighting  
An inspection system, for inspecting pin grid arrays on integrated circuit devices includes a pin base mask configured to receive a device having a pin grid array. A dark-field, low-angle lighting...
US20090189622 Probe For Testing Integrated Circuit Devices  
A device for providing electrical contact comprises a first reciprocating conductive body having a first abutting body at one end, a second reciprocating conductive body having a second abutting...
US20110018575 METHOD AND SYSTEM FOR ASSESSING RELIABILITY OF INTEGRATED CIRCUIT  
The present invention provides a method. The method includes operating a plurality of field-effect-transistors (FETs) under a first operation condition; reversing an operation direction for at...
US20060028228 Test pads for IC chip  
The testing pads for multi-chip package are alternately placed at two ends or open area of the chip, so that the spacing between the test pads is wide enough for test probes to access.
US20080036487 Integrated circuit wearout detection  
An integrated circuit is provided with latency detecting circuitry for detecting signal generation latency within one or more functional circuits and in response thereto to generate a wearout...
US20060087331 System and method for a multisite, integrated, combination probe card and spider card  
System and method for a multisite, integrated combination probe card and spider card. A preferred embodiment comprises a series of signal pins configured to mate with test equipment, a socket...
US20070188160 Detection seat for IC detection device  
A detection seat for an IC detection device includes a frame and an integrated circuit coupling seat. The frame is mounted on a detection board of an integrated circuit detection device. The IC...
US20100045314 TEST STAGE FOR A CARRIER HAVING PRINTHEAD INTEGRATED CIRCUITRY THEREON  
This invention provides for a test stage for a printhead integrated circuit tester for testing operation of printhead integrated circuits mounted on a carrier. The test stage includes a support...
US20050231220 Terminal of IC test fixture  
A terminal of IC test fixture comprising a body, a spring contact arm and a soldering portion and there are at least one hollow holes on the body of the terminal. During testing, the electronic...
US20070222471 Front and back side dynamically-biased photon emission microscopy  
An apparatus for testing emissions from a packaged integrated circuit is described. The apparatus comprises an ATE for generating input stimulus to said integrated circuit, a universal PEM board....
US20090115440 TESTING INTEGRATED CIRCUITS  
A testing apparatus for a radiation sensing integrated circuit comprises a load board (101), a test socket (102), suitable for the device under test DUT (103), and a plunger (104). A radiation...
US20090224784 TESTING INTEGRATED CIRCUITS USING FEW TEST PROBES  
A method of testing integrated circuits, including: establishing at least a first physical communication channel between a test equipment and an integrated circuit under test by having at least a...
US20090091345 STRUCTURE FOR PROVIDING A DUPLICATE TEST SIGNAL OF AN OUTPUT SIGNAL UNDER TEST IN AN INTEGRATED CIRCUIT  
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure provides a duplicate test signal of an...
US20110241713 TEST STRUCTURE ACTIVATED BY PROBE NEEDLE  
A test structure (200) in an integrated circuit (100) includes a probe pad (210) disposed at a surface of a die (102) of the integrated circuit, a transmission gate (202) for connecting portions...
US20140285229 Testing Integrated Circuit Packaging for Shorts  
An electronic package that has an array of pins may be tested for shorts and continuity in a parallel manner. The array of pins are allocated to four or more groups of pins such that each pin in...
US20090085598 INTEGRATED CIRCUIT TEST SYSTEM AND METHOD WITH TEST DRIVER SHARING  
An integrated circuit test system and method for testing integrated circuits or chips is disclosed. One embodiment provides a test signal from a test driver via a primary test channel and...
US20060164115 Defect analyzing device for semiconductor integrated circuits, system therefor, and detection method  
The present invention aims at performing a semiconductor integrated circuit defect analysis with a simplified analysis apparatus and simplifying a defect analysis work. A defect analysis apparatus...
US20060038579 Rf chip testing method and system  
A method and system for testing RF chips for radio specification compliance is described. The system comprises a test board (80) having a plurality of interconnected sockets (82a,b,c) for...
US20110193581 SYSTEMS AND METHODS TO TEST INTEGRATED CIRCUITS  
Open and short systems and methods for testing integrated circuits are disclosed. An example implementation includes engaging an integrated circuit testing module with an integrated circuit...
US20070152654 Integrated circuit (IC) transporting device for IC probe apparatus  
An IC transporting device for IC probe apparatus includes a vertical unit, a horizontal unit and a suck-and-hold unit, and capable of being set, change by means of a computer program and...
US20070046308 Test modes for a semiconductor integrated circuit device  
A semiconductor integrated circuit device is provided including a switch to selectively supply a test signal to a pin on the integrated circuit device in response to a switch control signal. A...
US20080094091 Dynamic Burn-in Systems and Apparatuses  
A burn-in apparatus with a radio frequency signal generator is provided. One embodiment includes a printed circuit board to carry a plurality of semiconductor devices for a burn-in process and a...
US20070290702 System and method for thermal management and gradient reduction  
A micro-spray cooling system beneficial for use in testers of electrically stimulated integrated circuit chips is disclosed. The system includes micro-spray heads disposed about a probe head,...

Matches 1 - 50 out of 188 1 2 3 4 >