Matches 1 - 27 out of 27


Match Document Document Title
US20060113667 Bond pad structure for gold wire bonding to copper low K dielectric silicon devices  
A bond pad structure which improves the reliability of the gold bonds, and thus, of the device. The bond pad structure allows for small gold bonds, which increases the density of the device. One...
US20100072632 BOND PAD STRUCTURE HAVING DUMMY PLUGS AND/OR PATTERNS FORMED THEREAROUND  
A semiconductor structure is provided. In one embodiment, a bond pad is formed above one or more underlying layers of a substrate. A plurality of dummy plugs are spaced around the bond pad, the...
US20070007670 Reworkable bond pad structure  
A bond pad structure includes a plurality of normal bond pads, a conductive structure and a plurality of backup bond pads. The conductive structure has a plurality of blocks, and at least one of...
US20090283920 BALL-BUMP BONDED RIBBON-WIRE INTERCONNECT  
A ball-bump bonded ribbon-wire interconnect has a ball-bump attached to an integrated circuit's bond pad. A ribbon-wire has one end attached to the ball-bump and its opposing end attached to a...
US20060237855 Substrate for producing a soldering connection to a second substrate  
A substrate for producing a soldering connection to a second substrate is disclosed. Soldering pads are distributed on the substrate surface. Solder balls can be applied to these pads. A soldering...
US20050242446 INTEGRATED CIRCUIT PACKAGE WITH DIFFERENT HARDNESS BUMP PAD AND BUMP AND MANUFACTURING METHOD THEREFOR  
A manufacturing method for an integrated circuit package is provided including forming a contact pad under a passivation layer on an integrated circuit, forming an opening in the passivation layer...
US20080237893 Anti Pad To Reduce Parasitic Capacitance And Improve Return Loss In A Semiconductor Die And Package  
An apparatus for minimizing parasitic capacitance on a semiconductor die includes a semiconductor die having a least one signal line and at least one plane and an anti pad located between the at...
US20080023852 Metal pad of mode dial and manufacturing method thereof  
A metal pad of mode dial and a manufacturing method thereof, wherein the metal pad is disposed on a substrate and the metal pad comprises at least one metal base pad and at least one conductive...
US20060060986 Semiconductor memory device and power line arrangement method thereof  
A semiconductor memory device and a power line arrangement method are disclosed. The semiconductor memory device includes a plurality of pads, each pad including an upper pad and a lower pad...
US20080211112 Carbon Nanotube Bond Pad Structure and Method Therefor  
A bond pad structure (300) for an integrated circuit (IC) device uses carbon nanotubes to increase the strength and resilience of wire bonds (360). In an example embodiment there is, a bond pad...
US20150076712 ELECTRONIC DEVICE WITH BIMETALLIC INTERFACE ELEMENT FOR WIRE BONDING  
An electronic device includes a chip with an integrated electronic component and a terminal made of a first metal material. The device further includes a lead made of a second metal material...
US20050285278 Markings for use with semiconductor device components  
A marking for a semiconductor device component includes a plurality of adjacent, mutually adhered regions. The marking is configured to contrast visually with a semiconductor device component, and...
US20070194458 Methods of redistributing bondpad locations on an integrated circuit  
Integrated circuits and methods of redistributing bondpad locations are disclosed. In one implementation, a method of redistributing a bondpad location of an integrated circuit includes providing...
US20120326336 BOND PAD DESIGN FOR IMPROVED ROUTING AND REDUCED PACKAGE STRESS  
A bond pad design comprises a plurality of bond pads on a semiconductor chip and a plurality of under-bump metallurgy (UBM) layers formed on respective bond pads of the plurality. At least one of...
US20080088035 Circuit board assembly  
A circuit board assembly includes a circuit board and a semiconductor chip mounted on the board. The semiconductor chip includes a plurality of solder spots arrayed thereon in a matrix pattern....
US20050242444 Integrated circuit having a strengthened passivation structure  
Provided is an integrated circuit (IC) having a strengthened passivation layer. In one example, the IC comprises a semiconductor substrate, a multilevel interconnect structure formed on the...
US20050156330 Through-wafer contact to bonding pad  
An integrated circuit with conductive channels connecting the bonding pads to alternative surfaces of the IC chip is disclosed. Typically the channels would be formed by reactive ion etching,...
US20060278982 Metal bump with an insulation for the side walls and method of fabricating a chip with such a metal bump  
A chip with at least two metal bumps (6a, 6b) which has insulation layers for opposing side walls which are deposited in a plasma activated gas. Predetermined portions of the insulation layer (7)...
US20050218499 Method for manufacturing leadless semiconductor packages  
A method for manufacturing a plurality of leadless semiconductor packages is disclosed. A provided metal carrier has a plurality of packaging units with contact pads and a plurality of separating...
US20100109167 CONDUCTIVE PATHS FOR TRANSMITTING AN ELECTRICAL SIGNAL THROUGH AN ELECTRICAL CONNECTOR  
The claimed invention relates to structures suitable for improving the performance and reliability of electrical connectors. One embodiment of the claimed invention includes an integrated circuit...
US20070096340 Electronic assembly having graded wire bonding  
According to one aspect of the present invention, an electronic assembly is provided. The electronic assembly comprises a substrate with a lead connected thereto and first and second...
US20060038290 Process for making electrode pairs  
The present invention is a process for making a matching pair of surfaces, which involves creating a network of channels on one surface of two substrate. The substrates are then coated with one or...
US20090108471 Wiring board of semiconductor device, semiconductor device, electronic apparatus, mother board, method of manufacturing wiring board of semiconductor device, method of manufacturing mother board and method of manufacturing electronic apparatus  
In a wiring board of a semiconductor device according to the present invention, a land 9 provided with convex portions/concave portions arranged so as to comprise finite rotation symmetry is...
US20050151268 Wafer-level assembly method for chip-size devices having flipped chips  
A method for assembling a whole semiconductor wafer (101) with a plurality of device units (120) having metal contact pads. Each contact pad has a patterned barrier metal layer and a metal stud...
US20070158852 Circuit Board with Conductive Structure and Method for Fabricating the same  
A method for fabricating a circuit board with a conductive structure and the same are proposed. A buffer metal layer is formed on an electrically connecting pad of a circuit layer of a circuit...
US20070181983 Semiconductor device and manufacturing method thereof  
A method of manufacturing a semiconductor device 28 in which a plating mask 38, 39 having a noble metal plating layer 35 as an uppermost layer is formed at a predetermined portion on an obverse...
US20050110166 Semiconductor device, electronic device, electronic apparatus, method of manufacturing semiconductor device, and method of manufacturing electronic device  
A method and device are provided to realize a structure in which different kinds of chips are three-dimensionally mounted while allowing for proper heat dissipation. A semiconductor package PK12...

Matches 1 - 27 out of 27