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US20110156276 |
Patch on interposer assembly and structures formed thereby
Methods of forming microelectronic structures are described. Embodiments of those methods include attaching a patch structure to an interposer by thermal compression bonding, forming an underfill... |
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US20110169157 |
SUBSTRATE AND FLIP CHIP PACKAGE WITH GRADATIONAL PAD PITCHES
A flip-chip packaging substrate with gradational pad pitches for flip-chip jointing a bumped chip and a flip chip package utilizing the substrate are revealed. A plurality of connecting pads with... |
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US20120146219 |
WAFER-LEVEL INTERCONNECT FOR HIGH MECHANICAL RELIABILITY APPLICATIONS
An interconnect structure comprises a solder including nickel (Ni) in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer... |
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US20110006415 |
SOLDER INTERCONNECT BY ADDITION OF COPPER
A method of forming an electronic device provides an electronic device substrate having a solder bump pad located thereover. A nickel-containing layer is located over the solder bump pad. A... |
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US20110079925 |
Flip Chip Interconnect Method and Design For GaAs MMIC Applications
A monolithic microwave integrated circuit (MMIC) flip chip interconnect is formed by coating an active side of the chip with a dielectric coating, such as benzocyclobutene (BCB), that inhibits... |
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US20110285013 |
Controlling Solder Bump Profiles by Increasing Heights of Solder Resists
A device includes a first work piece bonded to a second work piece. The first work piece includes a solder resist at a surface of the first work piece, wherein the solder resist includes a solder... |
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US20050253277 |
Film for protecting mother glass for flat panel display and use thereof
An object of the present invention is to provide a surface protecting film which dramatically improves an efficiency of transporting and storing a mother glass, has better peelability from an... |
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US20060006533 |
Motherboard structure for preventing short circuit
A motherboard for preventing short circuit includes an IC device and a PCB. The IC device has a plurality of tin balls, and the PCB has matching pads with the tin balls of the IC device. The tin... |
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US20110068465 |
STRONG INTERCONNECTION POST GEOMETRY
A flip-chip packaging assembly and integrated circuit device are disclosed. An exemplary flip-chip packaging assembly includes a first substrate; a second substrate; and joint structures disposed... |
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US20140097542 |
FLIP PACKAGING DEVICE
Disclosed is a flip chip packaging device and structure of interconnections between a chip and a substrate. In one embodiment, a flip chip packaging device can include: (i) a chip and a substrate;... |
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US20110101523 |
PILLAR BUMP WITH BARRIER LAYER
A copper pillar bump has a surface covered with by a barrier layer formed of a copper-containing material layer including a group III element, a group IV element, a group V element or combinations... |
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US20110304059 |
CIRCUIT BOARD, CIRCUIT BOARD ASSEMBLY, AND SEMICONDUCTOR DEVICE
A disclosed circuit board includes a substrate, a plurality of electrode pads formed on the substrate, and a groove formed between adjacent electrode pads on the substrate. Further, the electrode... |
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US20130075795 |
Aerogel dielectric layer
A circuit board assembly includes a circuit board, a chip attached to the circuit board and a dielectric layer. The chip has a circuit facing the circuit board and spaced from it. The dielectric... |
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US20130062783 |
CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD FOR THE SAME
A chip packaging structure and a manufacturing method for the same are provided. The chip packaging structure includes a first chip, a second chip and a transfer component. The first chip has a... |
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US20140035132 |
SURFACE MOUNT CHIP
A surface mount chip including, on the side of a surface, first and second pads of connection to an external device, wherein, in top view, the first pad has an elongated general shape, and the... |
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US20100301470 |
STUD BUMPS AS LOCAL HEAT SINKS DURING TRANSIENT POWER OPERATIONS
A thermal management configuration for a flip chip semiconductor device is disclosed. The device includes a high power silicon based die having a metal bonding surface. A plurality of... |
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US20110215472 |
Through Silicon via Bridge Interconnect
An integrated circuit bridge interconnect device includes a first die and a second die provided in a side-by-side configuration and electrically interconnected to each other by a bridge die. The... |
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US20130082406 |
Method for producing a two-chip assembly and corresponding two-chip assembly
A method for producing a two-chip assembly includes: providing a wafer having a first thickness, which wafer has a front side and a back side, a first plurality of first chips being provided on... |
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US20070007614 |
Schottky diode with improved surge capability
An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase... |
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US20100072602 |
STACKED INTEGRATED CIRCUIT PACKAGE USING A WINDOW SUBSTRATE
An integrated circuit (IC) package is disclosed. The IC package includes a first substrate having a first surface having first substrate bond pads, a second surface having second substrate bond... |
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US20110049703 |
Flip-Chip Package Structure
A flip-chip (FC) package structure is provided. The FC package structure includes a substrate, a chip, a plurality of copper platforms, a plurality of copper bumps, a plating layer, a circuit... |
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US20120280407 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ELECTRICAL INTERFACE AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming an isolated contact having a contact protrusion, the contact protrusion having a lower protrusion surface, an... |
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US20110049710 |
INTERCONNECT LAYOUTS FOR ELECTRONIC ASSEMBLIES
Embodiments of the present disclosure provide an apparatus including an electronic device and a substrate to receive the electronic device, the electronic device being electrically coupled to the... |
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US20120168814 |
ADHESIVE COMPOSITION
An adhesive composition for flip-chip-mounting a chip component on a circuit board contains an alicyclic epoxy compound, an alicyclic acid anhydride curing agent, and an acrylic resin. The amount... |
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US20090230566 |
Method of underfill air vent for flipchip BGA
This invention relates to ejecting an underfill resin at multiple semiconductor die edges such that vacuum suction provided at a laminate through hole located beneath a stage enables spread of... |
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US20100038780 |
UNDERFILL FLOW GUIDE STRUCTURES AND METHOD OF USING SAME
Underfill flow guide structures and methods of using the same are provided with a module. In particular the underfill flow guide structures are integrated with a substrate and are configured to... |
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US20150054178 |
ELECTRONIC DEVICE
An electronic device includes a surface-mounted component and a mounting component on which the surface-mounted component is mounted, the surface-mounted component includes a first bump and a... |
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US20120007259 |
LATENT HARDENER WITH IMPROVED BARRIER PROPERTIES AND COMPATIBILITY
A curing agent for epoxy resins that is comprised of the reaction product of an amine, an epoxy resin, and an elastomer-epoxy adduct; compositions containing the curing agent and an epoxy resin;... |
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US20080185735 |
Dynamic pad size to reduce solder fatigue
A semiconductor device is provided which comprises a substrate (501) having a plurality of bond pads (503) disposed thereon. Each bond pad has a major axis and a minor axis in a direction parallel... |
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US20130154118 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACTS AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming an isolated contact having a contact protrusion; forming a die paddle, adjacent to the isolated contact, having... |
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US20070075437 |
Relay board and semiconductor device having the relay board
A relay board provided in a semiconductor device includes a first terminal, and a plurality of second terminals connecting to the first terminal by a wiring. The wiring connecting to the first... |
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US20130119535 |
FLIP CHIP PACKAGES WITH IMPROVED THERMAL PERFORMANCE
Systems and methods for improving thermal performance, such as thermal dissipation, of flip chip packages that include one or more flip chip dies are disclosed. In some embodiments, a thermal... |
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US20070045866 |
REINFORCEMENTS, BAFFLES AND SEALS WITH MALLEABLE CARRIERS
There is disclosed a process of forming reinforcements baffles and seals having malleable carriers. The process typically includes application of an activatable material to a malleable carrier and... |
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US20080116587 |
CONDUCTOR POLYMER COMPOSITE CARRIER WITH ISOPROPERTY CONDUCTIVE COLUMNS
A carrier comprises a metallic panel, a conductive column, a circuit, and an electrically insulating filling. The conductive column is within the panel and travels from a first surface to a second... |
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US20090079093 |
FLIP CHIP STRUCTURE AND METHOD OF MANUFACTURE
A flip chip structure includes glass stand-offs formed overlying a substrate surface. A conductive layer is formed overlying the glass stand-offs and configured for attaching to a next level of... |
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US20120074589 |
CORNER STRUCTURE FOR IC DIE
One or more integrated circuit chips are flip-chip bonded to a first surface of a substrate. A contact array is fabricated on a second surface of the substrate. Corner structures attached to the... |
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US20060097403 |
No-flow underfill materials for flip chips
Systems and methods are described which include packaging semiconductor dies and next level packages using low viscosity no-flow underfills having fine fillers treated with surface treatment agents. |
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US20120299201 |
Use of a Local Constraint to Enhance Attachment of an IC Device to a Mounting Platform
An embodiment is directed to an IC mounting assembly that comprises an IC device having a first planar surface, wherein multiple electrically conductive first terminals are located at the first... |
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US20060267171 |
Semiconductor device modules, semiconductor devices, and microelectronic devices
Supports (40) of microelectronic devices (10) are provided with underfill apertures (60) which facilitate filling underfill gaps (70) with underfill material (74). The underfill aperture may have... |
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US20110001250 |
METHOD AND STRUCTURE FOR ADHESION OF INTERMETALLIC COMPOUND (IMC) ON CU PILLAR BUMP
A method and structure for good adhesion of Intermetallic Compounds (IMC) on Cu pillar bumps are provided. The method includes depositing Cu to form a Cu pillar layer, depositing a diffusion... |
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US20090146303 |
Flip Chip Interconnection with double post
A packaged microelectronic assembly includes a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface. Each of the first... |
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US20150255312 |
LOW-STRESS DUAL UNDERFILL PACKAGING
The present invention relates generally to flip chip technology and more particularly, to a method and structure for reducing internal packaging stresses, improving adhesion properties, and... |
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US20150245473 |
Wiring Substrate, Semiconductor Device, and Method of Manufacturing Wiring Substrate
A wiring substrate includes a first wiring structure, a second wiring structure stacked on an upper surface of the first wiring structure, and an outermost insulating layer stacked on a lower... |
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US20080230925 |
SOLDER-BUMPING STRUCTURES PRODUCED BY A SOLDER BUMPING METHOD
A method for solder bumping provides a substrate and forms a film on the substrate. The film has openings therethrough. A stencil is aligned on the film. The stencil has openings therethrough over... |
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US20070126126 |
Solder bonding structure using bridge type pattern
Disclosed is a solder bonding structure for flip chip connection. Particularly, this invention relates to a solder bonding structure, in which the shape of a connection pad on which solder is... |
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US20110101526 |
Copper Bump Joint Structures with Improved Crack Resistance
An integrated circuit structure includes a first work piece and a second work piece. The first work piece includes a semiconductor substrate, and a copper bump over the semiconductor substrate.... |
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US20090321939 |
Through Silicon via Bridge Interconnect
An integrated circuit bridge interconnect system includes a first die and a second die provided in a side-by-side configuration and electrically interconnected to each other by a bridge die. The... |
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US20100246153 |
FLIP-CHIP FET CELL
A method and system for a FET cell is presented. The FET cell includes multiple individual transistors and interconnect bumps that are configured to flip-chip connect to a substrate. The substrate... |
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US20120211880 |
Flip Chip Interconnection Having Narrow Interconnection Sites on the Substrate
A flip chip interconnect of a die on a substrate is made by mating the interconnect bump onto a narrow interconnect pad on a lead or trace, rather than onto a capture pad. The width of the narrow... |
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US20080142994 |
Contact Pad And Bump Pad Arrangement for High-Lead Or Lead-Free Bumps
A semiconductor package assembly comprises a first conductive pad on a semiconductor substrate; a second conductive pad on a package substrate; a bump physically coupled between the first... |