Matches 1 - 50 out of 158 1 2 3 4 >


Match Document Document Title
US20140070363 ELECTRONIC ANTI-FUSE  
An electronic anti-fuse structure, the structure including an Mx level comprising a first Mx metal and a second Mx metal, a dielectric layer located above the Mx level, an Mx+1 level located above...
US20130307116 Method and System for Split Threshold Voltage Programmable Bitcells  
A bitcell can include an insulating area, a first doping, a second doping, and a gate terminal for the insulating area. The second doping can be proximate to the first doping and proximate to the...
US20100320565 WAFER AND METHOD FOR IMPROVING YIELD RATE OF WAFER  
A wafer and a method for improving the yield rate of the wafer are provided. The wafer includes a first and a second circuit units, a first and a second through silicon vias (TSVs), and a first...
US20070205485 Programmable anti-fuse structures, methods for fabricating programmable anti-fuse structures, and methods of programming anti-fuse structures  
Programmable anti-fuse structures for semiconductor device constructions, fabrication methods for forming anti-fuse structures during semiconductor device fabrication, and programming methods for...
US20090251201 Multi-level anti-fuse and methods of operating and fabricating the same  
Provided may be a multi-level anti-fuse and methods of fabricating and operating the same. The multi-level anti-fuse may include at least three anti-fuses having a plurality of anti-fuses...
US20120112312 Integrated Circuit Chip Customization Using Backside Access  
An integrated circuit, a method for making an integrated circuit product, and methods for customizing an integrated circuit are disclosed. Integrated circuit elements including programmable...
US20150130509 NANOELECTROMECHANICAL ANTIFUSE AND RELATED SYSTEMS  
An antifuse apparatus can include a cantilever extending from a first electrode portion to terminate in a distal end. A second electrode portion can be spaced apart from the cantilever by an air...
US20140048905 LOW COST ANTI-FUSE STRUCTURE  
An anti-fuse structure is provided in which an anti-fuse material liner is embedded within one of the openings provided within an interconnect dielectric material. The anti-fuse material liner is...
US20140021581 LOW COST ANTI-FUSE STRUCTURE  
An anti-fuse structure is provided in which an anti-fuse material liner is embedded within one of the openings provided within an interconnect dielectric material. The anti-fuse material liner is...
US20110254121 PROGRAMMABLE ANTI-FUSE STRUCTURES WITH CONDUCTIVE MATERIAL ISLANDS  
Voltage programmable anti-fuse structures and methods are provided that include at least one conductive material island atop a dielectric surface that is located between two adjacent conductive...
US20080029844 ANTI-FUSE STRUCTURE OPTIONALLY INTEGRATED WITH GUARD RING STRUCTURE  
An anti-fuse structure and a related method for fabricating the anti-fuse structure include a doped well within a semiconductor substrate. A first aperture and a second aperture that expose the...
US20060065946 Multi-doped semiconductor e-fuse  
The present invention provides a multi-doped semiconductor e-fuse for use in an integrated circuit and a method of manufacture therefore. In one aspect, the semiconductor e-fuse 200 includes a...
US20060214261 Anti-fuse circuit for improving reliability and anti-fusing method using the same  
An anti-fuse circuit includes an anti-fuse device and an electric field control unit. The anti-fuse device is formed having a MOS structure including a first junction, a second junction and a gate...
US20090026576 ANTI-FUSE  
An anti-fuse is provided. The anti-fuse includes a substrate, a gate disposed over the substrate, a gate dielectric layer sandwiched between the substrate and the gate, and two source/drain...
US20080116540 Stacked Switchable Element and Diode Combination With a Low Breakdown Switchable Element  
A device (10) comprises a semiconductor diode (12) and a switchable element (14) positioned in stacked adjacent relationship. The semiconductor diode (12) and the switchable element (14) are...
US20100078759 MIIM DIODES HAVING STACKED STRUCTURE  
A metal-insulator diode is disclosed. In one aspect, the metal-insulator diode comprises first and second electrode and first and second insulators arraigned as follows. An insulating region has a...
US20110101496 FOUR-TERMINAL ANTIFUSE STRUCTURE HAVING INTEGRATED HEATING ELEMENTS FOR A PROGRAMMABLE CIRCUIT  
The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a...
US20080290456 Electrical Fuse With Metal Silicide Pipe Under Gate Electrode  
An electrical fuse (eFuse) has a gate prepared from a conductive or partially conductive material such as polysilicon, a semiconductor substrate having a pipe region in proximity to the gate, and...
US20140210043 INTEGRATED CIRCUIT DEVICE FEATURING AN ANTIFUSE AND METHOD OF MAKING SAME  
One feature pertains to an integrated circuit that includes an antifuse having a conductor-insulator-conductor structure. The antifuse includes a first conductor plate, a dielectric layer, and a...
US20090108400 ANTI-FUSE STRUCTURE INCLUDING A SENSE PAD CONTACT REGION AND METHODS FOR FABRICATION AND PROGRAMMING THEREOF  
An antifuse structure includes a sense pad contact region that is separate from an anode contact region and a cathode contact region. By including the sense pad contact region that is separate...
US20120001296 P-I-N DIODE CRYSTALLIZED ADJACENT TO A SILICIDE IN SERIES WITH A DIELECTRIC MATERIAL  
A vertically oriented p-i-n diode is provided that includes semiconductor material crystallized adjacent a silicide, germanide, or silicide-germanide layer, and a dielectric material arranged...
US20050110113 Anti-fuse structure employing metal silicide/doped polysilicon laminate  
An anti-fuse structure and a method for forming the anti-fuse structure employ a substrate having formed therein a contact region. A metal silicide layer is formed over and electrically connected...
US20070257331 ANTI-FUSE MEMORY CELL  
An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion...
US20080237862 Implementation of diffusion barrier in 3D memory  
One or more diffusion barriers are formed around one or more conductors in a three dimensional or 3D memory cell. The diffusion barriers allow the conductors to comprise very low resistivity...
US20090115021 ANTIFUSE ELEMENT IN WHICH MORE THAN TWO VALUES OF INFORMATION CAN BE WRITTEN  
An antifuse element includes a plurality of MOS transistors; a first electrode to which source electrodes of the plurality of MOS transistors are commonly connected; a second electrode to which...
US20110018093 PROGRAMMABLE ANTI-FUSE STRUCTURE WITH DLC DIELECTRIC LAYER  
In one embodiment an anti-fuse structure is provided that includes a first dielectric material having at least a first anti-fuse region and a second anti-fuse region, wherein at least one of the...
US20070069332 Energy coupled superlattice structures for silicon based lasers and modulators  
A waveguide structure includes a SOI substrate. A core structure is formed on the SOI substrate comprising a plurality of multilayers having alternating or aperiodically distributed thin layers of...
US20140175601 ANTI-FUSE STRUCTURE AND ANTI-FUSE PROGRAMMING METHOD  
An anti-fuse structure includes a substrate having at least a shallow trench isolation formed therein, a notch formed between the substrate and the STI, an electrode structure formed on the...
US20130307115 ANTI-FUSE STRUCTURE AND FABRICATION  
A method and structure of a non-intrinsic anti-fuse structure. The anti-fuse structure has a first electrode, a second electrode, a first dielectric, and second dielectric. The first and second...
US20080211060 ANTI-FUSE WHICH WILL NOT GENERATE A NON-LINEAR CURRENT AFTER BEING BLOWN AND OTP MEMORY CELL UTILIZING THE ANTI-FUSE  
An anti-fuse is formed with a transistor with a doped channel. The anti-fuse will not generate a non-linear current after the anti-fuse is blown. The anti-fuse is used in memory cells of one-time...
US20070018280 Antifuse structure and system for closing thereof  
A structure and method for providing an antifuse which is closed by laser energy with an electrostatic assist. Two or more metal segments are formed over a semiconductor structure with an air gap...
US20080217658 ELECTRICAL ANTIFUSE WITH INTEGRATED SENSOR  
The present invention provides structures for antifuses that utilize electromigration for programming. By providing a portion of antifuse link with high resistance without conducting material and...
US20140240033 On-Die Programming of Integrated Circuit Bond Pads  
SoC and SiP designs are configured with an antifuse link within the die to allow on-die programming of bond wires connecting package lead fingers to the bond pads on the die. This permits...
US20070210415 Anti-fuse and programming method of the same  
The invention is directed to an anti-fuse comprised of a substrate, a gate electrode, and a gate dielectric layer. The gate electrode is located on the substrate. The gate dielectric layer is...
US20130119510 DEVICES INCLUDING A P-I-N DIODE DISPOSED ADJACENT A SILICIDE IN SERIES WITH A DIELECTRIC MATERIAL  
A device is provided that includes a vertically oriented p-i-n diode that includes semiconductor material, a silicide, germanide, or silicide-germanide layer disposed adjacent the vertically...
US20110221031 SYSTEM AND METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT ANTI-FUSE IN CONJUNCTION WITH A TUNGSTEN PLUG PROCESS  
A system and method are disclosed for manufacturing an integrated circuit anti-fuse in conjunction with a tungsten plug process. A tungsten plug is formed in a dielectric layer that overlies a...
US20060263946 Recessed gate dielectric antifuse  
A recessed dielectric antifuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A recess is formed between the source and drain regions. A gate...
US20090102014 Anti-Fuse Cell and Its Manufacturing Process  
An anti-fuse cell includes a standard MOS transistor of an integrated circuit, with source and drain regions covered with a metal silicide layer and at least one track of a resistive layer at...
US20110080765 PROGRAMMABLE ANTIFUSE TRANSISTOR AND METHOD FOR PROGRAMMING THEREOF  
Programmable antifuse transistor, in particular n-channel MOS transistor, and a method for programming at least one such antifuse transistor, includes at least one gate with a gate terminal,...
US20140291801 ANTI-FUSE STRUCTURE AND PROGRAMMING METHOD THEREOF  
A method of programming an anti-fuse includes steps as follows. First, an insulating layer is provided. An anti-fuse region is defined on the insulating layer. An anti-fuse is embedded within the...
US20130009230 OPTIMIZATION OF CRITICAL DIMENSIONS AND PITCH OF PATTERNED FEATURES IN AND ABOVE A SUBSTRATE  
A die is formed with different and optimized critical dimensions in different device levels and areas of those device levels using photolithography and etch techniques. One aspect of the invention...
US20120104545 Anti-Fuse Element  
An anti-fuse element that includes a capacitance unit having an insulation layer and at least a pair of electrode layers formed on upper and lower surfaces of the insulation layer. The capacitance...
US20100187638 ANTI-FUSE CELL AND ITS MANUFACTURING PROCESS  
An anti-fuse cell includes a standard MOS transistor of an integrated circuit, with source (7) and drain (8) regions covered with a metal silicide layer (12, 13), and at least one track (24) of a...
US20100164603 Programmable fuse and anti-fuse elements and methods of changing conduction states of same  
A programmable anti-fuse element includes a substrate (224), an N-well (426) in the substrate, an electrically insulating layer (427) over the N-well, and a gate electrode (430) over the...
US20150115401 TECHNIQUE FOR FABRICATION OF MICROELECTRONIC CAPACITORS AND RESISTORS  
A sequence of semiconductor processing steps permits formation of both vertical and horizontal nanometer-scale serpentine resistors and parallel plate capacitors within a common structure. The...
US20140070364 ANTI-FUSE DEVICE  
An electrically programmable gate oxide anti-fuse device includes an anti-fuse aperture having anti-fuse links that include metallic and/or semiconductor electrodes with a dielectric layer in...
US20100230781 TRENCH ANTI-FUSE STRUCTURES FOR A PROGRAMMABLE INTEGRATED CIRCUIT  
Trench anti-fuse structures, design structures embodied in a machine readable medium for designing, manufacturing, or testing a programmable integrated circuit. The anti-fuse structure includes a...
US20100078758 MIIM DIODES  
A metal-insulator diode is disclosed. In one aspect, the metal-insulator diode comprises a first electrode comprising a first metal, a first region comprising a first insulating material, a second...
US20120126367 ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION  
An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an...
US20120126366 ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION  
An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an...

Matches 1 - 50 out of 158 1 2 3 4 >