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US20110049517 BIPOLAR TRANSISTOR  
A bipolar transistor has a collector having a base layer provided thereon and a shallow trench isolation structure formed therein. A base poly layer is provided on the shallow trench isolation...
US20110248265 Backside texturing by cusps to improve IR response of silicon solar cells and photodetectors  
The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can...
US20110278570 SCALING OF BIPOLAR TRANSISTORS  
Bipolar transistor structures, methods of designing and fabricating bipolar transistors, methods of designing circuits having bipolar transistors. The method of designing the bipolar transistor...
US20100327280 SCALING OF BIPOLAR TRANSISTORS  
Bipolar transistor structures, methods of designing and fabricating bipolar transistors, methods of designing circuits having bipolar transistors. The method of designing the bipolar transistor...
US20130285060 UNIT FOR LIQUID PHASE EPITAXIAL GROWTH OF MONOCRYSTALLINE SILICON CARBIDE, AND METHOD FOR LIQUID PHASE EPITAXIAL GROWTH OF MONOCRYSTALLINE SILICON CARBIDE  
The cost of liquid phase epitaxial growth of a monocrystalline silicon carbide is reduced. A feed material 11 is such that when a surface layer thereof containing a polycrystalline silicon carbide...
US20120228611 BIPOLAR JUNCTION TRANSISTOR WITH A SELF-ALIGNED EMITTER AND BASE  
Methods for fabricating bipolar junction transistors with self-aligned emitter and extrinsic base, bipolar junction transistors made by the methods, and design structures for a BiCMOS integrated...
US20130153902 STRUCTURES INCLUDING PASSIVATED GERMANIUM  
A passivated germanium surface that is a germanium carbide material formed on and in contact with the germanium material. A semiconductor device structure having the passivated germanium having...
US20120235143 VERTICAL POLYSILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR  
A vertical heterojunction bipolar transistor (HBT) includes doped polysilicon having a doping of a first conductivity type as a wide-gap-emitter with an energy bandgap of about 1.12 eV and doped...
US20080035924 ESD protection structures for semiconductor components  
An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the semiconductor body and a channel is...
US20140048805 BONDING-SUBSTRATE FABRICATION METHOD, BONDING SUBSTRATE, SUBSTRATE BONDING METHOD, BONDING-SUBSTRATE FABRICATION APPARATUS, AND SUBSTRATE ASSEMBLY  
[Problem] To provide a substrate bonding technique having a wide range of application. [Solution] A silicon thin film is formed on a bonding surface, and the interface with the substrate is...
US20120298995 WAFER AND EPITAXIAL WAFER, AND MANUFACTURING PROCESSES THEREFOR  
Provided is a silicon wafer which is stabilized in quality exerting no adverse influence on device characteristics and manufactured by restricting a boron contamination from the environment, and a...
US20140291681 PHASE NOISE REDUCTION IN TRANSISTOR DEVICES  
Semiconductor devices are disclosed having modified transistor dimensions configured to provide reduced phase noise in certain amplifier applications. Transistor devices having expanded...
US20120193623 CARBON ADDITION FOR LOW RESISTIVITY IN SITU DOPED SILICON EPITAXY  
Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer...
US20090001371 BLOCKING PRE-AMORPHIZATION OF A GATE ELECTRODE OF A TRANSISTOR  
A technique is presented which provides for a selective pre-amorphization of source/drain regions of a transistor while preventing pre-amorphization of a gate electrode of the transistor....
US20090206335 Bipolar complementary semiconductor device  
The invention relates to a BiCMOS device comprising a substrate having a first type of conductivity and a number of active regions that are provided therein and are delimited in a lateral...
US20120181536 Hybrid Silicon Wafer  
A hybrid silicon wafer which is a silicon wafer having a structure wherein the main plane orientation of polycrystalline silicon that is prepared by a unidirectional solidification/melting method...
US20120241741 SILICON CARBIDE SUBSTRATE  
A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and...
US20130214275 TRANSISTOR HAVING A NARROW IN-SUBSTRATE COLLECTOR REGION FOR REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE AND A METHOD OF FORMING THE TRANSISTOR  
Disclosed are a transistor (e.g., bipolar junction transistor (BJT) or a heterojunction bipolar transistor (HBT)) and a method of forming the transistor with a narrow in-substrate collector region...
US20140264343 DEVICE ARCHITECTURE AND METHOD FOR TEMPERATURE COMPENSATION OF VERTICAL FIELD EFFECT DEVICES  
A field effect device is disclosed that provides a reduced variation in on-resistance as a function of junction temperature. The field effect device, having a source junction, gate junction and...
US20150053981 METHOD OF FORMING STEP DOPING CHANNEL PROFILE FOR SUPER STEEP RETROGRADE WELL FIELD EFFECT TRANSISTOR AND RESULTING DEVICE  
A methodology enabling the formation of steep channel profiles for devices, such as SSRW FETs, having a resultant channel profiles that enables suppression of threshold voltage variation and the...
US20140252358 Methods and Apparatus for MEMS Devices with Increased Sensitivity  
Methods and apparatus for forming MEMS devices. An apparatus includes at least a portion of a semiconductor substrate having a first thickness and patterned to form a moveable mass; a moving sense...
US20120074404 SUPPORTING SUBSTRATE, BONDED SUBSTRATE, METHOD FOR MANUFACTURING SUPPORTING SUBSTRATE, AND METHOD FOR MANUFACTURING BONDED SUBSTRATE  
Provided is a supporting substrate (30) to be bonded on a single crystalline wafer composed of a single crystalline body. The supporting substrate is provided with a silicon carbide...
US20080121882 Method to reduce junction leakage through partial regrowth with ultrafast anneal and structures formed thereby  
Methods and associated structures of forming a microelectronic device are described. Those methods may include creating an amorphous region in source/drain regions of a substrate by ion...
US20070295994 HETERO JUNCTION BIPOLAR TRANSISTOR  
A hetero-junction bipolar transistor is provided including emitter contact region, an emitter region made of a first semiconductor material, a base region made of a second semiconductor material...
US20110198591 METHOD OF MANUFACTURING HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR  
Disclosed is a method of forming a heterojunction bipolar transistor (HBT), comprising depositing a first stack comprising an polysilicon layer (16) and a sacrificial layer (18) on a...
US20080210936 Hetero-Crystalline Semiconductor Device and Method of Making Same  
A hetero-crystalline semiconductor device and a method of making the same include a non-single crystalline semiconductor layer and a nanostructure layer that comprises a single crystalline...
US20110180795 ELECTRO-OPTIC DEVICE AND A METHOD FOR MANUFACTURING THE SAME  
An electro-optic device is disclosed. The electro-optic device includes an insulating layer, a first semiconducting region disposed above the insulating layer and being doped with doping atoms of...
US20130092939 BIPOLAR TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME  
Disclosed are example bipolar transistors capable of reducing the area of a collector, reducing the distance between a base and a collector, and/or reducing the number of ion implantation...
US20120112190 EPITAXIAL SILICON WAFER AND METHOD FOR MANUFACTURING SAME  
It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal...
US20070272925 Semiconductor Device Having Multi-Gate Structure and Method of Manufacturing the Same  
Provided are a semiconductor device having a mesa-type active region including a plurality of slabs and a method of manufacturing the semiconductor device. The semiconductor device includes a...
US20110204360 Photoelectric Conversion Device And Manufacturing Method Thereof  
In order to form a metal thin film, a silicide film, or the like between an upper-layer unit cell and a lower-layer unit cell in stacked-layer photoelectric conversion devices, a step of forming...
US20080258145 Semiconductor Devices Including an Amorphous Region in an Interface Between a Device Isolation Layer and a Source/Drain Diffusion Layer  
Semiconductor devices and methods for fabricating the same are disclosed in which an amorphous layer is formed in an interface between a device isolation layer and a source or drain region to...
US20050151131 Polycrystalline thin-film solar cells  
Double heterojunction polycrystalline thin-film solar cell devices that include a polycrystalline p-layer, a polycrystalline i-layer, and a polycrystalline n-layer. In one variant, at least two of...
US20130264569 SINGLE CRYSTAL GROUP III NITRIDE ARTICLES AND METHOD OF PRODUCING SAME BY HVPE METHOD INCORPORATING A POLYCRYSTALLINE LAYER FOR YIELD ENHANCEMENT  
In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a...
US20100044705 DOPED SUBSTRATE TO BE HEATED  
A semiconductor structure that is to be heated. The structure includes a substrate for the front face deposition of a useful layer intended to receive components for electronics, optics or...
US20090166625 MOS DEVICE STRUCTURE  
The present invention provides a method for forming a metal-oxide-semiconductor (MOS) device and the structure thereof. The method includes at least the steps of forming a silicon germanium layer...
US20080283832 Integrated Circuit Comprising an Amorphous Region and Method of Manufacturing an Integrated Circuit  
An integrated circuit comprises a doped semiconductor portion including an amorphous portion and a contact structure comprising a conductive material. The contact structure is in contact with the...
US20080230780 Group III Nitride Semiconductor Multilayer Structure  
An object of the present invention is to provide a Group III nitride semiconductor multilayer structure having a smooth surface and exhibiting excellent crystallinity, which multilayer structure...
US20140246676 BIPOLAR DEVICE HAVING A MONOCRYSTALLINE SEMICONDUCTOR INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION  
A bipolar device with an entirely monocrystalline intrinsic base to extrinsic base link-up region. To form the device, a first extrinsic base layer, which is amorphous or polycrystalline, is...
US20130298984 PASSIVATION OF SILICON SURFACES USING INTERMEDIATE ULTRA-THIN SILICON OXIDE LAYER AND OUTER PASSIVATING DIELECTRIC LAYER  
Methods, structures and devices are provided in which a crystalline silicon surface is passivated by an ultra-thin silicon oxide layer and an outer passivating dielectric layer, where the...
US20130075730 VERTICAL PNP DEVICE IN A SILICON-GERMANIUM BICMOS PROCESS AND MANUFACTURING METHOD THEREOF  
A vertical PNP device in a silicon-germanium (SiGe) BiCMOS process is disclosed. The device is formed in a deep N-well and includes a collector region, a base region and an emitter region. The...
US20130050166 SILICIDE GAP THIN FILM TRANSISTOR  
This disclosure provides systems, methods and apparatus for fabricating thin film transistor devices. In one aspect, a substrate including a silicon layer on the substrate surface is provided. A...
US20080277662 SEMICONDUCTOR STRUCTURES  
A semiconductor structure is disclosed. The semiconductor structure includes a polycrystal substrate, a first single crystal layer formed thereon and a second single crystal layer formed on the...
US20090272975 Poly-Crystalline Layer Structure for Light-Emitting Diodes  
A structure and method for a light-emitting diode are presented. A preferred embodiment comprises a substrate with a conductive, poly-crystalline, silicon-containing layer over the substrate. A...
US20120146023 THERMAL EXPANSION ENGINEERING FOR POLYCRYSTALLINE ALUMINUM NITRIDE SINTERED BODIES  
Disclosed are methods and materials useful in the preparation of semiconductor devices. In particular embodiments, disclosed are methods for engineering polycrystalline aluminum nitride substrates...
US20120112189 SPIN INJECTION DEVICE HAVING SEMICONDUCTOR-FERROMAGNETIC-SEMICONDUCTOR STRUCTURE AND SPIN TRANSISTOR  
A spin injection device and spin transistor including a spin injection device. A spin injection device includes different semiconductor materials and a spin-polarizing ferromagnetic material there...
US20100171118 Junction Field-Effect Transistor Having Insulator-Isolated Source/Drain Regions and Fabrication Method Therefor  
Junction field-effect transistors (JFETs) having insulator-isolated source/drain regions and fabrication methods therefor are disclosed here. In SOI JFETs and bulk silicon JFETs having junction...
US20120132913 III-V Compound Semiconductor Material Passivation With Crystalline Interlayer  
The present disclosure reduces and, in some instances, eliminates the density of interface states in III-V compound semiconductor materials by providing a thin crystalline interlayer onto an upper...
US20120074405 Process for the Simultaneous Deposition of Crystalline and Amorphous Layers with Doping  
One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy....
US20110133188 Process for Simultaneous Deposition of Crystalline and Amorphous Layers with Doping  
One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy....
Matches 1 - 50 out of 97 1 2 >