Matches 1 - 50 out of 176 1 2 3 4 >


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US20110175160 SHORT-CHANNEL SCHOTTKY-BARRIER MOSFET DEVICE AND METHOD OF MANUFACTURE  
A MOSFET device and method of fabricating are disclosed. The present invention utilizes Schottky barrier contacts for source and/or drain contact fabrication within the context of a MOSFET device...
US20140001543 Integrated circuit device with metal gates including diffusion barrier layers and fabricating methods thereof  
An integrated circuit device with metal gates including diffusion barrier layers and fabricating methods thereof are provided. The device may include a gate insulating film, a first conductivity...
US20100052046 SEMICONDUCTOR STRUCTURES FORMED ON SUBSTRATES AND METHODS OF MANUFACTURING THE SAME  
A semiconductor apparatus includes a metal substrate, a doped silicon layer on the metal substrate, a semiconductor layer overlying the doped silicon layer, and semiconductor structures having one...
US20050029584 Semiconductor device and a method of manufacturing the same  
A technology is provided to reduce ON-resistance, and the prevention of punch through is achieved with respect to a trench gate type power MISFET. Input capacitance and a feedback capacitance are...
US20150340301 SUBSTRATELESS POWER DEVICE PACKAGES  
A vertical conductive power semiconductor device may include a substrate with a top metal layer located on a top surface of the substrate, solder bumps deposited on top of the top metal layer, and...
US20140239247 TRANSISTOR, RESISTANCE VARIABLE MEMORY DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF  
A resistance variable memory device including a vertical transistor includes an active pillar including a channel region, a source formed in one end of the channel region, and a lightly doped...
US20140054680 METHOD OF FORMING GROUP III NITRIDE SEMICONDUCTOR, METHOD OF FABRICATING SEMICONDUCTOR DEVICE, GROUP III NITRIDE SEMICONDUCTOR DEVICE, METHOD OF PERFORMING THERMAL TREATMENT  
A method of forming a group III nitride semiconductor comprises: preparing a group III nitride semiconductor which contains a p-type dopant or an n-type dopant; and performing a treatment of the...
US20080054349 REDUCED-RESISTANCE FINFETS BY SIDEWALL SILICIDATION AND METHODS OF MANUFACTURING THE SAME  
In a first aspect, a first method of manufacturing a finFET is provided. The first method includes the steps of (1) providing a substrate; and (2) forming at least one source/drain diffusion...
US20130146958 METHOD FOR FORMING BURIED BIT LINE, SEMICONDUCTOR DEVICE HAVING THE SAME, AND FABRICATING METHOD THEREOF  
A method for fabricating a semiconductor device includes: etching a semiconductor substrate and forming a plurality of bodies separated from one another by a plurality of trenches; forming a...
US20060108635 Trenched MOSFETS with part of the device formed on a (110) crystal plane  
This invention discloses an improved MOSFET devices manufactured with a trenched gate by forming part of the trench on a (110) crystal orientation of a semiconductor substrate. The trench is...
US20150200199 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME  
According to one embodiment, a semiconductor memory device includes a substrate, a semiconductor pillar provided on the substrate to extend in a vertical direction, a plurality of first electrode...
US20150357428 SURROUNDING GATE TRANSISTOR (SGT) STRUCTURE  
The semiconductor device according to the present invention is an nMOS SGT and is composed of a first n+ type silicon layer, a first gate electrode containing metal and a second n+ type silicon...
US20130320429 PROCESSES AND STRUCTURES FOR DOPANT PROFILE CONTROL IN EPITAXIAL TRENCH FILL  
Methods of depositing epitaxial material using a repeated deposition and etch process. The deposition and etch processes can be repeated until a desired thickness of silicon-containing material is...
US20130299895 III-V COMPOUND SEMICONDUCTOR DEVICE HAVING DOPANT LAYER AND METHOD OF MAKING THE SAME  
A semiconductor device comprises a semiconductor substrate; a channel layer of at least one III-V semiconductor compound above the semiconductor substrate; a gate electrode above a first portion...
US20110316072 SEMICONDUCTOR MEMORY DEVICES INCLUDING ASYMMETRIC WORD LINE PADS  
Semiconductor memory devices may include a semiconductor substrate, a first stack disposed on the semiconductor substrate and a second stack disposed on the first stack. The first stack may...
US20100044762 METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF  
A non-planar semiconductor device (10) starts with a silicon fin (42). A source of germanium (e.g. 24, 26, 28, 30, 32) is provided to the fin (42). Some embodiments may use deposition to provide...
US20070018239 Sea-of-fins structure on a semiconductor substrate and method of fabrication  
A semiconductor device and a method of fabricating a semiconductor device, wherein the method comprises forming, on a substrate, a plurality of planarized fin bodies to be used for customized fin...
US20120098053 SEMICONDUCTOR DEVICE WITH VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME  
A semiconductor device with a vertical transistor includes a plurality of active pillars; a plurality of vertical gates surrounding sidewalls of the active pillars; a plurality of word lines...
US20120080725 VERTICAL TRANSISTOR MEMORY ARRAY  
A method includes providing a semiconductor wafer having a plurality of pillar structures extending orthogonally from the semiconductor wafer. An electrically conducting interconnect element is...
US20140151784 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME  
The present technology includes a semiconductor memory device, including a channel layer and interlayer insulation layers surrounding the channel layer. The interlayer insulation layers are...
US20130140628 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
A semiconductor device includes a cylindrical main pillar that is formed on a substrate and of which a central axis is perpendicular to the surface of the substrate, source and drain diffused...
US20120119288 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
Disclosed herein is a semiconductor device, including: a first semiconductor region of a first conductivity type; a second semiconductor region having pairs of first pillar regions of the first...
US20080173937 SEMICONDUCTOR MEMORY DEVICES INCLUDING VERTICALLY ORIENTED TRANSISTORS AND METHODS OF MANUFACTURING SUCH DEVICES  
A semiconductor device includes a first active pattern including an upper portion and a lower portion formed on a substrate, a second active pattern formed on the first active pattern, and a gate...
US20150364597 DOUBLE-SIDED VERTICAL SEMICONDUCTOR DEVICE WITH THINNED SUBSTRATE  
A vertical semiconductor device is formed in a semiconductor layer having a first surface, a second surface and background doping. A first doped region, doped to a conductivity type opposite that...
US20150263011 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor device and a method of manufacturing the same, wherein the semiconductor device includes a memory string; a first metal pattern for a source line formed under the memory string; a...
US20120086072 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND RELATED METHOD OF MANUFACTURE  
A method of manufacturing a three-dimensional semiconductor memory device comprises forming a thin layer structure by alternately stacking first and second material layers on a substrate, forming...
US20110156682 VOLTAGE CONVERTER WITH INTEGRATED SCHOTTKY DEVICE AND SYSTEMS INCLUDING SAME  
A semiconductor device such as a voltage converter includes a circuit stage such as an output stage having a high side device and a low side device which can be formed on a single die (i.e., a...
US20120306004 SEMICONDUCTOR MEMORY DEVICE  
Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor...
US20120181603 VERTICAL CHANNEL TYPE NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME  
A method for fabricating a vertical channel type non-volatile memory device including forming a source region, alternately forming a plurality of interlayer dielectric layers and a plurality of...
US20160020315 Semiconductor Device Comprising a Plurality of Transistor Cells and Manufacturing Method  
A semiconductor device comprises a plurality of transistor cells. Each one of the plurality of transistor cells comprises a trench extending into a drift zone of a semiconductor body from a first...
US20120126311 POWER TRANSISTOR WITH METAL SOURCE AND METHOD OF MANUFACTURE  
A metal source power transistor device and method of manufacture is provided, wherein the metal source power transistor having a source which is comprised of metal and which forms a Schottky...
US20080258209 SEMICONDUCTOR DEVICE AND MANUFATURING METHOD THEREOF  
A semiconductor device comprises a plurality of semiconductor pillars laid out in matrix in a first and a second directions parallel with a main surface of a semiconductor substrate, and extending...
US20100155831 Deep trench insulated gate bipolar transistor  
In one embodiment, a power transistor device comprises a substrate of a first conductivity type that forms a PN junction with an overlying buffer layer of a second conductivity type. The power...
US20090267141 METHOD FOR FABRICATING SILICON CARBIDE VERTICAL MOSFET DEVICES  
A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region...
US20140027838 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
According to one embodiment, the stair array includes a deep portion, one stair, and a plurality of stairs. The one stair is provided next to the deepest portion in the first direction and has a...
US20050035399 Semiconductor device  
A semiconductor device comprising a memory cell which includes: a pillar-shaped semiconductor layer of a first conductive type formed on a semiconductor substrate; source and drain diffusion...
US20150263160 SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS  
One method disclosed herein includes forming a sacrificial etch stop material in a recess above a replacement gate structure, with the sacrificial etch stop material in position, forming a...
US20170053906 SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE  
A device, including: a first structure including first memory cells, the first memory cells including first transistors; and a second structure including second memory cells, the second memory...
US20140167146 TUNNELING FIELD EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF  
A tunneling field effect transistor (FET) and a method of fabricating the same are provided. The tunneling FET includes a first electrode formed on a substrate, a second electrode disposed over...
US20100078698 Vertical semiconductor device, dram device including the same  
A vertical semiconductor device, a DRAM device, and associated methods, the vertical semiconductor device including single crystalline active bodies vertically disposed on an upper surface of a...
US20150318288 VERTICAL TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL  
Various methods of forming a vertical static random access memory cell and the resulting devices are disclosed. One method includes forming a plurality of pillars of semiconductor material on a...
US20150162343 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A {111} plane of a substrate having a silicon crystal structure meets a top surface of the substrate to form an interconnection line on the top surface. A first stacked structure and a second...
US20120228696 STACKED DIE POWER CONVERTER  
A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor)...
US20120126313 ULTRA THIN DIE TO IMPROVE SERIES RESISTANCE OF A FET  
A method for producing a power field effect transistor (FET) device having a low series resistance between the drain and source when switched on has the steps of: forming a vertical power FET in a...
US20150041885 SEMICONDUCTOR MEMORY DEVICE  
A semiconductor memory device includes: a sense amplifier; a plurality of memory cell arrays; a shared MOS transistor that connects/disconnects the sense amplifier and a bit line included in the...
US20120126310 METHOD FOR FORMING CHANNEL MATERIAL  
The present invention provides a method for forming a channel material, comprising: forming a substrate; forming an MOS device with a dummy gate stack on the substrate; removing the dummy gate...
US20120104489 SEMICONDUCTOR DEVICE WITH VERTICAL GATE AND METHOD FOR FABRICATING THE SAME  
A semiconductor device includes a substrate; a plurality of active pillars formed over the substrate; bulb-type trenches, each of the bulb-type trenches formed inside the substrate between the...
US20140252456 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD  
In one embodiment, a semiconductor device can include: (i) a first doped pillar region having a doping concentration that sequentially increases from bottom to top in a vertical direction; (ii)...
US20120267706 Semiconductor device and manufacturing method thereof  
The invention discloses a novel MOSFET device and its implementation method, the device comprising: a substrate; a gate stack structure, on either side of which is eliminated a conventional...
US20170062568 SEMICONDUCTOR DEVICE, SILICON WAFER AND METHOD OF MANUFACTURING A SILICON WAFER  
A semiconductor device is provided that includes a silicon semiconductor body having a drift or base zone of net n-type doping. An n-type doping is partially compensated by 10% to 80% with p-type...

Matches 1 - 50 out of 176 1 2 3 4 >