Alpha-numerical symbol display system
United States Patent 3921163

A colour CRT display system for displaying vectors according to a random scanning, which enables uniform brilliance and consistent positioning to be achieved whatever the length of trace and the colour selected and whatever the vector co-ordinates provided which may be polar or cartesian co-ordinates. A single integrator receives a reference d.c. voltage U and is controlled by a comparator receiving a threshold d.c. voltage so as to produce a sawtooth voltage the duration of which is proportional to the length of the trace. The sawtooth X and Y deflection voltages are obtained as a result of multiplication and addition of predetermined co-efficients in respective X and Y channels. Means are provided to vary the speed of scan and the amplification gain for deflection in discrete values when there is a change of colour. Further means are provided to select the d.c. voltages and the multiplying co-efficient from two sets of values corresponding to a first operation mode with polar vector co-ordinates and to a second operation mode with cartesian vector co-ordinates.

Giraud, Philippe (Paris, FR)
Marien, Jacques (Paris, FR)
Application Number:
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Filing Date:
Primary Class:
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International Classes:
G01R13/20; G09G1/28; G09G1/10; (IPC1-7): G06F3/14
Field of Search:
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US Patent References:
3611346VARIABLE RATE LINE GENERATOR1971-10-05Stoddard
3510865DIGITAL VECTOR GENERATOR1970-05-05Callahan et al.

Primary Examiner:
Curtis, Marshall M.
Attorney, Agent or Firm:
Greigg, Edwin E.
What is claimed is

1. An alpha-numerical symbol display system for displaying, according to a random scanning, successive vectors representative of graphic data on a color cathode ray tube with equal and uniform brilliance and a consistent positioning of the trace irrespective of the color scan selected and of the vector length, said system comprising:

2. A display system according to claim 1, wherein said generating means provides for the first operation mode, a predetermined constant reference voltage, a threshold voltage proportional to the length of the vector to be displayed, and multiplying signals proportional to the directive cosines of the polar co-ordinates of the vector, a first signal corresponding to the sine and a second to the cosine, said generating means providing for the second operation mode, a predetermined constant threshold voltage, a reference voltage which is inversely proportional to the length of the vector to be displayed, and multiplying signals proportional to the components which represent the cartesian co-ordinates of the vector, a first signal corresponding to the component for an X scanning axis and the second to that for an Y scanning axis.

3. A display system according to claim 2, wherein the integrator circuit comprises passive components which establish said time constant duration, and at least one sub-circuit which combines another passive component in series with a controlled switching circuit, a control signal being applied to the said switching circuit from said generating means when a change of color occurs.

4. A display system according to claim 2, wherein said generating means comprises a digital computer to produce digital signals corresponding to the said vector coordinate signals and to the said switching control signals, and further four two-input switching circuits for selecting said reference and threshold voltages and said multiplying signals respectively according to the operation mode in question, a common control signal being applied simultaneously to these four two-input switching circuits.

5. A display system according to claim 4, wherein the multiplying signals are provided in digital form to the multiplying circuits which are of the multiplying digital-analogue converter type.

6. A display system according to claim 5, wherein said generating means comprises further two digital subtractor circuits to supply, on the basis of the cartesian positional coordinates provided by said digital computer, the representative X and Y components of the vector in question, and a digital calculating circuit to calculate the inverse parameter of the length of the vector from the said X and Y vector components.

7. A display system according to claim 6, wherein the said calculating circuit comprises three programmable bipolar read-only memories, storing m, m and m2 words respectively and programmed to select the stored value closest to the true value from m2 predetermined stored values of the said parameter.


The present invention relates to a cathode ray tube display system intended for displaying graphic or alphanumeric data according to a random scanning. In particular, the invention relates to scanning means which produces appropriate deflection signals.

The invention applies advantageously to data-display systems such as electronic attitude director indicators where the data to be displayed concerns various flight parameters and where the tube is a colour CRT display.

This data consists of vectors, curves, symbols, or alphanumeric characters, complex traces being assumed to be formed by linking together vectors. The scanning of the tube is of the so-called random type, which means that the electron beam traces out the item of data in question directly, the different items of data being displayed one after the other in the course of each image-scan sequence.

In such display systems where the information density is high, there is a large number of items of data and it becomes difficult for the operator to watch them all at once. A substantial improvement as regards viewing is achieved by using a colour cathode ray tube and by dividing up the different items of data to be displayed among the various colours available. At the present time it is easy to obtain three separate colours with colour CRTs, i.e. red, yellow and green. The colours are selected by feeding the tube with a very high switchable voltage at three separate voltage levels. The result is that the electrons forming the electron beam are propagated axially along the tube at different speeds, these variations in speed having a corollary effect on the speed of scan, which is known as the trace speed. The brilliance of the parameters displayed is thus a function of the colour selected.

The problem of brilliance also exists within the limits of a single colour. Ideal operating conditions particularly necessitate that the brilliance be constant along the length of each vector displayed and that the same brilliance be achieved for the different vectors displayed.

The spot is made to move in a line between the end points of a vector by means of X and Y deflection signals which vary in a saw-tooth pattern. To this end, the scanning circuit includes integrating means. If the integration takes place with a constant integration period the trace speed is inversely proportional to the length of the vector and brilliance varies as a function of this parameter.


A display system of the type with which the invention is concerned enables the following to be achieved:

Uniform brilliance within the limits of each colour as a result of the spot moving across the screen at a constant speed whatever the length and orientation of the vectors. In this way there is no difference in brilliance between the items of data displayed nor along the traces representing them;

A brilliance which is substantially the same to the eye of the observer no matter what the colour concerned is, this brilliance being calculated chiefly to allow satisfactory viewing under conditions where there are considerable variations in ambient light;

Any vector is represented in the same way from the point of view of its position on the screen no matter what colour is selected.

The display system further enables data received in digital form to be used with either cartesian or polar co-ordinates as desired. It also allows the duration of image scan to be optimised by considerably reducing the switching dead-times between successive items of data, and the scanning speed to be changed quickly when changing colours.

According to the invention there is provided a cathode ray tube display system for displaying according to a random scanning successive vectors representative of graphic data, comprising a cathode ray tube with X and Y deflection means; a scanning circuit for providing X and Y deflection signals to said deflexion means respectively and comprising an integrator circuit having a determined time constant duration and receiving a reference d.c. voltage for producing a sawtooth signal, a comparator circuit receiving said sawtooth signal and a threshold d.c. voltage for controlling said integrator, two multiplying circuits receiving simultaneously said sawtooth signal and being each connected in series with an adding circuit, said adding circuits providing said deflection signals respectively; and generating means for generating said d.c. voltages and further two multipling signals and two adding signals for said multiplying and adding circuits respectively, said generating means comprising switching means for selecting, for each vector, said d.c. voltages and said multiplying signals from a first and a second sets of values corresponding to a first and a second operation modes respectively, the ratio between the threshold and reference voltages being proportional to the length of the vector whatever the operation mode selected.

The invention will now be further described with reference to the accompanying drawings in which similar components are given similar reference numerals and which show:


FIG. 1, the representative components of a vector and the corresponding deflection signals;

FIG. 2, a simplified diagram of a scanning circuit used in the invention;

FIG. 3, a diagram of part of FIG. 2, showing the special circuits employed to modify the circuit of FIG. 2 when using a polychromatic tube;

FIG. 4, an exemplary embodiment of the display system according to the invention using a scanning circuit as in FIGS. 2 and 3;

FIG. 5, a diagram of a multiplying converter circuit;

FIG. 6, a diagram of an adding and variable-gain amplifying circuit;

FIG. 7, a diagram of one possible embodiment of the calculating circuit in FIG. 4, and

FIGS. 8 and 9, a diagram of the screen and a curve of variation intended to show the methods employed in the calculating circuit in FIG. 7.


FIG. 1 shows the representative components of a vector and the corresponding deflection signals.

A vector PQ is defined by two components C1 and C2 which correspond to the differences between the co-ordinates of the end points. In a system where cartesian axis OX and OY correspond to the horizontal and vertical directions of scanning respectively, the co-ordinates of P are XP, YP and those of Q are XQ, YQ while the respresentative components are C1 = XQ - and C2 = YQ - YP. Using polar co-ordinates, C1 = L cos R and C2 = L sin R, L being the length of the vector PQ and R the angle formed between direction OX and this vector (the angle in the figure being positive).

The corresponding deflection voltages UX(t) and UY(t), which are applied respectively to the X and Y deflector elements of the tube, are shown respectively at the bottom and at the left of FIG. 1. The initial values UXP and UYP enable the beam to be first positioned instantaneously at the beginning P of the trace, O being taken as the point of rest when there are no deflection voltages. The time at which trace PQ begins is to and the time at which it ends to + T. The trace from P to Q is brought about by sawtooth voltages ABC for X and DEF for Y, their duration being T. Their amplitude varies in linear fashion from zero at time to to respective values UXQ-UXP proportional to C1, and UYQ-UYP proportional to C2. The proportional factor may be the same or there may be two different factors K1 and K2, depending on whether the X and Y sensitivities are to be the same or different. When the voltages return to zero at time to + T this brings the beam back to the origin at O.

The case being initially considered is assumed to be that of one-colour operation, i.e. either a monochrome cathode-ray tube is being used or operation is taking place within the limits of a single colour using a polychromatic tube.

To make the trace uniformly brilliant for the different vectors to be displayed it is necessary for the scanning speed to be the same along each vector. This trace speed is constant if it remains independent of the length parameter L, i.e. if the condition (T/L) = To = constant is satisfied, To being the time taken to trace a unit component represented by a vector of length Lo = 1.

FIG. 2 is a simplified diagram of a scanning circuit for generating deflection signals. It includes means for generating sawtooth signals which operate in a known way by integrating a predetermined DC voltage level, or reference voltage, for a predetermined period of time. The generator means comprise a single integrator 1 which receives a reference voltage U at time to and which supplies at its output a sawtooth signal of the form K3 U. t, K3 being a constant introduced by circuit 1. This signal is zero when t = to and then increases in a linear fashion until time to + T.

The integration is stopped at time to + T by a threshold comparator 2 in which the signal K3 U.t is compared to a threshold value S, duration T thus being equal to (S/K3U).

It was seen above that this relationship must be held proportional to L, i.e. either (S/K3U) = LTo or (S/U) = K3To. L, where K3 To is a constant.

Different forms of embodiment are possible to fulfil these conditions, two of them being more advantageous because one of the signals S or U is held constant, the other signal being capable of varying as a function of parameter L.

If threshold S is a DC voltage So of constant value, the reference voltage U takes the form (Uo/L), with Uo being a constant. If on the other hand voltage U is a constant DC voltage Uo, the threshold S takes the form S = SoL (So being a constant).

Circuits 3 and 4 are multiplier circuits which receive the sawtooth signal simultaneously through one of their inputs, and multiplication signals MX and MY respectively separately through second inputs. These circuits supply signals K3 U. t. MX and K3 U. t. MY respectively. Co-efficients MX and MY are chosen such that the final deflection amplitudes K1 C1 and K2 C2 (FIG. 1) of the sawtooth voltages are obtained at t = to + T.

For operation when S = So and ##EQU1## these signals are given by: ##EQU2## and ##EQU3## and they are proportional to the respective components C1 and C2.

For operation when S = So.L and U = Uo, these signals are given by ##EQU4## and ##EQU5## and they are proportional to the directive cosines of the vector. This second type of operation is equivalent to using polar co-ordinates, the first type above being suitable for use with cartesian co-ordinates.

The initial values for positioning at P are obtained by adding values UXP and UYP respectively to the signals supplied by the multiplying circuits 3 and 4 to form deflection signals UX and UY (FIG. 1). A first adding circuit 5 is connected in series with the multiplying circuit 3 and receives a signal SXP corresponding to UXP through a second input at time to, while its output feeds a signal UX to the horizontal deflectors 6 of a cathode ray tube 7. Similarly, a second adding circuit 8 in series with multiplying circuit 4 receives a signal SYP corresponding to UYP and feeds a signal UY to the vertical deflectors 9.

Block 10 represents ancillary means producing the various signals U, S, Mx, My, SXP and SYP. Where the application is to an electronic attitude director indicator system, these means comprise a digital computer which supplies the different items of data XP, YP and XQ, YQ for each vector in digital form, these items of data being transmitted to the display unit. The latter may for example incorporate: an input buffer store having random and sequential access which receives the data from the computer; a circuit for addressing the buffer store so as to extract from it the successive items of data to be displayed in the course of each image scan; a circuit for decoding the data extracted; a digital/analogue conversion circuit for the decoded data; and ancillary circuits comprising synchronising circuits.

It will now be assumed that the display tube is of the colour CRT type. Applying a very high voltage, the level of which may vary in steps, to one electrode of the tube allows a colour to be selected. For example, red, yellow and green may be produced independently in a beam penetration cathode ray tube display by applying three different levels of the very high voltage. The very high voltage causes the speed of the electrons forming the beam to vary as they move in a longitudinal direction along the gun axis. Thus, for the same deflection voltage applied, the velocity of the line trace (or trace speed), i.e., the brilliance, will vary, increasing or decreasing, depending on the color selected.

To obtain brilliance which is uniform within each colour (i.e. the trace speed is constant) and which is substantially the same for each colour (there is a different trace speed which is determined by each colour), it is necessary to give the sawtooth integrating voltage a slope as determined by each of the colours i.e. the co-efficient K3 must be different to suit the colour selected.

By way of illustration, if the slope of a sawtooth is of a given value for green, the value will be approximately doubled for yellow and multiplied by from 3 to 4 times for red.

In addition, steps should be taken to ensure that operation is the same no matter what the colour is, i.e. a vector PQ the length of which L is given by its components C1 and C2 must be shown on the screen in the same way for each colour. Consequently, it is necessary to modify the amplitude of the deflection signals UX and UY when changing colours so that positioning is still the same.

Slope and amplitude must be altered simultaneously. FIG. 3 shows some of the circuits in the diagram in FIG. 2 as well as the arrangements made to achieve a simultaneous action.

The integrator 1 comprises an integrating amplifier of the operational type made up of: an amplifier 15, a resistive component R1 between the source U and the input of amplifier 15, and a capacitive component C10 connected to give negative feedback between the output and input of amplifier 15.

The output signal K3U. t may be expressed in the form ##EQU6## R1C10 being the time constant of integration of components R1 and C10. This time constant may be varied by altering the value of either of the components R1 and C10. In the present instance resistor R1 is altered by switching when there is a change of colours. A signal S1 termed the colour selection instruction on the one hand, controls a switchable VHT generator 16 and on the other hand, switches resistors R2 and R3 in parallel with R1 via their respective switching circuits 17 and 18; for a first colour the switches are open and the value of the integrating resistor is that of R1; for a second colour switch 17 is closed and the resistance is formed by R1 and R2 in parallel; finally, for a third colour, circuits 17 and 18 are closed and the resistance is formed by R1, R2 and R3 in parallel. The switching circuits 17 and 18 are controlled via an intermediate circuit 19 which receives order S1 and identifies the circuit to be operated from it. Signal S1 may thus be a digital signal and circuit 19 may be made up of simple logic components.

The same circuit 19 is used to control the gain of two variable-gain amplifiers simultaneously. The adding circuits 5 and 8 in FIG. 2 are replaced by circuits 20 and 21 which combine a summing circuit follewed by a variable-gain amplifier. Circuits of this type are known in the form of operational circuits. The gain control signals are set beforehand to achieve the desired result, i.e. that any particular vector should be positioned in the same way whichever colour is selected. Where there are three colours, three gain co-efficients are calculated in this way.

The reference voltage U is applied to the integrator via a switching circuit 22. This circuit is instructed to close at the time to when a vector begins to be traced and to open at the time to + T when the vector in question finishes being traced. A control signal S2, such as a pulse, is applied to one input of an intermediate circuit 23 at time to, circuit 23 being for example a bistable flip-flop one of whose outputs controls the switching circuit 22. Output S3 of the threshold comparator 2 supplies the second input of change-over circuit 23. A second output of the latter controls a switching circuit 24 in parallel with the integrating capacitor C10, switch 24 being made to open from to to to + T by having signal S2 applied to it at to, and to close from to + T to the time when the next vector begins by having signal S3 applied to it at time to + T. Switch 24 causes capacitor C10 to be short-circuited and rapidly discharged at time to + T.

A preferred embodiment of a display system using a colour CRT, such as a beam penetration cathode ray tube, is shown in the diagram in FIG. 4. The system in question is of the electronic attitude director indicator type for example. Measuring apparatus (not shown) such as probes, sensors, inertia units, etc... supply measurements corresponding to various flight parameters in the form of electrical signals. After being digitally coded, this data is transmitted to a digital computer and then to a display unit which may incorporate a circuit arrangement similar to that described above for block 10 in FIG. 2.

From the point of view of the invention, the point at which the succession of display circuits is broken into is that at which the digital signals for positioning the successive vectors and those for controlling the switches in the scan circuit are delivered. This point may be situated for example, at the output of the decoding circuits. Block 30 symbolises all the circuits lying upstream of this point, these circuits being arranged in accordance with known techniques and lying outside the scope of the invention. The co-ordinates are understood to be supplied either in cartesian form (XP, YP - XQ, YQ) or in polar form (L, cos R, sin R) as the case may be. It is in fact better for certain data to use polar co-ordinates in view of the nature of the measurement signals and so as not to overload the computer needlessly. For other data cartesian co-ordinates are used.

The control signals comprise the signal S2 for the vector considered to begin to be traced, the "colour instruction" signal S1 and a co-ordinate instruction signal S4. The latter enables a distinction to be made between whether cartesian or polar co-ordinates are to be used for the current vector.

Two digital subtracting circuits 31 and 32 supply components C1 and C2 respectively on the basis of signals XP, XQ and YP, YQ. A digital circuit forms a signal the value of which is equal to or proportional to ##EQU7## from C1 and C2. A switching circuit 34 receives signal 1/L at one input, and a digital signal Uo at a second input, and is controlled by signal S4. The output of this circuit transmits 1/L or Uo, depending on whether the co-ordinate instruction S4 is equivalent to the use of cartesian or polar co-ordinates. Value Uo may be produced constantly by a store circuit or a register 35. A digital/analogue conversion circuit 36 receives the output of switch 34 and supplies the appropriate reference voltage U to integrator 1 via switching circuit 22. Circuits 1 to 4 and 19 to 22 are equivalent to those in FIG. 3.

A change of threshold in response to the co-ordinate instruction is accomplished by a switching circuit 37 controlled by the signal S4, which gives the threshold S appropriate to the type of co-ordinates being used. With polar co-ordinates, circuits 30 supply a digital value L which, having been converted into analogue form in block 36, is applied to a first input of switching circuit 37. A second input of this circuit receives from a circuit at 35, a voltage So which may be produced in the same way as Uo.

Two other switching circuits 38 and 39 controlled by S4 are used to select the MX and MY signals appropriate to the type of operation in question. Circuit 38 supplies MX to multiplying circuit 3, having received value C1 at one input and value cos R at a second. Similarly, circuit 39 receives value C2 and sin R and supplies MY to multiplying circuit 4.

The signals SYP and SXP applied to the combined summing circuits and variable-gain amplifiers 20 and 21 result from the conversion of digital signals XP and YP in 36. The appropriate connections are not shown to simplify the figure.

The signals C1, C2 or cos R, sin R applied to the switching circuits 38 and 39 may also be in analogue form after being converted in 36, although the control S4 may still be in digital form. The signals are preferably applied in digital form and MX and MY are then digital signals likewise and the circuits 3 and 4 used are of the multiplying digital/analogue converter type. The D/A converting circuit 36 may be simplified in this way.

FIG. 5 shows, as a reminder, a diagram of a multiplying D/A converter circuit which may be used to form circuit 3 for example. The signal MX considered is one of four digits so as not to overburden the Figure. Each of the connections which transmits a digit in a given position in MX controls a respective switching circuit (41, 42, 43 or 44). A local reference voltage U1 is transmitted by each of the circuits 41 to 44 if the appropriate digit is a "1". For a "0" value the appropriate switch is in the open state, a resistor network 45 and an operational amplifier 46 complete the circuit. By choosing the resistors in the network in a given way, the output signal is made equal to NU1, N representing a number corresponding to the digital signal MX. In the example shown, the binary value 0011 of MX is equal to a number N of 3 and the value of the output is 3U1. An extra connection allows information on the sign of MX to be transmitted by, for example, letting digit 0 be equivalent to + and digit 1 to -. The sign is given by the the digital information C1 or cos R discussed above and depends on whether XQ is less than XP or whether angle R is negative. An additional switching circuit 47 is controlled by the sign data and switches through value + U1 or - U1 as the case may be, the output signal becoming + U1 . N or - U1 . N respectively.

FIG. 6 shows a diagram of a summing and variable-gain amplifying circuit such as circuit 20 (FIG. 3 or 4) which receives signal SXP and the output of the associated multiplying circuit 3. It incorporates an operational amplifier 50 which is connected in a known way as an adder by applying input signals to it through two resistive components 51 and 52 which form an adder 53. The change-over between discrete predetermined levels of gain which occurs when changing colours is accomplished by altering the value of the resistor connected to give negative feedback between the output and input of the amplifier. In the same way as was described for changing slope with reference to FIG. 3, the appropriate circuit combines three resistive components 54, 55, 56 and two switching circuits 57, 58 controlled from circuit 19 by signal S1, assuming that the type of display envisaged uses three different colours.

FIG. 7 shows a simplified diagram of an embodiment of the calculating circuit 33 in FIG. 4. The digital components C1 and C2 at the outputs of the subtracting circuits 31 and 32 include an item of sign information. The so-called twos complement binary code is usually used with systems of this type which include a computer, and digital circuits 61 and 62 enables the absolute values │C1│ and │C2│ to be obtained which are used for circuit 33. Circuits 61 and 62 may consist of a switching or multiplexer circuit, a complementing circuit, and an adding circuit. The calculating circuit is arranged to calculate the value 1/L to an approximation such that consecutive variations in brilliance and position are small, of no consequence and imperceptible to the observer. The calculating circuit 33 may be produced in a compact and relatively simple form using integrated circuits. The amount of change represented by each component C1, C2 is calculated as a function of the appropriate dimension of the screen along X and Y, and of the positioning of the point of origin 0 on the screen. If point 0 is considered to be at the centre of a screen as shown in FIG. 8, the maximum values C1M and C2M of the components are equivalent to half the appropriate dimensions of the screen, and their sign may be either negative or positive. Each of the distances 0 to C1M and 0 to C2M is divided into a small number m of areas so as to give only m values of C1 and m values of C2, m being 16 for example, m is selected to such a way as to give rise to only a limited amount of error which is compatible with the operating criteria mentioned above.

In FIG. 9 is shown a function 1/√X2 + A which is equivalent to 1/L where C2 = A is a constant. A given change DL in Y corresponds to a small change in X as the origin is approached and a greater and greater one as it recedes. The m values selected for C1 (and for C2) are therefore distributed over the envisaged range C1M (and C2M) in a non-uniform manner. The distribution is such that the ratio between two successive selected values of the function is substantially constant, i.e. ##EQU8## The result is m2 predetermined values of 1/L i.e. 256 when m = 16.

For each value C1 and C2 which occurs, the means employed allow firstly the nearest predetermined values C1 and C2 to be selected and then the corresponding value of 1/L. For the X channel which receives │C1│, the circuits used comprise a circuit 63 for addressing a store 65 and, for the Y channel which receives │C2│, similar circuits 64 and 66. The function of the addressing circuit 63 (or 64) is to identify the area to which the input signal corresponds and to select the appropriate nearest value of │C1│ or │C2│ in the store. To this end each of the stores 65 (or 66) permanently contains m binary bits corresponding to these areas which constitute the m separate values of the component C1 (or C2) selected for the calculation. If C1S and C2S are the values extracted from the stores, when m = 16 these values may be four-digit binary words. They are then used in the same way to address, via cricuits 67 and 68, a third store 69 in which are held the m2 predermined values of 1/L given by the m values for X and the m values for Y. Circuits 63 to 69 are produced using known techniques. The combination 67, 68, 69 may for example be formed as integrated circuits of the programmable bipolar read only memory type. Each of the groupings 63, 65 and 64, 66 may also be produced from a programmable bipolar read only memory by dividing the digital input connections into two sets and programming the store accordingly; for example, if │C1│ is an eight bit number, two set of four bits may be selected to address the store after decoding and to extract the desired value from the m stored values.

Similarly, the various digital circuits used in the system described which are not dealt with in detail are produced in a known way using basic logic circuits generally formed by integrated circuits. By way of example, a switching circuit such as circuit 23 in FIG. 2 may be a simple fieldeffect transistor. Furthermore, no details are given of the form of the various signals S1, S2 and S4 intended for the various switching operations and which may be produced in different ways. These signals are generally made up of one or more pulses depending on the type of control to be exerted.

The scan circuit and the system described with reference to FIGS. 2 to 7 may be modified in a number of ways which provide the specified characteristics and these modifications are understood to fall within the scope of the invention. The facility of using polar or cartesian co-ordinates as desired and the fact of employing predominantly digital processing make possible a compact and lightweight embodiment which is of advantage when used to form a piece of airborne equipment.

Regarding the scanning circuit of the system, reference may be made to U.S. publications "Electrical Design News" Vol. 16, Aug. 1, 1971, No. 15, page 49, "High Speed Multiplying DAC Simplifies CRT Displays" and, "Electronic Equipment News" Vol. 14, Feb. 1973, No. 10, page 61 "Multiplying D/A converters simplify CRT displays", and to U.S. Pat. No. 3,325,802.

Of course the invention is not limited to the embodiment described and shown which has been given solely by way of example.