Title:
DIGITAL PATTERN GENERATOR FOR MOTOR SPEED CONTROL
United States Patent 3589474


Abstract:
A speed reference signal for an elevator speed control is generated by a nonlinear digital to analog converter as a function of the accumulated count in a first reversible digital counter of pulses representative of increments of displacement between the car and the hatchway. The accumulated count is limited to a predetermined maximum corresponding to a desired maximum speed. A second reversible counter maintains a running count proportional to the position of the car in the hatchway. The counts in the two counters are totalized to give an advance car position and when this total count equals the desired stopping point, as determined by a bit-by-bit comparator, deceleration is begun by causing subsequent pulses to reduce the count in the first counter. Alternatively the advance car position is generated directly in the second counter by directing pulses to this counter at twice the normal rate while pulses are being accumulated in the first counter and then at the normal rate during the constant speed phase when no pulses are being accumulated in the first counter. No pulses are directed to the second counter in the alternate configuration during deceleration while pulses are being subtracted in the first counter.



Inventors:
WAVRE ANDRE
Application Number:
04/822447
Publication Date:
06/29/1971
Filing Date:
05/07/1969
Assignee:
WESTINGHOUSE ELECTRIC CORP.
Primary Class:
International Classes:
H02P3/06; B66B1/16; B66B1/24; B66B1/28; B66B1/30; B66B1/34; B66B5/10; G05D3/12; (IPC1-7): B66B1/16
Field of Search:
187/29 318
View Patent Images:
US Patent References:
3458787ELECTRICAL CONTROL SYSTEM1969-07-29Grebe et al.
3425515DIGITAL CONTROL FOR MINE HOIST SYSTEM1969-02-04McDonald et al.
3206665Digital speed controller1965-09-14Burlingham



Primary Examiner:
Rader, Oris L.
Assistant Examiner:
Duncanson Jr., W. E.
Claims:
I claim as my invention

1. In a speed control system, a structure, a movable member mounted for movement relative to the structure, a speed regulator operative to control the speed of the movable member with respect to the structure in accordance with a speed reference signal, and a speed reference signal generator comprising first counting means for accumulating a count proportional to the incremental displacement of the movable member as it moves with respect to the structure, converter means responsive to the accumulated count in the first counting means for generating the speed reference signal as a continuous function of the accumulated count and control means responsive to the counting means for initiating a decrease in the accumulated count in said first counting means for each increment of displacement between the movable member and the structure when the accumulated count in the counting means is equal to the increments of displacement between the movable member and a desired stopping point for the movable member with respect to the structure.

2. The system of claim 1 wherein the speed reference signal generator includes limit means operable to discontinue the further accumulation of increments of displacement between the movable member and the structure when the accumulated count in the first counting means reaches a value corresponding to a predetermined maximum speed desired for the system.

3. The system of claim 2 including starting means operable to apply a bias to said converter for generating a speed reference signal adequate to initiate movement of said movable member with respect to the structure.

4. The system of claim 3 wherein said speed reference signal generator includes second counting means operable to accumulate a second count proportional to the incremental position with respect to the structure at which said movable member could be brought to a stop from the speed called for by the speed reference signal, encoder means operative to register a count proportional to the incremental position with respect to the structure at which it is desired that said movable member be brought to a stop, and comparator means responsive to the count in the second counting means and the count in the encoder and operative to trigger the control means to initiate the decrease in the accumulated count in the first counting means when the count in the second counting means equals the count in the encoder.

5. The system of claim 4 wherein the second counting means includes a counter operative to count increments of displacement as the movable member moves with respect to the structure, the count so accumulated being representative of the actual position of the movable member with respect to the structure, said second counting means also including totalizing means operative to continuously combine the accumulated count in the counter and the accumulated count in the first counting means whereby the resultant count in the totalizing means represents the incremental position with respect to the structure at which the movable member could be brought to a stop from the speed called for by the speed reference signal.

6. The system of claim 5 wherein the counter is a reversible counter operative to increase the count in the counter for each increment of displacement between the movable member and the structure when the movable member moves in a first direction with respect to the structure and operative to decrease the count in the counter for each of said increments of displacement when the movable member moves in a second direction with respect to the structure, said totalizing means being operative to add the counts in the counter and the first counting means when said member is moving in the first direction and to subtract the count in the first counting means from the count in the counter when said movable member moves in the second direction.

7. The system of claim 4 including pulse generating means operative to generate pulses at a first output for each increment of displacement as the movable member moves with respect to the structure and operative to generate pulses at a second output for alternate of said increments of displacement, said first counting means being responsive only to the pulses generated at the second output of said pulse generator, said second counting means including a counter operable to count pulses received from the first output of said pulse generator when pulses are being accumulated in the first counting means, to receive pulses from the second output of the pulse generator when no pulses are being accumulated in said first counting means and to receive no pulses while the count is being reduced in said first counting means.

8. In a speed control for controlling the speed of an elevator car with respect to a structure having a plurality of landings, a speed reference pattern generator comprising pulse generating means for generating pulses indicative of incremental movement of the elevator car with respect to the structure, reversible counting means for counting pulses generated by the pulse generator, said counting means having a first input for counting in a first direction to increase the count in said counter and a second input for counting in a second direction to decrease the count in said counter, converter means operable for generating a speed reference pattern signal as a function of the accumulated count in said counting means, control means operative to a first condition to direct the pulses generated by said pulse generator into the first input of said counter to effect an increase in the pattern signal and operative to a second condition to direct the pulses generated by the pulse generator into the second input of said counter to effect a decrease in the pattern signal, and means to apply the speed pattern signal to the speed control in the proper sense to cause the car to move in the desired direction.

9. The system of claim 8 wherein the speed reference pattern generator includes limit means responsive to the accumulated count in the counter and effective to operate the control means to a third condition wherein no pulses from the pulse generator are directed into either input of the counter when said accumulated count reaches a predetermined value.

10. The pattern generator of claim 8 wherein the converter means comprises a nonlinear digital to analog converter which produces the speed reference pattern signal as a function of the square root of the accumulated count in said counter.

11. The pattern generator of claim 8 including first bias means operative to cause said converter means to generate an initial output independent of the count in said counter to start the car moving.

12. The system of claim 11 including precision landing control means for generating the speed reference pattern signal during the final landing phase to bring the car into precise registry with the landing, and transfer means for transferring the response of the speed control from the pattern generator to the precision landing control when the count in the counter reaches a predetermined value while the counter is counting in the second direction, the magnitude of said first bias signal being so determined that the speed reference pattern signal generator by the converter substantially matches the speed reference signal generated by the precision landing control means when transfer is effected.

13. The system of claim 11 including second bias means operative to apply a second bias to the converter for increasing the output of the converter when the control means is in the first condition and for decreasing the output of the converter when the control means is in the second condition to compensate for the lag in the response of the system to the speed reference pattern signal during acceleration and deceleration.

14. The speed reference pattern generator of claim 9 including second reversible counting means responsive to the pulses generated by the pulse generator and the number of pulses accumulated in said first counter for accumulating a count representative of the advance position of the elevator car with respect to the structure, said pattern generator also including stopping means responsive when the count in the second counting means represents the desired stopping point of the elevator car to operate the control means to the second condition.

15. The speed reference pattern generator of claim 14 wherein the stopping means includes encoder means for storing a count representative of the desired stopping point of the elevator car relative to the structure and a comparator responsive to the count in the encoder and the accumulated count in the second counting means, said comparator having a first output when the count in the encoder exceeds the count in the second counting means, a second output when the count in the second counting means, a second output when the count in the second counting means exceeds the count in the encoder and a third output when the count in the encoder and the count in the second counting means are equal, said stopping means being effective to operate the control means to the second condition in response to the third output from the comparator.

16. The system of claim 14 wherein the second counting means includes a second reversible counter responsive to pulses generated by the pulse generator and operative to accumulate a count representative of the actual position of the elevator car relative to the structure by counting in a first direction when the elevator car moves in a first direction and counting in the second direction when the elevator car moves in the second direction, said second counting means also including an adder-subtracter operative to accumulate a count representative of the elevator car advance position by summing the count in said first and second reversible counters when the second counter is counting in the first direction and subtracting the count in the first reversible counter from that in the second reversible counter when the second reversible counter is counting in the second direction.

17. The speed reference pattern generator of claim 14 wherein the pulse generator includes means for generating pulses at a first rate and at a second rate which is twice the first rate, wherein the second counting means includes a second reversible counter for counting pulses generated by the pulse generator and wherein said control means is effective to direct pulses to said first reversible counter only at said first rate while being effective to direct pulses to said second reversible counter at said second rate when the control means is in the first condition, at said first rate when the control means is in the third condition and to block pulses from being directed to the second reversible counter when the control means is in the second condition.

18. A floor selector adaptable for use in an elevator system including a structure having a plurality of floors, a car mounted for movement relative to the structure to serve the floors, and supervisory means for supervising said movement, said floor selector comprising pulse generating means operative to generate pulses for each standard increment of displacement of the car relative to the structure, reversible counting means responsive to the pulse generating means and operative to accumulate a count representative of the position of the car relative to the structure and decoder means responsive to the accumulated standard count in the counting means and to the position of the various floors in terms of said standard increments of displacement for transforming the accumulated count into floor position signals to be utilized by the supervisory means.

19. The floor selector of claim 18 wherein the counting means of the floor selector includes means for adjusting the accumulated count in accordance with the velocity of the car so that the floor position signals generated by the decoder reflect the floor at which the car could be brought to a stop according to a predetermined deceleration schedule.

20. The floor selector of claim 19 wherein the counting means also includes means for generating a speed reference signal and wherein said mounting means is responsive to said speed reference signal for controlling the speed of the car.

21. The floor selector of claim 19, wherein the means for adjusting the accumulated count in accordance with the velocity of the car includes auxiliary counting means for accumulating a count of standard increments of displacement during the interval while the car is being accelerated, and totalizing means operative to totalize the accumulated count in the auxiliary counting means and the accumulated count in the reversible counting means.

22. The floor selector of claim 19, wherein the means for adjusting the accumulated count in accordance with the velocity of the car includes means within said pulse generating means for delivering pulses to said reversible counting means during the period that the car is accelerating at twice the rate that pulses are delivered to the reversible counting means while the car is traveling at constant speed.

23. The floor selector of claim 22 wherein the means for adjusting the accumulated count in accordance with the velocity of the car includes means within said pulse generating means for discontinuing the delivery of pulses to said reversible counting means during the period that the car is decelerating.

Description:
BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention is applicable to electrical speed control systems wherein it is desired to know whether and at what point deceleration must be begun in order to bring the controlled object to a stop at a variable stopping point. The system is particularly applicable to transportation systems and is even more particularly applicable to elevator systems wherein the desired stopping point may be changed at the last minute and wherein short runs require that deceleration be initiated before acceleration has been completed.

2. Description of the Prior Art

In many servo positioner systems, the primary interest is in the precise positioning of a movable member with respect to a fixed member. The speed is only an incidental consideration and is generally determined by the magnitude of the displacement error signal. In some servo positioner systems, precise speed control as well as precise positioning is the objective. This is especially true in elevator systems where closely controlled acceleration and deceleration are desired for the comfort and safety of the passengers. In an elevator system the problem is further compounded by the fact that due to subsequently registered calls or changing traffic conditions the desired stopping point of the car may be changed while the car is enroute. It is important, therefore, to continually be able to determine whether a vehicle can stop smoothly for a new call.

In slow speed elevation systems acceleration can be kept within acceptable limits easily by the inertia of the system and the inductance of the drive motor. In such systems, the deceleration is controlled merely by cutting off power to motor at some point short of the desired landing and allowing the car to coast to a stop under the retarding force of the brake. In higher speed elevators, deceleration has been controlled by successive reductions in motor excitation in stepwide fashion as the car approaches the desired landing.

The higher speed systems of today require more sophisticated control for smooth speed regulation and accurate landing. It is common practice today to drive an elevator car with a direct current motor through the well-known adjustable speed Ward Leonard type of control. In this system, the speed of the motor is controlled by varying the excitation of the shunt field of a generator which supplies the current for the direct current motor. The excitation voltage is often derived from the comparison between the actual speed of the motor and that called for by a reference pattern through utilization of an apparatus known as a drag magnet regulator such as that disclosed in the U.S. Pat. No. 2,874,806. to Oplinger. Modifications in the system disclosed by Oplinger are illustrated in the U.S. Pat. No. 3,207,265. to Lund.

According to this system, a smooth acceleration pattern is generated as a function of time by two phase-controlled thyristors. A special circuit increases the firing angle regularly until full conduction is achieved. When the firing angle reaches its maximum value, the acceleration becomes zero. In this system, a unique transducer is used for decelerating the car. It is a scale model of the system with two carriages. One carriage is driven in synchronism with the car while the second advances out in front of the first carriage a distance proportional to the speed of the car. When maximum speed is reached, the advance carriage remains a fixed distance ahead of the synchronous carriage. The position of the advance carriage represents the point at which the car could be brought to a stop from its present position and present speed. If the car is approaching the floor at which it is to stop, contacts on the advance carriage make contact with call registering circuits to initiate a slowdown sequence. The advance carriage is stopped at this point while the synchronous carriage continues moving in synchronism with the car. As the synchronous carriage approaches the now stationary advance carriage, an iron plunger on the synchronous carriage moves into a solenoid mounted on the advance carriage. This relative movement affects changes in the impedance of the solenoid from a minimum to a maximum thereby reducing the pattern signal. Two models, each with an advance carriage and a synchronous carriage, are required for this system; one for the up direction and one for the down direction. At a point approximately 10 inches from the desired stopping point, control switches from the pattern generator to a unique hatch transducer for precision landing.

Although very good results are achieved with this system, a simpler less expensive system is desirable. Continued maintenance is necessary for the numerous contacts used and for maintaining adjustment of the components. The size of the slowdown models becomes a problem in very high rise buildings since the scale of the model cannot be reduced below a practical minimum if good accuracy is to be achieved. Furthermore, the system lacks flexibility in that a separate model must be constructed for each installation.

SUMMARY OF THE INVENTION

According to this invention, a standardized digital pattern generator is utilized to generate a speed reference signal for use as a pattern signal in a conventional speed regulator. A pulse generator generates signals indicative of increments of displacement of a movable member, the speed of which is to be controlled, relative to a fixed structure. By counting the pulses developed by the pulse generator, the relative position of the movable member with respect to the structure can be followed. In addition, the pulses are separately processed to produce a speed reference signal as a function of the distance traveled.

By adding the distance over which the movable member was accelerated to the actual position of the movable member, an advance position, which is the position at which the movable member could be brought to a stop by applying a deceleration pattern corresponding to the acceleration pattern, is continuously available. By comparing this advance movable member position with the position at which it is desired that the movable member be brought to a stop the point at which deceleration should be begun may be determined.

This latter feature is particularly applicable to the systems such as elevator systems wherein the desired stopping point may be altered while the movable member, which of course would be the elevator car, is in motion. With some elevators today running at speeds in the neighborhood of 1700 to 1800 feet per minute, deceleration must be begun several floors in advance of the desired floor in order to maintain the deceleration forces on the passengers within acceptable limits. Knowledge of the possible stopping position of the car is therefore important in considering whether the car can accept a command to stop at a newly proposed position even though the car has not yet passed that point. The continuous availability of the stopping distance required is also essential for short trips where the car does not reach constant speed before deceleration must be begun.

Although as mentioned previously, the invention is readily applicable to speed controllers for other types of apparatus, it is particularly applicable to elevator systems and will therefore be described as applied to such systems. Accordingly, a first reversible digital counter begins counting from zero as the elevator car is started in either direction. The count in this counter is transformed into a continuous speed reference signal as a function of the count in the counter, and therefore the distance traveled, by a nonlinear digitial-to-analog converter. A small bias signal is applied to digital-to-analog converter to give the initial starting impetus to the system. A maximum detector on the counter is operative when the vehicle has traveled a distance which should bring it to the maximum speed desired to discontinue the introduction of pulses into this counter. When this occurs, the output of the digital-to-analog converter remains constant and constant speed is maintained. To initiate deceleration, pulses generated by movement of the car are subtracted from the accumulated count in the first counter thereby reducing the output of the digital-to-analog converter and the car decelerates. This counter counts up for acceleration and down for deceleration regardless of the direction of travel of the car. When used in conjunction with the speed regulator disclosed in Lund, the supervisory system is effective to apply the pattern signal to the speed regulator in the proper sense to cause the car to move in the desired direction.

In one embodiment of the invention, the actual position of the car is maintained in a second reversible digital counter. As the car travels up in the hatchway, pulses indicative of movement of the car relative to the hatchway are added to the count in the counter. Similarly during descent, pulses are subtracted from the count in the second counter so that the accumulated count at any instant reflects the position of the car in the hatchway. In this embodiment of the invention, the counts in both of the reversible counters are continuously combined in an adder-subtractor to give the advance car position, which as mentioned previously, is the position at which the car could be brought to a stop.

In a preferred embodiment of the invention, the advance position of the vehicle is directly available in the second reversible digital counter. During acceleration this counter receives pulses at twice the normal rate which is in effect a summation of the counts indicative of the movement of the car plus the pulses being supplied to the first reversible counter which generates the acceleration pattern. When the car reaches constant speed, the second counter begins to receive the pulses at the normal rate. Hence the count in this counter represents the advance car position. The actual position of the vehicle is no longer available, however, elevator supervisory systems normally deal in terms of the advance car position rather than the actual position.

In both of the specific embodiments of the invention mentioned, the incremental count representing the advance position of the vehicle is transformed by a decoder into a floor position signal which serves as an input to the supervisory system. At the same time the closest floor at which the supervisory system wants the vehicle to stop at is transformed into an incremental count which is continually compared in a bit-by-bit comparator with the advance car position. When the two are equal, deceleration is initiated. In the preferred embodiment of the invention, no further pulses are applied to the advance car position counter once deceleration is initiated. Therefore, when the vehicle comes to a stop, the count in this counter reflects the actual car position.

When the car is at rest and a call is registered, the position of the call and the position of the car are compared by the bit-by-bit comparator. If the coded position of the call exceeds that of the car, the car will of course be started in the up direction. Control means within the pattern generator responsive to the output of the comparator will prepare the second digital counter to count in the up direction. In the first embodiment of the invention discussed above, the control means will also prepare the adder-substractor so that it will add the counts in the first and second counters. If on the other hand, the coded position of the call is less than that of the car, the control means will prepare the second counter to count in the down direction and will prepare the adder-subtracter to subtract the count in the first counter from the count in the second counter.

Detectors can be connected to the first counter, from which the speed reference signal is derived, for generating signals when the car is a predetermined distance from the floor at which it is to stop. These signals can be used for such purposes as preopening the car doors. In addition, such signals can be used for transferring control of the car to a hatch transducer system such as that mentioned above for precise landing although acceptable landings can be achieved using the digital pattern generator alone depending upon the resolution of the pulse generator.

Since no scale model of the installation is required, the invention is readily adaptable to installations with varying numbers of floors and with varying space between floors. Only minor adjustments need be made to the encoders and decoders, while the major portion of the pattern generator remains standard.

With an understanding of the application of the invention for use in an elevator speed control system, it can be seen that the invention could easily be adapted for use in a speed control for other types of apparatus.

It is therefore a first object of the invention to provide an improved pattern generator for motor speed control systems.

The second object of the invention is to provide a system as described in the first object which is readily adaptable to a wide range of installations.

The third object of the invention is to provide a pulse controlled pattern generator for a speed control system.

It is a fourth object of the invention to provide a system as described in the third object wherein the speed reference signal is generated directly from a digital indication of the distance traveled through a nonlinear digital to analog converter.

It is a fifth object of the invention to provide a system such as that described in the third and fourth objects wherein a single counter is utilized to digitally derive the advance car position.

It is the sixth object of the invention to provide a system such as that described in the previous objects which is both inexpensive and reliable.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram with parts broken away illustrating an elevator system embodying the invention.

FIG. 2 is a block diagram of a pattern generator embodying the basic concepts of the invention.

FIG. 3 is a block diagram of a pattern generator incorporating the preferred embodiment of the invention.

FIG. 4 is a detail block diagram of a portion of the pattern generator disclosed in FIG. 3.

FIG. 5 is a schematic diagram of a decoder suitable for use with the invention.

FIG. 6 is a schematic circuit diagram of a driver circuit suitable for use with the decoder of FIG. 5.

FIG. 7 is a schematic diagram of an encoder suitable for use with the invention.

FIG. 8 is a schematic diagram of a portion of a comparator suitable for use with the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 illustrates an elevator system wherein a car 1 is mounted for movement relative to a structure 2 having six landings (not all shown). The car is supported by a rope 3 which is reeved over a traction sheave 5 mounted on the shaft of a direct current motor M. A counterweight 7 is connected to the other end of the rope 3. A governor rope 9 connected to the top and bottom of the car is reeved over governor sheave 11 located above the highest point of travel of the car in the hatchway and over a pulley 13 located at the bottom of the hatchway. A pulse generator 15 detects movement of the car 1 through the effect of circumferentially distributed holes 11A in the governor sheave 11. Pulses developed by the pulse generator are utilized by the pattern generator 17 to generate a speed reference signal under the control of the supervisory system 19.

The speed reference signal is fed into a speed regulator 21. Although any speed regulator which varies the speed of the motor in accordance with a pattern signal could be utilized, it will be assumed that the drag magnet type of regulator disclosed in the Oplinger and Lund Patents mentioned above is employed. In that system a permanent magnet deflects an arm in accordance with the speed at which a conductive disc attached to the shaft of the motor rotates between the poles of the magnet. The speed reference signal is applied to a voice coil which also exerts a force on the arm. The resultant positioning of the arm produces a command signal which serves as the excitation signal for a direct current generator 23. The current produced by the generator controls the motor M. This motor generator combination is the familiar Ward-Leonard direct current drive system. Positive feedback from the generator to the speed regulator increases the sensitivity of the regulator while negative acceleration feedback from the motor minimizes hunting.

The elevator system shown in FIG. 1 incorporates the hatch transducer landing system disclosed in the Lund Patent mentioned above. Two transformers 25 mounted on the car cooperate with hourglass shaped inductor plates 27 for precision landing.

An understanding of the basic concepts of the invention can be gained from reference to FIG. 2. Since the system is composed of components well known to those skilled in the electronics arts, the detailed circuit descriptions will not be given. By representing the well known components in blocks diagram form, a clearer view of this invention, which lies in the unique combination of the standard components, can be had.

Basically the system is composed of two reversible digital counters, Counter A and Counter B labeled B-1 and B-2 in FIG. 2. Any standard counters which present in digital form a running sum of counts up and counts down may be utilized. Preferably binary counters with the number of bits to be discussed below are adequate.

These counters selectively count pulses generated by pulse generator labeled B-3 in FIG. 2. The pulses so generated are indicative of incremental displacement of the elevator car in the hatchway. The pulse generator could be mounted on the car and triggered by regularly spaced indicia in the hatchway or could be stationary and triggered by indicia movable in synchronism with the car. For instance it might be placed in the penthouse and observe indicia on the hoist ropes or the traction sheave as the car moves up and down in the hoistway. Alternatively, a separate idler rope could be used as an indication of the car position. As a practical matter, the sheave for the governor rope required on all elevators which is under very light loading, provides a suitable indication of car movement in the hoistway.

The pulse generator can be mechanically, photoelectrically or preferably magnetically actuated. Such magnetically actuated pulse generators are well known and consist of a coil placed in close proximity to one side of the rim of the sheave 11 for the governor rope. Circumferentially spaced holes 11a through the rim of the sheave vary the reluctance of the coil sufficiently to generate a triggering signal for a conventional pulse generating circuit. Considerations such as the accuracy of the position and the maximum speed desired dictate the spacing of the holes in the governor sheave. A practical spacing has been found to be one hole for each 0.6 inches of car travel.

The operation of the various components of the digital pattern generator is controlled by the logic circuit labeled B-4 in FIG. 2. When the car is moving in the up direction the logic circuit is effective to direct pulses generated by the proximity detector into the countup input of Counter A. On the other hand, when the car is traveling in the down direction, the logic circuit is effective to direct pulses into the countdown input of reversible Counter A. Thus the count registered in reversible Counter A represents the actual position of the car within 0.6 inches. It is therefore evident that Counter A should have a sufficient number of bits to provide for the accumulation of a count corresponding to the number of pulses that would be generated by movement of the car from one end of the hatchway to the other.

The logic circuit is also effective to direct pulses generated by the pulse generator into the reversible Counter B during acceleration and deceleration. During acceleration pulses produced by the proximity detector are directed to the countup input of the reversible Counter B. This is true whether the car is accelerating in the upward or downward direction.

The output of the reversible Counter B serves as an input to the nonlinear digital to analog converter B-5. The digital to analog converter produces the speed reference signal as a nonlinear function of the count registered in Counter B. The nonlinear characteristic is required because the count in Counter B represents the distance traveled during acceleration and it is common knowledge that under constant acceleration the velocity is proportional to the square root of the distance traveled. Converters with such characteristics are well known. Actually improved response can be achieved by adjusting the converter so that the output is not a straight function of the square root of the count in the counter but rather provide for increased initial rates of acceleration. As long as the transition is smooth, no adverse affects are felt by the passengers.

The velocity reference signal generated by the nonlinear digital to analog converter can be used in a conventional speed control system such as the system described in FIG. 1 to regulate the speed of the motor. The signal generated by the subject invention can also be utilized to operate other speed control schemes such as pulse controlled motor circuits.

Since a count is only registered in Counter B upon movement of the car it is necessary that the logic circuit supply a bias signal to the nonlinear digital to analog converter to start the car from rest. Once the car begins to move, the pulses generated by the proximity detector and directed by the logic circuit into reversible Counter B will cause the output of this counter to increase which will in turn increase the velocity reference signal generated by the converter. With such a closed loop, the car would continue to accelerate to the maximum capability of the motor. In order to limit the velocity obtainable by this system, the maximum detector labeled B-6 in FIG. 2 is effective to cause the logic circuit to discontinue supplying pulses to the reversible Counter B when the count in this counter reaches a magnitude corresponding to the preset maximum velocity desired. When this occurs the output of reversible Counter B will remain constant and therefore the velocity reference signal generated by the converter will remain constant so that the car will maintain a constant speed.

When deceleration is to begin, a signal generated in a manner to be discussed below causes the logic circuit to direct the pulses generated by the pulse generator into the countdown input of reversible Counter B. As the count in Counter B is reduced, the velocity reference signal generated by the converter is likewise reduced and the car will begin to slow down. When the count in Counter B reaches zero, the car will be at rest. It can be seen therefore, that the count registered in the Counter B at any instant is representative of the distance required to stop since the pulses counted represent the distance traveled during acceleration and since the speed reference signal is decreased in the same proportion during deceleration as the count is reduced. It will therefore always take the same number of pulses or distance to reduce the velocity to zero as it did to obtain the given velocity.

The count registered in Counter A which it will be remembered represents the actual position of the car, is fed into the adder-subtracter labeled B-7 in FIG. 2 as is the count registered in Counter B. The two counts are either added or subtracted in B-7 upon command of the logic circuit depending upon whether the car is traveling in the up of down direction. For instance, if the car is traveling in the up direction the logic circuit will generate a signal which will cause the adder-subtracter to add the counts registered in Counters A and B, while if the car is traveling in the down direction the count in Counter B will be subtracted from that in Counter A. The resultant count registered in the adder-subtracter represents the advance car position. The advance car position is the point at which the car could be brought to a stop from its current velocity under the predetermined deceleration schedule. Knowledge of the advance car position is important in determining whether a car can be caused to respond to a call in front of it or not. This is especially important in very high speed elevators, up to 1800 feet per minute, where several floors are needed to bring the car to a smooth stop without unnecessary stress of the passengers. It is equally important in other speed control systems where the stopping point or set point may be varied while the object is in motion.

It is customary for elevator supervisory systems to deal in terms of the advance car position rather than the actual position of the car. Therefore, the output of the adder-subtracter is fed into a decoder, B-8 in FIG. 2, which produces a signal that is supplied to the supervisory system. The decoder is required because the output of the adder-subtracter is a binary number accurate to the nearest 0.6 inches while the supervisory system is concerned only with discrete floors. The decoder B-8 therefore should be effective to maintain a given output while the car is moving past the given floor and then advance to the next floor. Preferably the decoder is designed so that a given floor position is maintained while the car is half-way below to half-way above the given floor. The result is that while the output of the adder-subtracter may change by several hundred counts while the car passes a floor, the output of the decoder will remain constant until the car is closer to the next floor. This portion of the apparatus therefore functions as a floor selector providing the supervisory system with the advance car position without the use of mechanical devices such as the scale models mentioned in the Oplinger and Lund Patents.

A portion of a suitable decoder is illustrated in FIG. 5. In this system the digital components utilize two complementary buses for each binary bit. For instance, the bus Q1 connected to the first bit of the adder-subtracter is complemented by the bus Q1. The signals on these buses are opposite at all times. In other words, when the signal on Q1 has a value of one, the signal Q1 had a value of zero and vice versa. For purposes of illustration only the buses for 3-bits are shown in FIG. 5, although for the average size elevator installation, the adder subtracter would require many bits as discussed above. Even so, only the most significant bits need be utilized in the decoder since it is not necessary to have the floor selector notch to the next floor at a precise point. Five to eight of the most significant bits would be satisfactory for the normal range of building heights.

The circuit components illustrated in FIG. 5 such as 34 up are basic NAND logic circuits. The circuitry of such components is well known in the electronics field and it is sufficient to say that their characteristics are such that they have an output with a value of ONE at all times unless all of the inputs have a value of ONE in which case the output goes to ZERO. Two NAND circuits can be combined to form a flip-flop memory circuit as indicated by the component labeled 2M in FIG. 5.

Referring to FIG. 5 it will be seen that detectors such as 12UP and 12DN are connected in matrix form with selected buses Q1 through Q3 of the adder-subtracter. The connections for 12UP and 12DN are made so that when the advance car position, as reflected by the count in the adder-subtracter, equals the point half-way between the first and second floors, all of the Q inputs to these NAND elements will be equal to ONE. If in addition, the car is traveling in the up direction, so that the signal on the UP bus is equal to ONE, the output of detector 12UP will go to ZERO. It can be appreciated that the output of only one detector can be equal to ZERO at any one time. If the car had been traveling in the down direction the output of 12DN would have gone to ZERO. The UP and DN signals are generated in the logic circuits as will be seen below.

A flip-flop memory such as 2M for the second floor is provided for each floor in the building A RESET signal which is normally equal to ONE resets the outputs of all the memories except the first floor memory (not shown) equal to ONE when it goes to ZERO. This is done when the car is at the first floor. Capacitors C connected to the outputs of the memories slow down the response and prevent false actuation due to noise.

The lower output of the memories are normally maintained in the ONE state by the ZERO output of the upper NAND. However, as the car approaches the particular floor and the detector output connected to the upper, or set, input of the memory goes to ZERO, the lower output of the memory goes to ZERO. For instance, as the car in traveling upward passes the point midway between the first and second floor, the output of 12UP goes to ZERO to set the lower output of 2M equal to ZERO. 2M will remain in this state even though the output of 12UP goes back to a ONE. As the car reaches the point midway between the second and third floors, the output of 23UP will go to ZERO. This will set the lower output of 3M equal to ZERO and reset the lower output of 2M equal to ONE. In this manner the up detectors set the output of the memory above to ZERO and reset the output of the memory below equal to ONE as the car passes the point in the hatchway with which the detector is associated. Likewise, when the car is traveling in the down direction, the down detectors will set the memory below and reset the memory above as the car passes the associated midpoint.

The outputs of the memories can be utilized to operate solid state or relay circuits in the supervisory system to indicate the position of the car through driver circuits such as 2D in FIG. 5. A suitable 2 transistor circuit for such a drive is shown in FIG. 6.

The collector and emitter of a NPN transistor T2 are connected in series with a relay coil C2, and a voltage source V+.

When T2 is on current flow through the coil to activate the relay. With T2 cut off, the coil will be deenergized. The coil is protected by a diode D3.

T2 is controlled by another NPN transistor T1 connected in the base to emitter circuit of T2. When t2 is on, the case of T1 will be substantially at ground and T1 will be cutoff. However, when T2 is cutoff, the base of T1 will be forward biased by the V+ supply through resistor R4 and T1 will conduct.

The base current of T1 is controlled by the output of the associated memory. A negative bias is applied to the base of T1 from a -11 volt supply through resistor R3. A diode D2 connected between the emitter and base of T1 limits the amount of negative bias that can be applied to this junction. The output of the associated memory circuit (terminal A) is connected to the base of T1 through diode D1 and resistor R2. A +6 volt supply provides base drive current to T1 through resistor R1 in response to a positive potential at the output of memory.

When point A is at zero potential, indicating that the car is closest to the floor associated with that memory, the base to emitter junction of T1 is reverse biased. With T1 cutoff, T2 will be on and the coil will be energized. As the car moves away from the floor and the output of the memory goes to ONE thereby applying a positive potential to point A, base drive current will be supplied to T1 and T1 will therefore be turned on. This will turn off T2 and the relay will be deenergized.

The output of the adder-subtracter is also fed into a bit-by-bit comparator labeled B-9 in FIG. 2. In the comparator, the advance car position is compared with a signal generated by an encoder labeled B-10 in FIG. 2. The encoder converts into a binary number of the floor at which the closest call which the supervisory system wants the car to stop for is registered. Such encoders are well known in the electronics field.

A suitable encoder is illustrated in simplified form in FIG. 7. The supervisory system generates signals on the horizontal buses in the matrix shown when it is desired that the elevator car proceed to the associated floor. Since this portion of the supervisory system is not the subject of this invention, a simple switch SW is shown which connects the bus associated with the appropriate floor to a V+ supply.

The horizontal buses are selectedly connected through diodes D, to certain of the vertical buses each of which is associated with a separate binary bit in the encoder output. The horizontal and vertical buses are interconnected in such a manner that the binary number generated corresponds to the increments of displacement of the car in the hatchway associated with that floor. The interconnections shown in FIG. 7 are for illustration only and are not intended to represent the correct interconnections for a specific building. One of the advantages of the invention is that the same standard pattern generator may be used for a wide range of installations with only changes in these interconnections in the encoder and in the decoder discussed above.

Each of the vertical buses is connected to a circuit which generates complementary signals indicative of the state of the particular binary bit. A circuit diagram is shown for bit 14 but it is to be understood that similar circuits are provided in the blocks shown for the other bits. The signal B14 has a value of ONE when the vertical bus associated with the 14 digit is connected to the V+ source. When this occurs the complementary signal B14 will be equal to ZERO.

The signal B14 is represented by the collector to ground voltage on transistor T4. This signal will be equal to ONE if T4 is cutoff and will be equal to ZERO when T4 is on. T4 is controlled by a second transistor T3 the collector of which is connected to the base of T4 through diode D6 and resister R8. The base of T4 is also connected to a -11 volt bias supply through resistor R10. The emitter of T4 is connected to ground and a diode D5 connected from the emitter to base of T4 limits the amount of negative bias that can be applied to the base to emitter junction. The collector of T4 is connected to a +6 volt supply through resistor R11.

The collector of transistor T3 is also connected to the +6 volt supply through a resistor R7. The collector to ground voltage on T3 represents the complementary signal B14. The base of T3 is negatively biased by the -11 volt supply through resistor R9. The emitter of T3 is connected to ground and the diode D4 limits the negative voltage that can be applied across the base to emitter junction of T3. The base of T3 is also connected to the associated vertical bus in the matrix through resistor R6.

When the vertical bus associated with bit 14 is connected to the V+ supply, the base to emitter junction of T3 will be forward biased and T3 will be turned on. With T3 turned on, the collector will be substantially at ground and therefore B14 will be equal to ZERO. In addition, with the collector of T3 at ground, the base to emitter junction of T4 will be reversed biased and T4 will be cutoff. With T4 cutoff, +6 volts will appear on the collector of T4 and B14 will be equal to ONE.

However, if the vertical bus associated with bit 14 is not connected to the V+ supply, T3 will be cutoff by the -11 volt supply through the voltage drop across the diode D4. With +6 volts on the collector of T3, B14 will be equal to ONE. Also, since R10 is made much larger than R8, a positive voltage will appear on the base of T4 which will therefore be turned on. With the collector of T4 essentially at ground, B14 will be equal to ZERO.

The output of the comparator circuit affects control by the logic circuit. When the number registered in the encoder exceeds the advance car position, the supervisory system is calling for the car to travel in the up direction. On the other hand, when the count in the encoder is less than the advance car position, the car should travel in the down direction. If the car is to travel in the up direction, the output of the comparator will cause the logic circuit to direct the pulses into the countup input of Counter A and cause the adder-subtractor to add the outputs of Counter A and Counter B. Similarly, if the car is to travel in the down direction, the output of the comparator will indicate to the logic circuit that the pulses should be directed into the countdown input of Counter A and that the adder-subtracter should subtract the output of Counter B from that of Counter A.

The comparator is also instrumental in initiating deceleration as the car approaches a landing at which it is to stop. When the advance car position is equal to the encoded floor at which a car or corridor call is registered, an equality signal is generated. The comparator utilized is a type having two output buses. A signal with the value of one is generated on one bus when the count in the encoder exceeds, or is superior to, the count in the adder-subtracter. A signal with a value of one is generated on the other bus when the count in the encoder is inferior to that in the adder-subtracter. The absence of a signal on both buses indicates equality.

When the logic circuit receives the equality signal from the comparator, it directs pulses produced by the pulse generator into the countdown input of reversible Counter B. This in turn will cause a reduction in the output of the nonlinear digital to analog converter which, as previously mentioned, is the velocity reference signal. Further movement of the car, now at a slower rate, will cause a further reduction in the count registered in the Counter B which in turn will result in a further reduction in the speed reference signal.

A schematic circuit diagram of a portion of a suitable comparator is shown in FIG. 8. Such a comparator compares each bit in the encoder with the associated bit in the adder-subtracter beginning with the most significant and proceeding through to the least significant. The comparison between a particular bit in the adder-subtracter with the associated bit in the encoder is only significant therefore if all of the more significant bits are equal. Since the various stages of the comparator utilized are composed of NAND elements, this would require that a NAND associated with a particular bit, have as an input an output from each of the higher order NANDs in the comparator. Practical limitations on the number of inputs that can be made available for a NAND element dictate that the comparator be broken up into modules such as the one illustrated in FIG. 8 which is for bits 5 through 8.

For purposes of illustration, the Q signals represent the bits in the adder-subtracter, which the B signals represent the bits in the encoder. If all of the higher order bits in the adder-subtracter are equal to the associated bits in the encoder, the signals on the Carry InI bus and Carry InS bus in FIG. 8 are both equal to ZERO. Therefore NAND elements CI8 and CS8 will apply a ONE input to each of the other NAND elements in the module. If bit 8 in the adder-subtracter and the encoder are both equal to ONE, Q8 would be equal to ZERO to ensure that NAND S8 supplied a ONE to the input of all the inferiority NANDs in the module in addition to the Carry Out S NAND CS5, while B8 would be equal to ZERO to ensure that NAND I8 supplied a ONE to the input of each of the superiority NANDs in the module in addition to the Carry Out I NAND CI5. Likewise if bit 8 in both registers had been equal to ZERO, B8 and Q8 would make the outputs of S8 and I8 equal to ONE respectively. If bits 7 through 5 for both registers are equal, the outputs of NANDs CS5 and CI5 will both be equal to ZERO. These signals will serve as the Carry in Signals to the next module.

If on the other hand, bit B8 is equal to ONE while bit Q8 is equal to ZERO so that the number registered in the encoder is superior to the count registered in the adder-subtracter, both B8 and Q8 will be equal to ONE to make the output of S8 equal to Zero. This will ensure that the Carry Out S signal produced by NAND CS5 is equal to ONE. This signal will be propagated through the module for bits 4 through 1 and will be delivered to the logic circuit as a superiority signal. The ZERO output of S8 is applied to NANDs I7, I6 and I5 to block further comparison of less significant bits which might otherwise produce a ONE output on the inferiority bus.

The modules for the higher order bits can be constructed in the same manner as that shown in FIG. 8 although of course the module for the highest order bits would not require a Carry in I or Carry in S signal. The Carry out signals of one module serve as the Carry in signals for the next succeeding module It is to be understood that the modules could be constructed of more or fewer bits. Although the modules could be constructed of discrete elements, they have been fabricated in the form of integrated circuits which reduces the cost and space required.

The system described in FIG. 2 will fully perform in accordance with the basic concepts of this invention; however, considerable circuitry is involved in the adder-subtracter, B-7, which increases the cost and complexity of this system a great deal. The system disclosed in block diagram form in FIG. 3 performs the same basic functions as that discussed above yet without the complicated circuitry involved in the adder-subtracter. In addition, the system disclosed in FIG. 3 embodies some improvements which can also be applied to the basic system disclosed in FIG. 1.

Like the system previously described, the system of FIG. 3 utilizes two reversible counters B-1 and B-2, a pulse generator B-3, logic circuits B-4', a nonlinear digital to analog converter B-5, a comparator B-7, an encoder B-10 and a decoder B-8. All of these components may be exactly the same as those utilized in the system disclosed in FIG. 2 except of course the logic circuit, B-4', is modified to conform to the new logic. Like the previously described system a maximum detector B-6 is connected to the reversible Counter B to limit the amplitude of the speed reference signal generated. However, in addition, a minimum detector B-b', for purposes to be discussed below, is also connected to reversible counter B. The system of FIG. 3 also incorporates maximum and minimum detectors labeled B-11 for reversible Counter A and a landing detector labeled B-22 connected to Counter B for purposes to be discussed below.

The system of FIG. 3 has an additional component called a scaler identified by the reference character B-12. The purpose of the scaler is to produce two pulse signals in response to the signal received from the pulse generator. The scaler produces one signal at twice the pulse rate of the other output. In order to accomplish this the scaler produces one output signal at the same pulse rate as that received from the pulse generator. The other signal must therefore either be at twice or at one-half that rate. Since it is more complicated circuitwise and therefore more expensive to produce a pulse multiplier, it is more practical to employ a pulse divider which produces, as a second output from the scaler, a pulse for every other pulse generated by the pulse generator. For convenience, this output of the pulse generator will be considered to generate pulses at the rate of P. In order to maintain the same accuracy as was obtained in the system of FIG. 2, the number of holes, 11a, in the generator sheave can be doubled so that there is one hole for each 0.3 inches of car movement. Therefore, pulses will be generated at the 2P output of the scaler for every 0.3 inches of travel of the car while a pulse will be generated at the P output of the scaler for each 0.6 inches of travel of the car.

As was the case in the previously described system, pulses are fed reversible Counter B through the countup input while the car is accelerating. In the system of FIG. 3, however, the pulses are fed into the counter at a rate which is one-half the rate at which the pulses are generated by the proximity detector. In other words, the logic circuit directs pulses into reversible Counter B from the P output of the scaler. Again the digital output of the reversible Counter B serves as an input to the nonlinear digital to analog converter which produces the velocity reference signal essentially as a function of the square root of the count in Counter B. Again when the count in the reversible Counter B reaches a value corresponding the the programmed maximum speed of the car, the maximum detector will trigger the logic circuit to discontinue the input of pulses to Counter B. The purpose of the minimum detector will be discussed below.

The hardware comprising reversible Counter A is identical to that utilized in FIG. 1, however, the count in this counter will now represent the advance car position. The logic circuit is so arranged that it can deliver pulses to reversible Counter A from the P or 2P output of the scaler. During periods of acceleration pulses are delivered to reversible Counter A at either the countup or countdown input, depending upon the direction of travel of the car, from the 2P output of the scaler. During periods of constant speed pulses are delivered to the appropriate input of reversible Counter A from the P output of the scaler. In other words, when the car is traveling at constant speed the reversible Counter A receives pulses at a rate proportional to the distance traveled by the car, but during acceleration reversible Counter A receives pulses at a rate corresponding to the rate of movement of the car plus the rate at which pulses are being delivered to Counter B. It can be seen then that when the car is traveling in the up direction the count in the reversible Counter A exceeds the number of pulses representing the actual movement of the car by the number of pulses inserted in the reversible Counter B. Essentially then the function performed by the adder-subtractor in the system of FIG. 2 is performed more simply by the scaler and Counter A in the system of FIG. 3. As a result, the count in reversible Counter A represents the advanced car position, which again is the position at which the car can be brought to a stop if deceleration is initiated at any given instant.

When deceleration is initiated, the input of pulses to reversible Counter A is discontinued so that the count in Counter A remains constant as the count in reversible Counter B is reduced to slow the car down. When the car comes to a stop, the count in Counter A represents the true position of the car. In other words, the advance car position and the actual car position coincide. It is obvious that the actual car position is not available while the car is in motion, however, conventional supervisory systems are concerned with the advance car position rather than the actual position. The output of Counter A is transformed into floor positions in the decoder B-8 for use by the supervisory system.

The maximum and minimum detectors connected to the reversible Counter A and labeled B-11 in FIG. 3 are provided as a precautionary measure to initiate the stopping sequence at the top and bottom floors to prevent overtravel of the cars should the supervisory system fail to generate a closest call signal. Such a feature would normally not come into play since it is assumed that the supervisory system will generate a closest call signal for the next floor ahead of the car when there are no actual calls ahead registered. It is within the competency of one skilled in the elevator art to design such a feature into the supervisory system.

It is contemplated that the pattern generator which is the subject of this invention be used in conjunction with the hatch transducer landing system disclosed in the Lund Patent mentioned above. Under this system precise control of the car for accurate landing is transferred to a hatch transducer system when the car approaches within 10 inches of the floor. According to that scheme the car seeks a balance point with respect to the voltage induced in the secondaries of two transformers mounted on the car. These voltages are influenced by triangular shaped inductor plates mounted on the wall of the hatchway adjacent each landing in such a manner that the induced voltages will only be equal when the car is level with the landing. In order to effect a transition to the hatch transducer system, a landing detector B-22 is actuated when the count in reversible Counter B is equivalent to a point 18 inches above or below a landing during deceleration. The signal thus generated is operative to enable a photoelectric circuit (not shown) and when the car reaches a predetermined point short of the landing (usually about 10 inches) the photocell signal is generate which effects transfer to the hatch transducer system. The hatch transducer provides for very accurate landing, however, it is not essential that control be transferred to a hatch transducer since the pattern generator which is the subject matter of this invention can be used solely for controlling the movement of the car in the final landing phase with reasonably good results.

The minimum signal generated by the detector B-6' is effective to discontinue the countdown in Counter B once control is transferred to the hatch transducers. This is to prevent the Counter B from counting down to zero and receiving another pulse which would cause it to go to its highest count. It is obvious that if this occurred the maximum speed reference signal would be generated. The bias signals provided by the logic circuit to the nonlinear digital to analog converter will be discussed below in connection with the detailed description of the logic circuits.

FIG. 4 illustrates a suitable logic circuit in block diagram form for the system described in FIG. 3. The portion of the Figure included in the dot dash lines is the logic circuit. Other components outside of the dot dash line are illustrated to show their interconnection with components of the logic circuit. The logic circuit is composed of basic NAND elements which are used to perform gate functions and are combined to form flip-flops. A line-driver or power NAND gate is used when high fanout capability is required.

The basic component of the logic circuit is the control element labeled B-13 in FIG. 4. It receives inputs from the maximum and minimum detectors B-11 connected to reversible Counter A, from an equality detector B-14 and from the supervisory system in the form of a start signal. The signal generated by the control element controls the pulse selector B-15 for reversible Counter A, the acceleration and deceleration gates B-16 and B-17 respectively which control the input of pulses to reversible Counter B, a door signal element B-18 and a transfer to hatch transducer element B-19.

The acceleration gate B-16 gates pulses from the P output of the scaler B-12 into reversible Counter B until the accumulated count in the counter reaches the predetermined value associated with the programmed maximum speed whereupon the maximum detector B-6 will be effective to block the acceleration gate from directing additional pulses into Counter B. The acceleration gate is also effective to cause the bias circuit B-20 to apply a small bias to the digital to analog converter upon initial application of the starting signal to the control element so that the car will begin to move and generate pulses. Once the car is moving, a bias is applied to the converter under the control of the acceleration gate to compensate for the lag in the response of the system to the speed reference signal. As a practical matter, the starting bias can serve this latter purpose also and its amplitude is determined accordingly. The bias is applied through filters t smooth the response and is added to the pattern signal by the addition of an extra bit in the digital to analog converter.

The deceleration gate is effective to gate pulses from the P output of the scaler into the countdown input of reversible Counter B during periods of deceleration. It is also effective to apply a slight negative bias comparable to the starting bias to the digital to analog converter during deceleration to similarly compensate for the lag in the response of the system. The minimum detector B-6' is effective to block the deceleration gate from directing additional pulses into the countdown input of the Counter B when the count reaches a predetermined minimum value after transfer to the hatch transducer to prevent the Counter from counting through zero as mentioned above.

The control element B-13 affects the input of pulses into reversible Counter A through control of the pulse selector B-15 which gates pulses when required from either the P or 2P output of the scaler into a direction selector B-21. The pulse selector also receives a signal from the maximum detector B-6 connected to the reversible Counter B. The direction selector receives additional inputs from the up-down selector B-23 which in turn receives inputs from the superiority and inferiority buses of the comparator. Depending upon which of the latter signals is present, the up-down selector is operative to generate either an up or down signal. The up and down signals are effective respectively to cause the direction selector to gate pulses delivered by the pulse selector into either the countup or countdown input of the reversible Counter A. The up or down signal once generated will be maintained by the up-down selector until control is transferred to the hatch transducer system as the car is brought to a stop at which time a signal from the transfer to hatch transducer element B-19 will clear the up-down selector in preparation for the next trip.

It will be noticed that a start signal is shown as an input to reversible Counter B in FIG. 4. Since as was just mentioned the minimum detector causes the deceleration gate B-17 to discontinue the delivery of pulses to the countdown input of the counter B after transfer to the hatch transducer, a count will remain in Counter B when the car comes to a stop under the influence of the hatch transducer. In order to clear the counter, it is provided that the start signal from the supervisory system resets the Counter B to zero before the next trip. This signal was not shown in FIG. 3 for the sake of simplicity. The start signal is also applied to the scaler to reset the pulse divider circuit at the beginning of each run. This is done to minimize the digital error.

The door signal element B-18 receives a signal from the landing detector B-22 in addition to the signal from the control element and it produces a signal to initiate preopening of the doors in a conventional manner when the count in Counter B reaches a count corresponding to a predetermined distance from a landing at which the car is to stop. This door signal along with the control signal prepares the transfer element B-19 so that when the photoelectric signal PHL is produced as the car approaches within 10 inches of the landing, the transfer signal is generated which effects transfer of control to the hatch transducer system.

It would be helpful at this point to describe a typical operation of this system. For purposes of illustration the system described in FIGS. 3 and 4 will be considered and it will be assumed initially that the car is at rest at the first floor. Under these conditions the count registered in reversible Counter A corresponds to the first floor position. Since the car is at rest no pulses are being generated by the pulse generator.

Assume now that either a passenger enters the car and registers a car call for the sixth floor or that a corridor call for the sixth floor is registered. When the start signal is generated by the supervisory system the scaler will be reset and reversible Counter B will be set to zero. The start signal will also cause the output of the control element B-13 in the logic circuit to go to zero which transfers control from the hatch transducer back to the pattern generator. This control signal will also close the deceleration gate and open the acceleration gate although no pulses can be delivered to reversible Counter B at this point.

When the supervisory system assigns the car to answer the call at the sixth floor, the encoder B-10 on FIG. 3 is set to the indication corresponding to the sixth floor. Since the binary number in the encoder exceeds the binary number in the reversible Counter A the bit-by-bit comparator will generate a signal on the superiority bus. By referring to FIG. 4, it will be seen that this signal will cause the up-down selector B-23 to generate an up signal which in turn will prepare the direction selector to gate pulses into the countup input of reversible Counter A.

The opening of the acceleration gate will cause the bias circuit B-20 within the logic circuit to apply a small bias to the digital to analog converter. The velocity reference signal thus generated will initiate upward movement of the car. The initial movement of the car will cause the governor rope to move which in turn will rotate the governor sheave. As the holes in the sheave pass the coil on the pulse generator pulses will be generated. For each pulse generated by the pulse generator the scaler will supply a pulse at the 2P output and for every other pulse generated by the pulse generator the scaler will supply a pulse at the P output. Since the count in Counter B is at zero at this point the maximum detector B-6 will not inhibit the acceleration gate and therefore pulses from the P output of the scaler will be gated into the countup input of reversible Counter B. With the control signal and the output of maximum detector B-6 equal to zero, the pulse selector B-15 will gate pulses from the 2P output of the scaler into the direction selector B-21.

As the car begins to accelerate in the up direction, pulses are gated into the countup input of reversible Counter A at twice the rate that pulses are being gated into the reversible Counter B thereby producing a running indication of the point at which the car could be brought to a stop if deceleration were initiated at that instant. Of course as the count in Counter B increases, the velocity reference signal generated by the digital to analog converter increases which in turn causes the pulse rate to increase.

When the count in Counter B reaches the value corresponding to the programmed maximum speed for the car, the maximum detector B-6 will be operated. This will close the acceleration gate thereby terminating the input of pulses to the countup input of Counter B and will cause the pulse selector B-15 to switch from delivering pulses from the 2P output of the scaler into Counter A, to pulses from the P output of the scaler. The closing of the acceleration gate will also remove the bias which it will be recalled was applied during acceleration to compensate for the lag in the system. Since the output of Counter B remains constant the velocity reference signal remains constant and the car will maintain a constant speed. The count in Counter A will now increase at a rate corresponding to the actual rate of movement of the car upward in the hatchway. The actual count in Counter A, however, will not correspond to the real position of the car but rather will reflect the advance car position since pulses were delivered to that counter at twice the actual rate of movement of the car during acceleration.

For the sake of illustration assume that two floors are required for the car to reach its programmed speed. Under these circumstances the car would be adjacent the third floor position when it reaches maximum speed, however, the count in reversible Counter A would indicate that the car was adjacent the fifth floor since as mentioned the Counter A was receiving pulses at twice the actual rate of movement of the car during acceleration. Since the decoder B-8 in FIG. 3 transmits the advance car position to the supervisory system, the supervisory system considers the car to be at the fifth floor at this point. Therefore, if a subsequent call should be registered at the fourth floor the supervisory system will not attempt to stop the car for that call even though the car is still below the fourth floor since it considers the car past the fourth floor position as indeed it would be before it could be brought to a stop.

As the car proceeds upward at constant speed, pulses from the P output of the scaler are directed into the countup input of reversible Counter A. During this period the count in Counter A will indicate that the car is two floors ahead of the real car position. Therefore when the car actually reaches the fourth floor the count in Counter A will indicate that the car is at the sixth floor. At this point, the count in Counter A will equal the binary number stored in the encoder and no signal will be generated on either the superiority or inferiority buses of the comparator.

With no signal on either output bus of the comparator, the equality detector B-14 in FIG. 4 will activate the control element. The output from the control element will operate the pulse selector to discontinue the input of pulses into Counter A, will hold the acceleration gate closed and will open the deceleration gate. The signal will also prepare the circuits for operating the door signal and the transfer to hatch transducer signal. Under these conditions the pulses from the P output of the scaler will be gated through the deceleration gate into the countdown input of reversible Counter B. Successive pulses therefore reduce the count in this counter which in turn reduces the velocity reference signal generated by the digital to analog converter and the car will begin to slow down. The deceleration gate will apply a small bias to the digital to analog converter to compensate for the lag between the pattern speed and the response of the system.

During the deceleration phase, the count in Counter A remains constant at the sixth floor indication as the actual position of the car approaches the sixth floor. When the car reaches a point 18 inches below the level of the sixth floor, the detector B-22 will be operated to generate the door open signal. The door open signal will initiate opening of the car doors as the car approaches the landing which is conventional in elevator systems today.

The door open signal is also effective to arm a photoelectric circuit which is utilized to transfer control from the pattern generator which is the subject of this invention to the hatch transducer mentioned above. When the car reaches a point approximately 10 inches below the sixth floor position the projector in the photoelectric circuit will energize the circuit so that the transfer to hatch transducer signal is generated in B-19. Precise control of the car during the final landing stage will be controlled by the system described in the Lund Patent mentioned above. Pulses will continue to be delivered to the countdown input of Counter B until the minimum count is reached, whereupon the minimum detector B-6' will be activated to close the deceleration gate. As the car is brought to a stop at the sixth floor position, the count in Counter A becomes representative of the actual position of the car. It is not necessary to provide for periodic alignment of the count in Counter A since it is precisely set each time the car makes a stop.

As was mentioned previously, although the system has been described as applied to elevator systems, the invention is suitable for use with speed control devices in other systems. The continuous availability of the advance position of the object being controlled is particularly useful in those systems wherein the decision on the stopping point is made or altered while the object is in motion. It is clear from the description above that the unit does not require any major modification for distances between the floors or the number of floors for different buildings. As long as the number of bits in the counters, especially Counter A, is adequate, the only modifications necessary for different buildings are in the encoders and the decoders. Such modifications can be easily and inexpensively made.