Title:

Kind
Code:

A1

Abstract:

A receiver for iterative decoding of a received, encoded signal employs slot-based scaling of soft samples. Iterative decoding employs a constituent maximum a priori (MAP) decoder for each constituent encoding of information of the encoded signal. Root mean square (RMS) values for soft samples over a slot are selected for dynamic range scaling. Squared RMS values are combined and equal the squared RMS value for a frame multiplied by a control constant, and this relationship may be employed to derive scaling constants for each slot. Alternatively, the square root of the RMS value multiplied by a constant serves as an SNR estimator that may be employed to scale samples to reduce dynamic range and modify logarithmic correction values for max* term calculation during log-MAP decoding.

Inventors:

Ammer, Gerhard (Muenchen, DE)

Meyer, Jan-enno F. (Weilheim, DE)

Xu, Shuzhan (Coplay, PA, US)

Meyer, Jan-enno F. (Weilheim, DE)

Xu, Shuzhan (Coplay, PA, US)

Application Number:

11/863657

Publication Date:

01/24/2008

Filing Date:

09/28/2007

Export Citation:

Assignee:

AGERE SYSTEMS INC. (1110 American Parkway NE, Allentown, PA, US)

Primary Class:

International Classes:

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Related US Applications:

Primary Examiner:

PUENTE, EVA YI ZHENG

Attorney, Agent or Firm:

MENDELSOHN & ASSOCIATES, P.C. (1500 JOHN F. KENNEDY BLVD., SUITE 405, PHILADELPHIA, PA, 19102, US)

Claims:

What is claimed is:

1. A method of scaling samples of an encoded signal iteratively decoded to generate decoded data, the method comprising the steps of: (a) generating a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor, wherein, for step (b), the scaling factor is a noise variance estimator.

2. The invention of claim 1, wherein a slot is a unit time duration of one fixed-transmission power control.

3. A method of scaling samples of an encoded signal iteratively decoded to generate decoded data, the method comprising the steps of: (a) generating a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor, further comprising the steps of: b1) estimating a noise variance as a function of the RMS value; b2) generating a constant for each logarithmic correction term of log-MAP decoding using the estimated noise variance; and b3) setting the scaling factor based on the constant.

4. The invention of claim 3, wherein a slot is a unit time duration of one fixed-transmission power control.

5. A method of scaling samples of an encoded signal iteratively decoded to generate decoded data, the method comprising the steps of: (a) generating a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor, wherein the scaling factor accounts for at least one of automatic gain control (AGC) and DC offset signals present within the samples.

6. The invention of claim 5, wherein a slot is a unit time duration of one fixed-transmission power control.

7. The invention of claim 5, wherein the scaling factor (1/c) accounting for AGC is set as:$\frac{1}{c}=\frac{{F}_{i}E\left(\uf603{\xi}_{i}\uf604\right)}{\sqrt{{\mathrm{RMS}}_{i}}}=\frac{{F}_{i}\left(\frac{1}{3K}\sum _{i=0}^{3K-1}\uf603{\xi}_{i}\uf604\right)}{\sqrt{{\mathrm{RMS}}_{i}}},$ where F_{i }is a constant is a constant for the slot, RMS_{i }is the RMS value of the samples over the ith slot, E(●) denotes mathematical “expected value of”, and ξ_{i }is the sequence of input soft samples in the slot.

8. The invention of claim 5, wherein the scaling factor (1/c) accounting for DC offset is set as:$\frac{1}{c}=\frac{{G}_{i}}{\sqrt{{\mathrm{RMS}}_{i}-{\left[E\left({\xi}_{i}\right)\right]}^{2}}}=\frac{{G}_{i}}{\sqrt{{\mathrm{RMS}}_{i}-{\left(\frac{1}{3K}\sum _{i=0}^{3K-1}{\xi}_{i}\right)}^{2}}},$ where G_{i }is a control constant for the slot, RMS_{i }is the RMS value of the samples over the ith slot, E(●) denotes mathematical “expected value of”, and ξ_{i }is the sequence of input soft samples in the slot.

9. The invention of claim 5, further comprising the steps of: b1) estimating a noise variance as a function of the RMS value; b2) generating a constant for each logarithmic correction term of log-MAP decoding using the estimated noise variance; and b3) setting the scaling factor based on the constant.

10. The invention of claim 9, wherein the scaling factor (1/c) accounting for AGC is set as:$\frac{1}{c}=\frac{{F}_{i}E\left(\uf603{\xi}_{i}\uf604\right)}{\sqrt{{\mathrm{RMS}}_{i}}}=\frac{{F}_{i}\left(\frac{1}{3K}\sum _{i=0}^{3K-1}\uf603{\xi}_{i}\uf604\right)}{\sqrt{{\mathrm{RMS}}_{i}}},$ where F_{i }is a constant is a constant for the slot, RMS_{i }is the RMS value of the samples over the ith slot, E(●) denotes mathematical “expected value of”, and ξ_{i }is the sequence of input soft samples in the slot.

11. The invention of claim 9, wherein the scaling factor (1/c) accounting for DC offset is set as:$\frac{1}{c}=\frac{{G}_{i}}{\sqrt{{\mathrm{RMS}}_{i}-{\left[E\left({\xi}_{i}\right)\right]}^{2}}}=\frac{{G}_{i}}{\sqrt{{\mathrm{RMS}}_{i}-{\left(\frac{1}{3K}\sum _{i=0}^{3K-1}{\xi}_{i}\right)}^{2}}},$ where G_{i }is a control constant for the slot, RMS_{i }is the RMS value of the samples over the ith slot, E(●) denotes mathematical “expected value of”, and ξ_{i }is the sequence of input soft samples in the slot.

12. Apparatus for scaling samples of an encoded signal iteratively decoded to generate decoded data, the apparatus comprising: a first combiner configured to generate a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; a processor configured to calculate a scaling factor based on the RMS value of the slot; and a second combiner configured to scale the input samples of the slot based on the scaling factor, wherein the scaling factor is a noise variance estimator.

13. The invention of claim 12, wherein a slot is a unit time duration of one fixed-transmission power control.

14. The invention of claim 12, wherein the scaling factor is calculated using a scaling constant such that the RMS value of samples over a frame approximates a predefined value, wherein the frame comprises one or more slots.

15. The invention of claim 12, wherein the second combiner scales the samples within the slot to adjust a dynamic range of the samples.

16. The invention of claim 12, wherein, the apparatus is embodied in a receiver operating in accordance with a wideband CDMA telecommunication standard.

17. The invention of claim 12, wherein the apparatus is embodied in an integrated circuit.

18. Apparatus for scaling samples of an encoded signal iteratively decoded to generate decoded data, the apparatus comprising: a first combiner configured to generate a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; a processor configured to calculate a scaling factor based on the RMS value of the slot; and a second combiner configured to scale the input samples of the slot based on the scaling factor, wherein the processor calculates the scaling factor by: 1) estimating a noise variance as a function of the RMS value; 2) generating a constant for each logarithmic correction term of log-MAP decoding using the estimated noise variance; and 3) setting the scaling factor based on the constant.

19. The invention of claim 18, wherein the scaling factor is calculated using a scaling constant such that the RMS value of samples over a frame approximates a predefined value, wherein the frame comprises one or more slots.

20. The invention of claim 18, wherein the second combiner scales the samples within the slot to adjust a dynamic range of the samples.

21. The invention of claim 18, wherein, the apparatus is embodied in a receiver operating in accordance with a wideband CDMA telecommunication standard.

22. The invention of claim 18, wherein the apparatus is embodied in an integrated circuit.

23. The invention of claim 18, wherein a slot is a unit time duration of one fixed-transmission power control.

1. A method of scaling samples of an encoded signal iteratively decoded to generate decoded data, the method comprising the steps of: (a) generating a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor, wherein, for step (b), the scaling factor is a noise variance estimator.

2. The invention of claim 1, wherein a slot is a unit time duration of one fixed-transmission power control.

3. A method of scaling samples of an encoded signal iteratively decoded to generate decoded data, the method comprising the steps of: (a) generating a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor, further comprising the steps of: b1) estimating a noise variance as a function of the RMS value; b2) generating a constant for each logarithmic correction term of log-MAP decoding using the estimated noise variance; and b3) setting the scaling factor based on the constant.

4. The invention of claim 3, wherein a slot is a unit time duration of one fixed-transmission power control.

5. A method of scaling samples of an encoded signal iteratively decoded to generate decoded data, the method comprising the steps of: (a) generating a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor, wherein the scaling factor accounts for at least one of automatic gain control (AGC) and DC offset signals present within the samples.

6. The invention of claim 5, wherein a slot is a unit time duration of one fixed-transmission power control.

7. The invention of claim 5, wherein the scaling factor (1/c) accounting for AGC is set as:

8. The invention of claim 5, wherein the scaling factor (1/c) accounting for DC offset is set as:

9. The invention of claim 5, further comprising the steps of: b1) estimating a noise variance as a function of the RMS value; b2) generating a constant for each logarithmic correction term of log-MAP decoding using the estimated noise variance; and b3) setting the scaling factor based on the constant.

10. The invention of claim 9, wherein the scaling factor (1/c) accounting for AGC is set as:

11. The invention of claim 9, wherein the scaling factor (1/c) accounting for DC offset is set as:

12. Apparatus for scaling samples of an encoded signal iteratively decoded to generate decoded data, the apparatus comprising: a first combiner configured to generate a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; a processor configured to calculate a scaling factor based on the RMS value of the slot; and a second combiner configured to scale the input samples of the slot based on the scaling factor, wherein the scaling factor is a noise variance estimator.

13. The invention of claim 12, wherein a slot is a unit time duration of one fixed-transmission power control.

14. The invention of claim 12, wherein the scaling factor is calculated using a scaling constant such that the RMS value of samples over a frame approximates a predefined value, wherein the frame comprises one or more slots.

15. The invention of claim 12, wherein the second combiner scales the samples within the slot to adjust a dynamic range of the samples.

16. The invention of claim 12, wherein, the apparatus is embodied in a receiver operating in accordance with a wideband CDMA telecommunication standard.

17. The invention of claim 12, wherein the apparatus is embodied in an integrated circuit.

18. Apparatus for scaling samples of an encoded signal iteratively decoded to generate decoded data, the apparatus comprising: a first combiner configured to generate a root mean square (RMS) value for samples within a slot of a frame comprising a plurality of slots; a processor configured to calculate a scaling factor based on the RMS value of the slot; and a second combiner configured to scale the input samples of the slot based on the scaling factor, wherein the processor calculates the scaling factor by: 1) estimating a noise variance as a function of the RMS value; 2) generating a constant for each logarithmic correction term of log-MAP decoding using the estimated noise variance; and 3) setting the scaling factor based on the constant.

19. The invention of claim 18, wherein the scaling factor is calculated using a scaling constant such that the RMS value of samples over a frame approximates a predefined value, wherein the frame comprises one or more slots.

20. The invention of claim 18, wherein the second combiner scales the samples within the slot to adjust a dynamic range of the samples.

21. The invention of claim 18, wherein, the apparatus is embodied in a receiver operating in accordance with a wideband CDMA telecommunication standard.

22. The invention of claim 18, wherein the apparatus is embodied in an integrated circuit.

23. The invention of claim 18, wherein a slot is a unit time duration of one fixed-transmission power control.

Description:

This is a continuation of co-pending application Ser. No. 10/279,770, filed on Oct. 24, 2002 as attorney docket no. Ammer 2-2-2, the teachings of which are incorporated herein by reference.

1. Field of the Invention

The present invention relates to decoding of encoded and transmitted data in a communication system, and, more particularly, to scaling samples input to maximum a priori (MAP) decoding algorithms.

2. Description of the Related Art

MAP algorithms are employed for processing a channel output signal applied to a receiver. MAP algorithms may be used for both detection (to reconstruct estimates for transmitted symbols) and decoding (to reconstruct user data). A MAP algorithm provides a maximum a posteriori estimate of a state sequence of a finite-state, discrete-time Markov process observed in noise. A MAP algorithm forms a trellis corresponding to possible states (portion of received symbols or data in the sequence) for each received output channel sample per unit increment in time (e.g., clock cycle).

A trellis diagram may represent states, and transitions between states, of the Markov process spanning an interval of time. The number of bits that a state represents is equivalent to the memory of the Markov process. Thus, probabilities (sometimes of the form of log-likelihood ratio (LLR) values) are associated with each transition within the trellis, and probabilities are also associated with each decision for a sample in the sequence. These LLR values are also referred to as reliability information.

A processor implementing a MAP algorithm computes LLR values using α values (forward state probabilities for states in the trellis and also known as a forward recursion) and β values (reverse state probabilities in the trellis and also known as a backward recursion), as described subsequently. The a values are associated with states within the trellis, and these α values are stored in memory. The processor using a MAP algorithm computes values of β, and the α values are then retrieved from memory to compute the final output LLR values.

The variable S is defined as the possible state (from a set of M possible states {s_{p}}_{p=0}^{M−1}) of the Markov process at time i, y_{i }is defined as the noisy channel output sample at time i, and the sample sequence y^{K }is defined as the sequence of length K of noisy channel output samples {y_{i}}_{i=0}^{K−1}. Therefore, y_{i}^{K }is the noisy channel output sample y_{i }at time i in a given sequence y^{K }of length K. For a data block of length K, probability functions at time i may be defined for the Markov process as given in equations (1) through (3):

α_{s}^{i}*=p*(*S=s;y*_{i}^{K}) (1)

β_{s}^{i}*=p*(*y*_{i+1}^{K}*|S=s*) (2)

γ_{s′,s}^{i}*=p*(*S=s;y*_{i}^{K}*|S′=s′*) (3)

where S is the Markov process variable at time i, S′ is the Markov process variable at time i-i, s is the observed state of S of the Markov process at time i, and s′ is the observed state of S′ of the Markov process at time i−1.

The log-likelihood ratio (LLR) value L(u_{i}) for a user's symbol u_{i }at time i may then be calculated as given in equation (4):

Defining α_{l}^{i }and β_{l}^{i }from equations (1) and (2) as the forward and backward recursions (probabilities or state metrics) at time i in state s=l, respectively, and defining γ_{m,l}^{i }as the branch metric associated with the transition from state m at time i−1 to state l at time i, then the forward recursion for states is given in equation (5):

where l ε S is a set of states at time i−1 which have a valid transition to the state l at time i.

Similarly, the backward recursion for states is given in equation (6):

where m ε S is a set of states at time i which have a valid transition from the state l to the state m at time i−1.

Once the forward and backward recursions for states are calculated, equation (4) is employed to generate the log-likelihood value (also known as reliability value) L(u_{i}) for each user symbol u_{i}. Thus, equation (4) may be re-written as given in equation (7):

where a state pair (l, m)ε S^{+} is defined as a pair that has a transition from state l at time i−1 to state m at time i corresponding to the user symbol u_{i}=“1”, and a state pair (l, m) ε S^{−} is similarly defined as a pair that has a transition from state l at time i−1 to state m at time i corresponding to the user symbol u_{i}=“−1”.

A MAP algorithm may be defined by substituting A^{i}_{m}=log(α_{m}^{i}), B_{m}^{i}=log(β_{m}^{i), and Γ}_{l,m}^{i}=log(γ_{l,m}^{i}) into the equations (5), (6), and (7). Such substitution is sometimes referred to as the log-MAP algorithm. Also, with the relation that log(e^{−x}+e^{−y}) is equivalent to max(x,y)+log(e^{−|x−yl}+1), the forward and backward recursions of the log MAP algorithm may be described as in equations (8) and (9):

where max*(x, y) is defined as max(x, y)+log((e^{−|x−yl})+1). Note that equations (8) and (9) may include more than two terms in the max*(●, . . . , ●) operator, so a max*(x, y, . . . , z) operation may be performed as a series of pairs of max*(●,●) calculations. Max(x, y) is defined as the “max term” and log((e^{−|x−yl})+1) is defined as the “logarithmic correction term.”

One application of the MAP algorithm is a form of iterative decoding termed “turbo decoding,” and a decoder employing turbo decoding of data encoded by a turbo encoder is generally referred to as a turbo decoder. Turbo encoding is an encoding method in which two identical constituent encoders separated by an interleaver are used to encode user data. A commonly employed code rate for the turbo encoder is ⅓ and for each constituent encoder is ½.

The turbo encoder of a transmitter generates three sequences. The sequence {x_{i}}_{i=0}^{L−1 }represents the transmitted information bit sequence, the sequences {p_{i}}_{i=o}^{L−1 }and {q_{i}}_{i=0}^{L−1 }represent the parity bit sequences of the first and the second constituent encoders, respectively. These three sequences (bit streams) are combined and transmitted over a channel characterized by Rayleigh fading factors α_{i }and added Gaussian noise variance

Turbo decoding at a receiver employs “soft-input, soft-output” (SISO) constituent decoders separated by a de-interleaver and an interleaver to iteratively decode the turbo encoded user data. For example, the first constituent decoding employs the original input sample sequence, while an interleaver is employed to interleave the original input sample sequence for the second constituent decoding. The de-interleaver is employed to de-interleave the soft decisions of the first constituent decoding that are then used by the second constituent decoding, and the interleaver is employed to re-interleave the soft decisions after the second constituent decoding for the first constituent decoding.

At the receiver, the signal from the channel is sampled to yield the sequence (receive samples) as given in equation (10):

where K is frame size, E_{s }is the energy of a sample, and {n_{i},n_{i}′,n_{i}Δ} are the added noise components. Each constituent SISO decoder generates a series of log-likelihood ratio (LLR) values {L_{i}}_{i=0}^{K−1 }using the sequence of input samples {y_{i}}_{i=0}^{K−1}, input extrinsic (a priori) information {z_{i}}_{i=0}^{K−1 }(received from an interleaver or de-interleaver, depending on the constituent decoder), and newly generated extrinsic information {l_{i}}_{i=0}^{K−1 }to be applied to either the interleaver or de-interleaver (depending on the constituent decoder) for the next iteration. The ith LLR value L_{i }is generated according to equation (11):

From equation (11), one skilled in the art would recognize that it is desirable to scale the received samples that are employed to generate extrinsic information. Such scaling is desirably based on the signal-to-noise ratio (SNR) values, since with each iteration the LLR values are each increasing by an amount related to the SNR value. Consequently, the samples of a slot are divided by a scaling factor that is proportional to the SNR of the observed input samples.

For turbo decoding, an estimate of a scaling value is generated and applied to input samples to avoid severe performance degradation of the decoder. Scaling in the turbo decoder using log-MAP decoding is required for the logarithmic correction term (typically implemented via a look-up table). One method employed in the prior art to scale soft samples properly uses a fixed-value look-up table, and another method programs the values within the look-up table according to SNR estimation. Finally, a combination of these two methods scales the soft samples with a control constant to program the look-up table entries. Fixed-point precision issues arise when scaling and adjusting values in the look-up table.

For a given implementation, the dynamic range is also modified for efficient soft sample representation. In finite precision format, each scaling operation represents re-quantization, which has a corresponding truncation error and saturation error. Thus, an estimator desirably provides SNR values both as a scaling factor for the max* (log-MAP) decoding as well as a scaling factor used to adjust the dynamic range of the input soft samples toward a desired dynamic range. These two estimated factors are ideally the same. Power control and automatic gain control (AGC) of the receiver are also affected by scaling, and so the estimator should reflect differences in transmission power. For relatively good SNR estimation generated locally in real time, the estimator needs to be short, but a short estimator generally produces more estimation errors.

In addition to the interleaving of the turbo encoder, channel interleaving of the encoded data at the transmitter may be employed to randomly distribute burst errors of the channel through a de-interleaved sequence representing the encoded data. This process is distinguished herein as “channel interleaving” and “channel de-interleaving.” Since the soft sample sequence after channel de-interleaving does not reflect the time order of channel propagation, estimators and scaling methods tend to exhibit a random nature (i.e., processing after channel de-interleaving is virtually a “blind” estimation approach). Thus, scaling is often applied before channel de-interleaving to reflect the natural propagation order. In CDMA systems, a RAKE receiver demands higher bit precision (higher number of bits) for data path processing, while a turbo decoder requires lower bit precision. Reduction of bit precision is accomplished using digital re-quantization that is typically done before de-interleaving the input samples. Therefore, scaling is preferably applied before this re-quantization (or the scaling factors estimated prior to requantization) for accuracy. Typically, a turbo decoder tolerates more overestimation than underestimation. For some systems, accuracy of SNR estimates to within −2 dB and 6 dB is required to achieve acceptable performance degradation in static channel.

Down-link power control schemes in UMTS WCDMA systems include a base station that adjusts its transmitting power, with certain delay, according to the received TPC (transmitting power control) bit. Power control may be defined over groups of bits, and, for example, power control of the transmitted signal may be updated 1500 times per second. A slot is defined as a unit time duration of one fixed transmission power control, which for the example is 1/1500 second. In short, the transmitting power remains constant only for a slot and is constantly in change slot by slot.

The down-link power for kth slot is adjusted according to equation (12):

*P*(*k*)=*P*(*k−*1)+*P*_{TPC}(*k*)+*P*_{bal}(*k*), (12)

where P_{TPC}(k) is the power adjustment due to inner loop power control, and P_{bal}(k) is the correction according to the down-link power control procedure for balancing radio link power to a common reference power. The value for P_{TPC}(k) is given in equations (13) through (17) as follows:

A) if the value of Limited Power Raise Used parameter is ‘Not used’, then

*P*_{TPC}(*k*)=+Δ_{TPC}, if *TPC*_{est}(*k*)=1, (13)

*P*_{TPC}(*k*)=−Δ_{TPC}, if *TPC*_{est}(*k*)=0, (14)

B) else if the value of Limited Power Raise Used parameter is ‘Used’, then

*P*_{TPC}(*k*)=+Δ_{TPC}, if *TPC*_{est}(*k*)=1 and Δ_{sum}(*k*)+Δ_{TPC}<Power_Raise_Limit, (15)

*P*_{TPC}(*k*)=0, if *TPC*_{est}(*k*)=1 and Δ_{sum}(*k*)+Δ_{TPC}≧Power_Raise_Limit, (16)

*P*_{TPC}(*k*)=−Δ_{TPC}, if *TPC*_{est}(*k*)=0, (17)

where the value Δ_{sum}(k) is the temporary sum of the last inner loop power adjustments given in equation (18):

and DLPA_Window_Size is the length of the sample window used for an update. The power control step size Δ_{TPC }may comprise, for example, one of four values: 0.5, 1.0, 1.5 or 2.0 dB.

Scaling factors derived with inter-slot estimation methods average out a portion of the noise perturbation in the transmitted signal. Inter-slot estimation is also related to the corresponding transmitter power control method.

as the estimated online SNR for the ith slot, equation (19) yields an average SNR of the ith slot (SNR(i)) for the final scaling factor:

where λ_{1 }and λ_{2 }are positive numbers that add to one (that is λ_{1}+λ_{2}=1). When λ_{1}0 and λ_{2}=1, the online SNR for this slot is purely based on the previous estimation and the power control adjustment. On the other hand, when λ_{1}=1 and λ_{2}=0, no estimation of the previous slot is used. For this case, the scaling factor SNR(i) becomes slot-based and dependent upon the SNR of the slot modified in accordance with the power control.

In accordance with embodiments of the present invention, iterative decoding of a received, encoded signal employs slot-based scaling of soft samples. Iterative decoding employs a constituent maximum a priori (MAP) decoder for each constituent encoding of information of the encoded signal. Root mean square (RMS) values for soft samples over a slot are selected for dynamic range scaling. Squared RMS values are combined and equal the squared RMS value for a frame multiplied by a control constant, and this relationship may be employed to derive scaling constants used with RMS values for each slot. Alternatively, the square root of the RMS value multiplied by a constant serves as an SNR estimator that may be employed to scale samples to reduce dynamic range and modify logarithmic correction values for max* term calculation during log-MAP decoding.

In accordance with an exemplary embodiment of the present invention, a receiver scales samples of an encoded signal iteratively decoded to generate decoded data by: (a) generating a root mean square (RMS) value for samples within a slot; (b) calculating a scaling factor based on the RMS value of the slot; and (c) scaling the input samples of the slot based on the scaling factor.

Other aspects, features, and advantages of the present invention will become more fully apparent from the following detailed description, the appended claims, and the accompanying drawings in which:

FIG. 1 shows a transmitter passing an encoded and modulated signal through a channel to a receiver employing iterative decoding with slot-based RMS scaling in accordance with one or more embodiments of the present invention; and

FIG. 2. shows a method of slot-based RMS scaling in accordance with exemplary embodiments of the present invention.

In accordance with exemplary embodiments of the present invention, a receiver for iterative decoding of a received, encoded signal employs slot-based scaling of soft samples. Iterative decoding employs a constituent maximum a priori (MAP) decoder for each constituent encoding of information of the encoded signal. Root mean square (RMS) values for soft samples over a slot are selected for dynamic range scaling. Squared RMS values are combined and equal the squared RMS value for a frame multiplied by a control constant. The RMS value with control constant serves as an SNR estimator that may be employed to scale logarithmic correction values for max* term calculation during log-MAP decoding. Slot-based RMS scaling in accordance with an exemplary embodiment of the present invention requires relatively short calculation (or access if calculated and stored in a look-up table), may be relatively easily determined during CDMA receiver processing without introducing substantial latency, and may be flexibly implemented within the CDMA receiver.

FIG. 1 shows transmitter **101** passing an encoded and modulated signal through channel **102** to receiver **103**. Transmitter **101** includes turbo encoder **105**, channel interleaver **129**, and CDMA modulator **130**. Systematic turbo encoder **105** performs parallel concatenation of two identical constituent convolutional encoders separated by an interleaver. Each constituent convolutional encoder employs a recursive systematic code (RSC). For example, the overall code rate of the turbo encoder may be ⅓ when the code rate for each constituent convolutional encoder is ½. For a block of length K encoded by a block encoder, the sequence {x_{i}m_{i}}_{i=0}^{K−1 }is defined as a sequence of information bits, and the sequences {p_{i}}_{i=0}^{K−1 }and {p′_{i}}_{i=0}^{K−1 }are defined as the parity bit sequences of the first and the second constituent encoders, respectively.

Turbo encoder **105** in transmitter **101** operates to produce a frame of encoded data. A frame is encoded data within a predefined, fixed time duration of transmitted coded bits; consequently, the number of encoded bits in a frame varies depending upon the user data rate. At transmitter 101, power control may also be employed in the transmitted signal. Power control may be defined over groups of bits, and, for example, power control of the transmitted signal may be updated 1500 times per second. A slot is defined as a unit time duration of one fixed transmission power control, which for the example is 1/1500 second.

The coded bits of the frame are interleaved by channel interleaver **129**. Interleaving of the encoded data, when de-interleaved at the receiver, spreads burst errors inserted in channel **102** within the de-interleaved encoded data stream, which may aid in single bit-error detection and correction performed by receiver **103**. The interleaved encoded data stream is modulated by CDMA modulator **130** and transmitted, via antenna **131**, as a modulated signal through channel **102**. Channel **102** may be a wireless communication channel for CDMA modulation, but one skilled in the art may extend the present invention to systems for other channels, such as magnetic recording channels. In addition, one skilled in the art may extend the teachings herein to systems having signals modulated using other common modulation techniques, such as QAM, VSB, or PAM. While not shown explicitly in FIG. 1, transmitter **101** includes components and other systems well known in the art to modulate and transfer the signal to the channel.

Receiver **103** includes CDMA demodulator **108** having RAKE processor **109**, sampler/detector **110**, channel de-interleaver **133**, slot-based SNR estimator **115**, and turbo decoder **111**. CDMA demodulator **108** processes the signal sensed from channel **102** through antenna **132**. CDMA demodulator **108** reverses the process of CDMA modulation by a transmitter, with RAKE processor **109** combining demodulated multi-path signals to improve overall signal-to-noise ration (SNR) of the received, demodulated signal. Sampler/detector **110** detects timing and samples the signal received from CDMA demodulator **108** to generate output channel samples. While not shown explicitly in FIG. 1, receiver **103** includes components and other systems well known in the art to aid in reception and demodulation of the signal from channel **102**.

Channel de-interleaver **133** de-interleaves the output channel samples to reverse the interleaving of channel interleaver **129**. Slot-based SNR estimator **115** generates scaling factors for slot-based scaling of soft samples in accordance with one or more embodiments of the present invention. Slot-based SNR estimator **115** receives samples for a slot either from 1) sampler/detector **110** or 2) channel de-interleaver **133**, depending on the form of scaling factor desired. Slot-based SNR estimator **115** may comprise a combiner **140** for combining the received sample values and a processor for calculating the scaling factor based on various methods, as described below. Once scaling factors are generated, scaling of samples may occur either prior to channel de-interleaving (i.e., by a combiner (not shown) in the RAKE processor **109** or a combiner **141** in sampler/detector **110**) or after channel de-interleaving (i.e., by a combiner (not shown) in turbo decoder **111**). Generation of scaling factors by slot-based SNR estimator **115** is described below.

Turbo decoder **111** is employed by receiver **103** to reconstruct the user information or data from the received output channel samples (after channel de-interleaving). Turbo decoder **111** employs a turbo decoding scheme based on one or more log-MAP decoding algorithms. Turbo decoder **111** includes constituent (log-)MAP decoders **113**(**1**) and **113**(**2**), de-interleaver **112**, interleaver **123**, and interleaver **124**. Turbo decoder **111** employs iterative decoding, (i.e., repetitively decoding the sequence of output channel samples with two or more iterations) with each iteration comprising a series of constituent MAP decoding operations. Each constituent MAP decoding of an iteration corresponds to a constituent encoding of the transmitter **101**. Thus, during each iteration of decoding, all of the constituent encodings are reversed. MAP decoders **113**(**1**) and **113**(**2**) each applies a corresponding constituent MAP decoding operation using a log-MAP algorithm. Each constituent MAP decoding operation generates soft decisions for received user bits and a set of LLR values corresponding to the soft decisions. Information generated by one constituent MAP decoding may be used by the next constituent MAP decoding operation.

For an additive white Gaussian noise (AWGN) channel having noise (power) variance

the observed output channel samples have the form of {y_{i}}_{i=0}^{K−1}={x_{i}√{square root over (E_{s})}+n_{i}}_{i=0}^{K−1}. {t_{i}}_{i=0}^{K−1}={p_{i}√{square root over (E_{s})}+n′_{i}}_{i=0}^{K−1 }and {t _{i}}_{i=0}^{K−1}={p_{i}′√{square root over (E_{s})}+n_{i}′}_{i=0}^{K−1}. As is known in the art, decoding by each constituent MAP decoder generates the LLR value L_{i }for time i from equation (7), which may be considered to have three components as given before in equation (11):

where {L_{i}}_{i=0}^{K−1 }is the sequence of LLR values for the sequence {y_{i}}_{i=0}^{K−1}, and E_{s }is the energy of a sample (note that the α=1 in equation (11) if a fading (Raleigh) channel is considered). In equation (11), the right hand term as a function of sample y_{i }corresponds to the soft decision, z_{i }is the input a priori extrinsic information from the previous constituent MAP decoding operation (which may be zero for the first iteration), and {l_{i}}_{i=0}^{K−1 }is the sequence of newly generated extrinsic information for the next constituent MAP decoding operation.

Returning to FIG. 1, MAP decoder **113**(**1**) receives the sequence {y_{i}}_{i=0}^{K−1 }corresponding to the encoded user data with noise, as well as the sequence {t_{i}}_{i=0}^{K−1 }corresponding to the parity bits with noise for the first constituent encoding. In addition, MAP decoder **113**(**1**) receives extrinsic information from MAP decoder **113**(**2**). However, since the encoding of the user data is separated by interleaving, the output of MAP decoder **113**(**2**) is first de-interleaved by de-interleaver **112**. Similarly, MAP decoder **113**(**2**) receives the sequence {y_{i}}_{i=0}^{K−1 }corresponding to the encoded user data with noise, as well as the sequence {t_{i}′}_{i=0}^{K−1 }corresponding to the parity bits with noise for the second constituent encoding. Again, since the first and second constituent encodings are separated by an interleaver, the sequence {y_{i}}_{i=0}^{K−1 }is first interleaved by interleaver **124** before application to MAP decoder **113**(**2**). MAP decoder **113**(**2**) also receives interleaved extrinsic information generated by MAP decoder **113**(**1**) from interleaver **123**.

One-step, slot-based RMS scaling in accordance with an exemplary embodiment of the present invention is now described. An overall scaling control constant for all slots is defined in order to provide flexibility for modifying entries of a logarithmic correction look-up table (LUT). The following description assumes an additive white Gaussian noise (AWGN) channel (i.e., the Rayleigh channel with variance α_{i}=1), though one skilled in the art may extend the teachings herein to other types of channels (e.g., Rayleigh channels with α_{i}>1) with different noise characteristics. The sequence {ξ_{i}}_{i=0}^{3K−1}={y_{i},t_{i},s_{i}}_{i=0}^{K−1 }is defined as the input soft samples, where the energy of the ith input soft sample ξ_{i }is given in equation (20):

*E[|ξ*_{i}|^{2}*]=E*_{s}+σ^{2}, (20)

where E[●] denotes mathematical “expected value of.”

For low SNR, the sample energy E_{s }is nearly 0, and so E[|ξ_{i}|^{2}]≈σ^{2}. The root mean square (RMS) value over the ith slot (RMS_{i}) may be calculated as in equation (21):

where, as before, K is the number of samples per block, which is set to the length of a slot. Therefore, the RMS value over a slot may be employed as a noise variance estimator, which is relatively accurate for input signals having relatively low SNR.

A set of T slots in a frame includes the following sequences of soft samples: ((ξ_{0}, ξ_{1}, . . . , ξ_{3K−1}), (ξ_{3K},ξ_{3K+1}, . . . , ξ_{6K−1}), . . . , (ξ_{3(T−1)K}, ξ_{3(T−1)K+1}, . . . , ξ_{3TK−1})). For these T slots, SNR scaling factors are defined as the sequence {C_{i}}_{i=0}^{T−1}, where C_{i }is the estimated scaling factor for the ith slot. The RMS value over the whole frame after slot by slot scaling (RMS^{1}) is given in equation (22):

where RMS_{i }is the RMS value over the ith slot. The RMS_{i }for a slot may be measured or calculated at the receiver using the received sample sequence. For reference, the RMS value over a whole frame before slot-based scaling is given in equation (23):

Since scaling is desired to stabilize channel impairment effects and to adjust soft samples into a desired dynamic range for a fixed-point implementation, the RMS value over the frame after scaling is preferably a fixed constant C, (i.e., RMS^{1}=C). For a given implementation, the constant C may be determined through one or more of simulation, measurement of a system, and off-line calculation.

For a first exemplary embodiment of scaling, one selection of each slot-based scaling factor C_{i }is given in equation (24):

which provides a relation between the slot-based scaling factors C_{i }and the overall control constant C.

For a second exemplary embodiment of scaling in which the sample energy E_{s }is not negligible, noise variance estimation is employed. In noise variance estimation, the square root RMS value (i.e., √{square root over (RMS_{i})}) is employed as a scaling factor to generate an output data stream with constant RMS value. The slot-based SNR scaling factor for noise variance estimation is given in equation (25):

where D_{i }represents a constant. As indicated in equation (25), the noise variance estimator (scaling factor) is similar to the form of the first scaling factor derived of equation (24). The first and second exemplary embodiments of the present invention may be employed interchangeably and may be relatively easy to calculate.

A third exemplary embodiment of scaling may be expressly derived based on LUT entry calculation for the max* term of log-MAP decoding. The LUT entries for the logarithmic correction term in log-MAP decoding are generated via equation (26):

where c is

The constant A is given by equation (27):

where C*=0.65, q is the number of bits defined by the digital quantizing method, and equation (28) gives an approximation for mag(σ):

Thus, the LUT entry for the logarithmic correction term may be calculated, and, for scaling, every soft sample divided by c. From equations (26) and (27), the inverse of c is given in equation (29):

Different approximate slot-based scaling factors may be generated from equation (29) that are not directly RMS-based. Typical quantities of soft sample statistics as known in the art are given in equations (30) and (31):

*E*(|ξ_{i}|)=*mag*(σ)≈0.798σ, and (30)

*E*(|ξ_{i}|^{2})=*E*_{s}+σ^{2}≈σ^{2}. (31)

With these approximations in equations (30) and (31), equation (29) may be re-written as in equation (32):

From equation (32), the slot-based scaling factor of the form given in equation (33) may be employed:

where H_{i }is a constant for a given slot. The slot-based scaling factor of equation (33) may be simpler to implement in practice, and may be adapted to account for AGC and DC offset effects through the constant H_{i }for a given slot.

However, in accordance with preferred embodiments of the present invention, a slot-based RMS scaling factor for scaling LUT entries may be generated as follows. Given the relation of equation (34):

equation (29) may be written as in equation (35) to provide the slot-based RMS scaling factor:

where M_{i }is a constant for the ith slot. Equation (35) yields a scaling factor that is explicitly dependent on the SNR values and the operation range, and is again a one-step slot-based RMS value scaling.

Equation (35) may be modified to take into account AGC effects and variations in signal strength, which provide the slot-based RMS scaling factor of equation (36):

where F_{i }is a constant.

Equation (35) may be modified to take into account DC offset residue in the soft samples, which provides the slot-based RMS scaling factor of equation (37):

where G_{i }is a control constant that is operation range dependent and may be determined by simulation or calibration.

FIG. 2. shows a method of slot-based RMS scaling in accordance with exemplary embodiments of the present invention. At step **201**, the samples of the slots in a frame are gathered. At step **202**, the frame constant C is determined. At step **203**, the RMS_{i }value for the ith slot is calculated. From step **203**, the method may take either of two paths A and B. If the method implements path A from step **203**, then, at step **204**, the scaling factor C_{i }for the ith slot is calculated, such as by employing the relation of equation (24). At step **205**, the samples of the ith slot are scaled by C_{i}, and the method then advances to step **208**. If the method implements path B from step **203**, then, at step **206**, the LUT scaling factor c for the ith slot is calculated, such as by employing one of the relations of equations (35) through (37). At step **207**, the samples of the slot are scaled by the value 1/c. From step **207** the method advances to step **208**.

At step **208**, a test determines whether the ith slot is the last slot in the frame. If the test of step **208** determines that the ith slot is not the last slot of the frame, the method advances to step **209**. At step **209**, the counter i is incremented and the method returns to step **203** to process the next slot. If the test of step **208** determines that the ith slot is the last slot of the frame, the method advances to step **210** to get the next frame. From step **210**, the method advances to step **201** to begin processing of the next frame.

Slot-based scaling of soft samples may be accomplished within an integrated circuit (IC) implementation, such as an ASIC or DSP implementation. Scaling may be performed as either slot-based pre-channel de-interleaver processing, random based post-channel de-interleaver processing, or decoder-assisted post-channel de-interleaver processing. In slot-based pre-channel de-interleaver processing, scaling modifies channel impairments in their order of occurrence, and slot-based pre-channel de-interleaver processing may be combined with processing by a RAKE receiver (i.e., scale soft samples inside RAKE receiver). Random post-channel de-interleaver processing may be included within the de-interleaver. Decoder-assisted post-channel de-interleaver processing employs online SNR estimation and soft sample scaling within the turbo decoder. These three approaches correspond to the three major components of the CDMA receiver: RAKE receiver, channel de-interleaver, and turbo decoder. Soft samples from a RAKE receiver in CDMA receivers are typically processed on a slot by slot fashion, thus slot-based scaling may be preferred in these systems.

The present invention can be embodied in the form of methods and apparatuses for practicing those methods. The present invention can also be embodied in the form of program code embodied in tangible media, such as floppy diskettes, CD-ROMs, hard drives, or any other machine-readable storage medium, wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the invention. The present invention can also be embodied in the form of program code, for example, whether stored in a storage medium, loaded into and/or executed by a machine, or transmitted over some transmission medium or carrier, such as over electrical wiring or cabling, through fiber optics, or via electromagnetic radiation, wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the invention. When implemented on a general-purpose processor, the program code segments combine with the processor to provide a unique device that operates analogously to specific logic circuits.

It will be further understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain the nature of this invention may be made by those skilled in the art without departing from the scope of the invention as expressed in the following claims.