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freepatentsonline.com 141 131 http://www.freepatentsonline.com/ http://www.freepatentsonline.com/images/logo.gif Free Patents Online: Static information storage and retrieval http://www.freepatentsonline.com./rssfeed/rsspat365.xml USPTO Class 365 Static information storage and retrieval en-us Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Data storage means]]> http://www.freepatentsonline.com./7634784.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Test apparatus and selection apparatus]]> http://www.freepatentsonline.com./7634695.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Storing authentication information in a content unit on an object addressable storage system]]> http://www.freepatentsonline.com./7634630.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Method and apparatus for self-timed data ordering for multi-data rate memories and system incorporating same]]> http://www.freepatentsonline.com./7634623.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Method of recording and reproducing information]]> http://www.freepatentsonline.com./7634612.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Multiple string searching using content addressable memory]]> http://www.freepatentsonline.com./7634500.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory device]]> http://www.freepatentsonline.com./7633833.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Circuit for outputting data of semiconductor memory apparatus]]> http://www.freepatentsonline.com./7633832.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory and operating method of same]]> http://www.freepatentsonline.com./7633831.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Reduced leakage driver circuit and memory device employing same]]> http://www.freepatentsonline.com./7633830.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders]]> http://www.freepatentsonline.com./7633829.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Hierarchical bit line bias bus for block selectable memory array]]> http://www.freepatentsonline.com./7633828.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory device, operational processing device and storage system]]> http://www.freepatentsonline.com./7633827.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used]]> http://www.freepatentsonline.com./7633826.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory device with reduced current consumption]]> http://www.freepatentsonline.com./7633825.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Charge pump to supply voltage bands]]> http://www.freepatentsonline.com./7633824.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Circuit and method for controlling sense amplifier of a semiconductor memory apparatus]]> http://www.freepatentsonline.com./7633822.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Current mode memory apparatus, systems, and methods]]> http://www.freepatentsonline.com./7633821.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Current limit circuit and semiconductor memory device]]> http://www.freepatentsonline.com./7633820.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Determining history state of data in data retaining device based on state of partially depleted silicon-on-insulator]]> http://www.freepatentsonline.com./7633819.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Test method for semiconductor memory device and semiconductor memory device therefor]]> http://www.freepatentsonline.com./7633818.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory device, controller, and read/write control method thereof]]> http://www.freepatentsonline.com./7633817.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory device, rewrite processing method therefor, and program thereof]]> http://www.freepatentsonline.com./7633816.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Flexible word line boosting across VCC supply]]> http://www.freepatentsonline.com./7633815.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Memory device and method of operating such]]> http://www.freepatentsonline.com./7633814.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Method of performing an erase operation in a non-volatile memory device]]> http://www.freepatentsonline.com./7633813.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Starting program voltage shift with cycling of non-volatile memory]]> http://www.freepatentsonline.com./7633812.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Non-volatile memory embedded in a conventional logic process and methods for operating same]]> http://www.freepatentsonline.com./7633811.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Non-volatile memory embedded in a conventional logic process and methods for operating same]]> http://www.freepatentsonline.com./7633810.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor device]]> http://www.freepatentsonline.com./7633809.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Flash memories with adaptive reference voltages]]> http://www.freepatentsonline.com./7633808.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Behavior based programming of non-volatile memory]]> http://www.freepatentsonline.com./7633807.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Memory device with a nonvolatile memory array]]> http://www.freepatentsonline.com./7633806.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Circuit and method for generating a reference voltage in memory devices having a non-volatile cell matrix]]> http://www.freepatentsonline.com./7633805.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Adjusting programming or erase voltage pulses in response to the number of programming or erase failures]]> http://www.freepatentsonline.com./7633804.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Methods of operating memory devices including negative incremental step pulse programming and related devices]]> http://www.freepatentsonline.com./7633803.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages]]> http://www.freepatentsonline.com./7633802.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Memory in logic cell]]> http://www.freepatentsonline.com./7633801.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Redundancy scheme in memory]]> http://www.freepatentsonline.com./7633800.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Method combining lower-endurance/performance and higher-endurance/performance information storage to support data processing]]> http://www.freepatentsonline.com./7633799.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[M+N bit programming and M+L bit read for M bit memory cells]]> http://www.freepatentsonline.com./7633798.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Flash memory and method for determining logic states thereof]]> http://www.freepatentsonline.com./7633797.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Storage element and memory]]> http://www.freepatentsonline.com./7633796.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Magnetoresistive random access memory and its write control method]]> http://www.freepatentsonline.com./7633795.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Static random access memory cell]]> http://www.freepatentsonline.com./7633794.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Static random access memory cell]]> http://www.freepatentsonline.com./7633793.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Static random access memory cell]]> http://www.freepatentsonline.com./7633792.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Read-write circuit for short bit line DRAM]]> http://www.freepatentsonline.com./7633791.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Multi-resistive state memory device with conductive oxide electrodes]]> http://www.freepatentsonline.com./7633790.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Planar third dimensional memory with multi-port access]]> http://www.freepatentsonline.com./7633789.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Variable resistive memory wordline switch]]> http://www.freepatentsonline.com./7633788.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[ROM memory component featuring reduced leakage current, and method for writing the same]]> http://www.freepatentsonline.com./7633787.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Couplings within memory devices and methods]]> http://www.freepatentsonline.com./7633786.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Semiconductor memory device and method of generating chip enable signal thereof]]> http://www.freepatentsonline.com./7633785.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Junction field effect dynamic random access memory cell and content addressable memory cell]]> http://www.freepatentsonline.com./7633784.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Tunnel junction device having oxide ferromagnetic electroconductive electrodes and three-layer structure tunneling film]]> http://www.freepatentsonline.com./7633723.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[CPP reader with phase detection of magnetic resonance for read-back]]> http://www.freepatentsonline.com./7633699.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Magnetic sensor and manufacturing method therefor]]> http://www.freepatentsonline.com./7633132.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Non-volatile memory integrated circuit]]> http://www.freepatentsonline.com./7633114.html Tue, 15 Dec 2009 08:00:00 EST <![CDATA[Field-effect-transistor multiplexing/demultiplexing architectures]]> http://www.freepatentsonline.com./7633098.html Tue, 15 Dec 2009 08:00:00 EST