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<title>freepatentsonline.com</title>
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<title>freepatentsonline.com: Coded data generation or conversion</title>
<link>http://www.freepatentsonline.com/result.html?query_txt=ccl/341%20and%20isd/04/24/2008&amp;usapp=on</link>
<description>USPTO Class 341 Coded data generation or conversion</description>
<language>en-us</language>
<lastBuildDate>Wed Apr 30 17:03:06 EDT 2008</lastBuildDate>

<item>
<title><![CDATA[DATA MODULATING METHOD AND APPARATUS, DATA DEMODULATING METHOD AND APPARATUS, AND CODE ARRANGING METHOD]]></title>
<link>http://www.freepatentsonline.com/20080094262.html</link>
<description><![CDATA[In a data demodulating method and apparatus, and a code arranging method, a multiplexer multiplexes an input data stream divided by a predetermined length into a plurality of types of pseudo random data streams using multiplexed information of predetermined bits by applying a predetermined multiplexing method to each of the pseudo random data streams. An encoder RLL-modulates the plurality of types of pseudo random data streams to create a modulated code stream including a minimum of DC components. The multiplexer generates the random data streams by inconsecutively scrambling the input data stream using the multiplexed information. The encoder weak DC-free RLL-modulates each of the multiplexed data streams without using a DC control sub code conversion table to which additional bits are added and provides a code stream including a minimum of DC components among multiplexed, RLL-modulated code streams.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Digital-to-Analog Converting Circuit for Power Soft-Switching]]></title>
<link>http://www.freepatentsonline.com/20080094264.html</link>
<description><![CDATA[A digital-to-analog converting circuit for power soft-switching, comprising: a metal-oxide-semiconductor field-effect transistor (MOSFET); a digital-to-analog control circuit, for controlling the MOSFET to operate in either the cut-off region, the saturation region or the linear region; a digital control unit, using an output signal so as to control an input current into the MOSFET; and a DC-to-DC inverter, controlled by the MOSFET so as to invert external DC power into a certain level for electronic products.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[ELECTRONIC CIRCUIT FOR THE ANALOG-TO-DIGITAL CONVERSION OF AN ANALOG INPUT SIGNAL]]></title>
<link>http://www.freepatentsonline.com/20080094270.html</link>
<description><![CDATA[Electronic circuit for the analog-to-digital conversion of the alternative current (AC) component of an analog input signal. The electronic circuit has a coupling device with an input and an outputcoupling device delivers at its output an analog AC signal when the analog input signal is applied to the input. An analog-to-digital converter converts the analog AC signal into a digital output signal. A feedback loop has a digital-to-analog converter for converting the digital output into an analog feedback signal, the feedback loop being coupled to the coupling device, and the feedback loop has a first feedback path comprising a switched capacitor.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Ad Converter Arrangement]]></title>
<link>http://www.freepatentsonline.com/20080094268.html</link>
<description><![CDATA[In an AD converter a primary ΣA-modulator digitizes the analog input signal. The quantization noise generated thereby is isolated in the analog domain and digitized in a secondary ΣA-modulator. The quantization noise so digitized by the secondary ΣA-modulator is subtracted from the quantization noise in the output of the primary ΣA-modulator. Because the quantization noise generated by the primary ΣA-modulator is subject to filtering (shaping) the quantization noise digitized in the secondary ΣA-modulator should also be filtered. This is performed by similar filtering in the feedback path of the secondary ΣA-modulator.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[ANALOG-TO-DIGITAL CONVERTER AND SEMICONDUCTOR DEVICE]]></title>
<link>http://www.freepatentsonline.com/20080094271.html</link>
<description><![CDATA[An analog to digital converter comprising a reference signal generator, a comparator, and a counter wherein the reference signal generator is operable to generate a reference for converting an analog signal into a digital signal. The reference signal generator is also operable to generate a plurality of the reference signals based on the change in a voltage. The comparator is operable to compare the analog signal with the reference signal generated by the reference signal generator. The counter is operable to count, in parallel with a comparison performed by the comparator, a predetermined count clock and to hold a count value at the time of completion of the comparison.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Optical quantizing unit and optical A/D converter]]></title>
<link>http://www.freepatentsonline.com/20080094263.html</link>
<description><![CDATA[An optical quantizing unit includes an optical divider dividing 1 st  optical pulses to be quantized and sending the divided 1 st  optical pulses into a plurality of paths; a plurality of optical filters passing with different transmittances the divided 1 st  optical pulses; and an optical threshold filter sequentially receiving the 1 st  optical pulses, and sending 2 nd  optical pulses when light intensities of the 1 st  optical pulses are above a preset threshold value.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[REDUCING NOISE ASSOCIATED WITH LOCAL REFERENCE-POTENTIAL FLUCTUATIONS IN MIXED-SIGNAL INTEGRATED CIRCUITS]]></title>
<link>http://www.freepatentsonline.com/20080094266.html</link>
<description><![CDATA[An integrated circuit (IC) adapted to (i) measure a voltage differential between a ground potential external to the IC and a ground potential internal to the IC and (ii) based on the measurement result(s), adjust a signal referenced to the internal ground potential to reduce signal error associated with the voltage differential. In one embodiment, the IC is adapted to monitor the voltage differential in real time and use the presently measured voltage differential to perform signal adjustment. In another embodiment, the IC has a plurality of registers, each register adapted to store a voltage-differential value corresponding to a particular configuration of the IC, which values are written into the registers during an initialization procedure. During normal operation, the IC controllably selects from the stored values one corresponding to the current IC configuration.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Method Of Code Generation, and Method And Apparatus For Code Modulation]]></title>
<link>http://www.freepatentsonline.com/20080094261.html</link>
<description><![CDATA[A method of generating codewords that conform to a run length limited (RLL) constraint represented by (d, k, a, b), where d is a minimum run length of a codeword, k is a maximum run length of the codeword, a is a length of source data, and b is a length of the codeword. The method includes generating codewords conforming to the RLL(d, k) constraint, and removing codewords in which a relatively long T and a relatively short T are placed adjacent to each other from the generated codewords]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[ELECTRONIC SYSTEM WITH USER-OPERABLE KEYS AND CAPABILITY OF PROMPTING KEYS BEING TOUCHED]]></title>
<link>http://www.freepatentsonline.com/20080094258.html</link>
<description><![CDATA[The invention discloses an electronic system with a plurality of user-operable keys and capability of prompting the keys being touched. An electronic system, according to a preferred embodiment of the invention, comprises a user input device, a prompting device, and a processor. The user input device includes the plurality of user-operable keys. The processor is electrically coupled to the user-operable keys and the prompting device respectively. The processor selectively generates a corresponding prompting signal or a corresponding key signal based on the key-in action of one of the keys. When the corresponding prompting signal is transmitted to the prompting device, the prompting device generates a corresponding prompt according to a corresponding prompt. When the corresponding key signal is generating, the processor then executes an input instruction of the key.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Arrangement For The Synchronous Output Of Analog Signals Generated In Two Or More Digital-To-Analog Converters]]></title>
<link>http://www.freepatentsonline.com/20080094265.html</link>
<description><![CDATA[To achieve a synchronous output of analog signals generated in two or more digital-to-analog (DAC) converters, an adjustable, digital delay device, of which the delay time is adjustable dependent upon the cross-correlation determined between the analog output signals of the digital-to-analog converters, is provided upstream of at least one of the fifo memories provided for the signal transfer in order to delay the digital signal.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Interleaved Track and Hold Circuit]]></title>
<link>http://www.freepatentsonline.com/20080094269.html</link>
<description><![CDATA[The invention relates to an interleaved track and hold circuit for tracking and holding a value of a continuous input signal and to provide discrete values thereof, wherein the circuit comprises a first and a second stage. To avoid tones caused by differences in the non-ideal elements when switching through several parallel second stages the circuit according to the invention comprises a single first stage and at least two second stages.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Voltage Conversion Device Having Non-linear Gain]]></title>
<link>http://www.freepatentsonline.com/20080094267.html</link>
<description><![CDATA[A voltage conversion device has a non-linear gain, for converting analog voltage provided by an analog voltage source. The voltage conversion device comprises a gain decision module, a voltage selection module, and a voltage output module. The gain decision module comprises an analog to digital (A/D) converter and a gain selector. The A/D converter is used for converting analog voltage provided by the analog voltage source into digital signals. The gain selector is used for determining a gain. The voltage selection module is used for outputting a direct-current (DC) voltage. The voltage output module has a first input end coupled to the gain selector, an output end coupled to the gain selector, and a second input end coupled to the voltage selection module, for outputting an amplified result of the DC voltage outputted from the voltage selection module.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Input Device And Personal Mobile Terminal Having The Same]]></title>
<link>http://www.freepatentsonline.com/20080094257.html</link>
<description><![CDATA[To provide an input device which increases the operability by reducing a load on a hand and a finger used for operation.   The input device provided for an apparatus  1  which is held with a hand of a person, the input device comprising a plurality of input keys  5  which are operated with a finger holding the apparatus  1 , wherein in a case where the apparatus  1  having the input device is held with the hand, each input key  5  situated apart from a base of the finger has a finger contact area smaller than that of each input key  5  situated close to the base of the finger.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Context-Based Encoding and Decoding of Signals]]></title>
<link>http://www.freepatentsonline.com/20080094259.html</link>
<description><![CDATA[A system for the context-based for the context-based encoding of an input signal includes a domain transform module and a context-based coding module. The domain transform module is operable to convert the input signal into a sequence of transform coefficients c[i]. The context-based coding module includes a bit-plane scanning module, and context modeling module, and a statistical encoding module. The bit-plane scanning module is operable to produce a bit-plane symbol bps[i,bp] for each transform coefficient c[i] and each bit-plane [bp]. The context modeling module is operable to assign one or more context values to each of the received bit plane symbols bps[i,bp]. The statistical coding module is operable to code each of the bit plane symbols bps[i,bp] as a function of one or more of the corresponding context values to produce a context-based encoded symbol stream.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[LOGIC CIRCUIT]]></title>
<link>http://www.freepatentsonline.com/20080094260.html</link>
<description><![CDATA[A logic circuit that executes a prescribed arithmetic processing includes a decoder that converts one or more binary input data into a first plurality of bit data of a constant hamming weight regardless of a hamming weight of the input data, an interconnect network that is connected to the decoder, changes a bit pattern of the first plurality of bit data and generates a second plurality of bit data, according to receiving the first plurality of bit data converted according to the decoder, and substituting a bit position of the received first plurality of bit data for the purpose of the prescribed arithmetic operation, and an encoder connected to the interconnect network and converts the second plurality of bit data generated in the interconnect network into one or more binary output data.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Multi-channel sample and hold circuit and multi-channel A/D converter]]></title>
<link>http://www.freepatentsonline.com/20080094272.html</link>
<description><![CDATA[A multi-channel sample and hold circuit includes an operational amplifier, plural electric charge setting channels. Each of the electric charge setting channels includes an input terminal, an electric charge setting capacitor, an electric charge setting switch connected between the input terminal and the electric charge setting capacitor, a channel separating switch connected between the electric charge setting capacitor and the input terminal of the operational amplifier and a holding switch and a control circuit for selecting one of the electric charge setting channels to hold a signal that is inputted to the input terminal thereof.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[Passive remote control]]></title>
<link>http://www.freepatentsonline.com/20080094181.html</link>
<description><![CDATA[A device is disclosed for remotely transmitting a command to an apparatus. The device includes at least one RFID tag having stored therein a code corresponding to the command and is adapted to transmit the code in response to an interrogation signal. Typically the device may include a plurality of RFID tags, each tag having stored therein a code corresponding to a different command and being adapted to transmit the code in response to receiving the interrogation signal. Typically the at least one RFID tag is passive and relies on the interrogation signal for its operation.]]></description>
<pubDate>April 24, 2008</pubDate>
</item>

<item>
<title><![CDATA[ALTBOC RECEIVER]]></title>
<link>http://www.freepatentsonline.com/20080094280.html</link>
<description><![CDATA[An AltBoc receiver accumulates power measurements over code chip ranges that are associated with time slots that span the code chips. The receiver combines a received signal with code and carrier phase offsets that correspond to the time slots to produce the power measurements, with the code phase offsets determined from compressed signals representing one or a combination of the codes in the AltBoc signal. The receiver recovers navigation data from the data channels of the received signal and combines the recovered data with the corresponding locally generated PRN codes to produce a locally generated 4 code signal that is then used track the full 8PSK AltBoc received signal. The receiver rotates and shifts the phase of the received signal in order to line up the subcarrier splitting code zero crossings. The pulse shape of this rotated and shifted signal is measured. The resulting sharp edges of the recovered subcarrier are used to control the code phase of the receiver.]]></description>
<pubDate>April 24, 2008</pubDate>
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