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7647452 Re-fetching cache memory enabling low-power modes  
A re-fetching cache memory improves efficiency of a processor, for example by reducing power consumption and/or increasing performance. When the cache memory is disabled or temporarily used for...
US20090132764 POWER CONSERVATION VIA DRAM ACCESS  
Power conservation via DRAM access reduction is provided by a buffer/mini-cache selectively operable in a normal mode and a buffer mode. In the buffer mode, entered when CPUs begin operating in...
7533242 Prefetch hardware efficiency via prefetch hint instructions  
A software agent assembles prefetch hint instructions or prefixes defined in an instruction set architecture, the instructions/prefixes conveying prefetch hint information to a processor enabled to...
7516274 Power conservation via DRAM access reduction  
Power conservation via DRAM access reduction is provided by a buffer/mini-cache selectively operable in a normal mode and a buffer mode. In the buffer mode, entered when CPUs begin operating in...
7412570 Small and power-efficient cache that can provide data for background DNA devices while the processor is in a low-power state  
A small and power-efficient buffer/mini-cache sources and sinks selected DMA accesses directed to a memory space included in a coherency domain of a microprocessor when cached data in the...
7389403 Adaptive computing ensemble microprocessor architecture  
An Adaptive Computing Ensemble (ACE) includes a plurality of flexible computation units as well as an execution controller to allocate the units to Computing Ensembles (CEs) and to assign threads...
US20070214323 POWER CONSERVATION VIA DRAM ACCESS REDUCTION  
Power conservation via DRAM access reduction is provided by a buffer/mini-cache selectively operable in a normal mode and a buffer mode. In the buffer mode, entered when CPUs begin operating in...
US20070186057 SMALL AND POWER-EFFICIENT CACHE THAT CAN PROVIDE DATA FOR BACKGROUND DMA DEVICES WHILE THE PROCESSOR IS IN A LOW-POWER STATE  
Small and power-efficient buffer/mini-cache sources and sinks selected DMA accesses directed to a memory space included in a coherency domain of a microprocessor when cached data in the...
US20070130382 Small and power-efficient cache that can provide data for background DMA devices while the processor is in a low-power state  
A small and power-efficient buffer/mini-cache sources and sinks selected DMA accesses directed to a memory space included in a coherency domain of a microprocessor when cached data in the...
US20070113015 Power conservation via DRAM access reduction  
Power conservation via DRAM access reduction is provided by a buffer/mini-cache selectively operable in a normal mode and a buffer mode. In the buffer mode, entered when CPUs begin operating in...

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