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7434181 |
Debugger of an electronic circuit manufactured based on a program in hardware description language
A device for debugging an electronic circuit manufactured based on an initial program in hardware description language comprising an instrumentation unit capable of determining a first additional...
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7424480 |
System and method for storing and accessing data in an interlocking trees datastore
A tree-based datastore comprising a forest of interconnected trees is generated and/or accessed. The tree-based datastore comprises a first tree that depends from a first root node and may include...
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7418445 |
Method for reducing the scope of the K node construction lock
A method for recording information in an interlocking trees datastore having a plurality of K paths includes receiving an input particle and building a new K node in accordance with the received...
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7415692 |
Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions
A programming method efficiently programs programmable logic devices of the type having specialized multiplier blocks that include multipliers and other arithmetic function elements. Such blocks...
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7409533 |
Asynchronous communication among hardware object nodes in IC with receive and send ports protocol registers using temporary register bypass select for validity information
Embodiments of the invention are directed to an integrated circuit including a communication network that interconnects individual object nodes. The nodes include a receiving port and a sending...
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7409380 |
Facilitated reuse of K locations in a knowledge store
In learning for an interlocking trees datastore or KStore, the process is made more efficient by noting the (n-level) address within the KStore during the learning of each particle. In a...
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7406716 |
Software IP providing system and method, software IP obtaining method, and IP core designing and manufacturing method
A system and method enables controlled distribution of processor IPinformation to users for evaluation, customization and/or production. One aspect of the system and method is a web site that helps...
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7406584 |
IC comprising network of microprocessors communicating data messages along asynchronous channel segments using ports including validity and accept signal registers and with split / join capability
Embodiments of the invention are directed to a communication network on an integrated circuit for a number of interconnected microprocessors. The network is made from a number of sending nodes and...
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7392171 |
Test bench generator for integrated circuits, particularly memories
A computer based test bench generator ( 1 ) for verifying integrated circuits specified by models in a Hardware Description Language includes a repository ( 10 ) storing a general set of...
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7389301 |
Data aggregation user interface and analytic adapted for a KStore
Aggregation of data in an interlocking trees datastore, especially when the interlocking datastore is a KStore is described. It details consolidating data into a summary or aggregation so that some...
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7379855 |
Method and apparatus for timing modeling
Method and apparatus for timing modeling is described. More particularly, wire information, including wire lengths, is obtained from a routing output. Signals associated with such wire information...
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7376812 |
Vector co-processor for configurable and extensible processor architecture
A processor can achieve high code density while allowing higher performance than existing architectures, particularly for Digital Signal Processing (DSP) applications. In accordance with one...
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7363610 |
Building integrated circuits using a common database
Systems and methods for designing and generating integrated circuits using a high-level language are described. The high-level language is used to generate performance models, functional models,...
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7363097 |
Automatic design apparatus, automatic design method, and automatic design program of digital circuit
An automatic digital-circuit design apparatus receives a control target model written in a design description language, generates a control target model represented by a finite state machine model,...
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7353489 |
Determining hardware parameters specified when configurable IP is synthesized
An attribute of a hardware feature to be customized in a soft core is parameterized so that a value received from a user can be used to generate a description of a circuit containing the customized...
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7352862 |
Encryption method, communication system, transmission device, and data input device
An encryption method includes the steps of (a) generating random data including a first part and a second part, the first part specifying an operation to be performed on plain text data and the...
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7348980 |
Method and apparatus for interface for graphic display of data from a Kstore
A method for providing a display of data from an interlocking trees datastore in a graphical display system having a graphic display device is disclosed, the method including the steps of...
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7346881 |
Method and apparatus for adding advanced instructions in an extensible processor architecture
A system for adding advanced instructions to a microprocessor includes a language for formally capturing the new instructions and a method for generating hardware implementations and software tools...
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7343594 |
Software-to-hardware compiler with symbol set inference analysis
A software-to-hardware compiler is provided that generates hardware constructs in programmable logic resources. The programmable logic resources may be optimized in terms of being configured to...
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7340697 |
Integrated computer-aided circuit design kit facilitating verification of designs across different process technologies
Methods and apparatus are described that allow an integrated circuit designer to design integrated circuits for more than one process technology using a single master design environment. The master...
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7340471 |
Saving and restoring an interlocking trees datastore
A tree-based datastore comprising a forest of interconnected trees that can be generated and/or accessed may require specialized saving and restoring processes to ensure that all the links are...
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7337301 |
Designing configurable processor with hardware extension for instruction extension to replace searched slow block of instructions
A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension...
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7334201 |
Method and apparatus to measure hardware cost of adding complex instruction extensions to a processor
An apparatus, method, and computer-readable media that provide fast and accurate prediction of the hardware cost of logic to extend a processor. Aspects of the invention enable designers to explore...
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7310787 |
Array transformation in a behavioral synthesis tool
A behavioral synthesis tool for generating an integrated circuit design is described. The behavioral synthesis tool allows a designer to interactively allocate variables or arrays to memory...
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7302670 |
Interactive interface resource allocation in a behavioral synthesis tool
A behavioral synthesis tool that allows a designer to design an integrated circuit using a generic programming language, such as ANSI C or C++, without the need to include timing information into...
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7290089 |
Executing cache instructions in an increased latency mode
For instruction clusters for which no significant performance penalty is incurred, such as execution of hardware loops, a processor automatically and dynamically switches to a pipelined two-cycle...
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7278137 |
Methods and apparatus for compiling instructions for a data processor
Methods and apparatus optimized for compiling instructions in a data processor are disclosed. In one aspect, a method of address calculation is disclosed, comprising operating a compiler to...
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7275246 |
Executing programs for a first computer architecture on a computer of a second architecture
Executing programs coded in an instruction set of a first computer on a computer of a second, different architecture. An operating system maintains an association between each one of a set of...
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7257780 |
Software-to-hardware compiler
A hardware-to-software compiler is provided that runs an optimization on a circuit implemented in programmable logic. The optimization allows portions of the program implemented by the circuit to...
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7254806 |
Detecting reordered side-effects
A computer binary translator translates at least a segment of a binary representation of a program from a first instruction set architecture to a second instruction set architecture. A sequence of...
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7228537 |
System and method for configuring an application
A system and method for configuring an application is provided. Specifically, calls are made from a configuration tool to entry points in a configuration interface, which is implemented as part of...
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7228531 |
Methods and apparatus for optimizing a processor core on a programmable chip
Methods and apparatus are provided for efficiently implementing a customizable processor core on a programmable chip. Source code provided in a high level language is compiled into intermediate...
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7228404 |
Managing instruction side-effects
A computer. When an instruction calling for an architecturally-visible side-effect in an architecturally-visible storage location is recognized, a value is stored representative of an...
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7219342 |
Software-to-hardware compiler
A software-to-hardware compiler is provided that generates hardware constructs in programmable logic based on pure software constructs. More particularly, a high-level program language may be used...
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7206870 |
Data interface register structure with registers for data, validity, group membership indicator, and ready to accept next member signal
Embodiments of the invention include a system for an integrated circuit development. Elements of the development system include hardware and software objects. Boundaries of the objects may include...
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7206730 |
HDL preprocessor
The present invention describes a VHDL preprocessor. Configurable and flexible VHDL sources comprise statements that are replaceable by specific values dependent on design requirements.
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7200826 |
RRAM memory timing learning tool
A method of generating a timing model for a customer memory configuration, by generating a plurality of template memory netlists for a given RRAM design. Timing models for the template memory...
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7197724 |
Modeling a logic design
Modeling a logic design includes displaying a menu comprised of different types of functional block diagrams, receiving an input selecting one of the different types of functional block diagrams,...
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7191112 |
Multiple test bench optimizer
Test benches, simulations, and scripts are invoked in parallel for testing multiple points in a circuit being synthesized in an Analog Mixed Signal environment. A simulation system for...
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7188339 |
ACPI preprocessor
A computer-implemented method for compiling ASL (ACPI Source Language) code into AML (ACPI machine language) code. The method includes accessing an ASL program. A preprocessor is executed to...
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7188331 |
Firmware development within a framework from different design centers depositing component(s) with related contextual and genealogy information in an accessible repository
Methods and systems for developing firmware are provided. In certain embodiments, a method comprises defining a framework for firmware to be developed by firmware developers at different design...
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7174468 |
Methodology for coordinating and tuning application power
Methods and systems are provided for developing a power management strategy for an application as the application is developed. These methods and systems broadly provide for building the...
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7171632 |
Apparatus, method and program for designing semiconductor integrated circuit
An apparatus for designing a semiconductor integrated circuit having a configurable processor includes: a software information storage section storing software information including software...
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7171631 |
Method and apparatus for jump control in a pipelined processor
An improved method and apparatus for controlling and implementing instructions in a pipelined central processing unit (CPU) or user-customizable microprocessor. In a first aspect of the invention,...
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7171548 |
Method for managing resources in a reconfigurable computer having programmable logic resources where automatically swapping configuration data between a secondary storage device and the programmable logic resources
A reconfigurable computer system based on programmable logic is provided. A system design language may be used to write applications. The applications may be automatically partitioned into software...
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7168060 |
Method of generating development environment for developing system LSI and medium which stores program therefor using VLIW designating description
A system LSI development environment generating method includes a compiler customizing section which generates a compiler from a configuration designation file, an assembler customizing section...
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7158975 |
System and method for storing and accessing data in an interlocking trees datastore
A tree-based datastore comprising a forest of interconnected trees is generated and/or accessed. The tree-based datastore comprises a first tree that depends from a first root node and may include...
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7150011 |
Virtual hardware machine, methods, and devices
The invention relates to methods and apparatus suitable for executing a service or application at a client peer or client side, having a client specific device or client specific platform, with a...
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7143376 |
Method and apparatus for design verification with equivalency check
Method and apparatus for design verification with equivalency checking is described. More particularly, an integrated circuit design for a device having programmable logic is obtained, and a test...
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7139985 |
Development system for an integrated circuit having standardized hardware objects
Embodiments of the invention include a system for an integrated circuit development. Elements of the development system include hardware and software objects. These objects can be instanced,...
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