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7392331 System and method for transmitting data packets in a computer system having a memory hub architecture  
A system and method for transmitting data packets from a memory hub to a memory controller is disclosed. The system includes an upstream reception port coupled to an upstream link. The upstream...
7389364 Apparatus and method for direct memory access in a hub-based memory system  
A memory hub for a memory module having a DMA engine for performing DMA operations in system memory. The memory hub includes a link interface for receiving memory requests for access at least one...
7386649 Multiple processor system and method including multiple memory hub modules  
A processor-based electronic system includes several memory modules arranged in first and second ranks. The memory modules in the first rank are directly accessed by any of several processors, and...
7382639 System and method for optically interconnecting memory devices  
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control...
7366942 Method and apparatus for high-speed input sampling  
A signal sampler and method for high-speed input sampling of a signal are disclosed. A first sampler samples a data signal at a rising edge of a clock signal and generates a first sampled signal. A...
7366920 System and method for selective memory module power management  
A memory module includes a memory hub that monitors utilization of the memory module and directs devices of the memory module to a reduced power state when the module is not being used at a desired...
7363419 Method and system for terminating write commands in a hub-based memory system  
A memory hub receives downstream memory commands and processes each received downstream memory command to determine whether the memory command includes a write command directed to the memory hub....
7353320 Memory hub and method for memory sequencing  
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics—for example, page hit...
7346817 Method and apparatus for generating and detecting initialization patterns for high speed DRAM systems  
A method and apparatus for determining the characteristics of a communications channel within a high speed memory system includes generating a first signal having a known and repeating pattern and...
7333908 Techniques for generating test patterns in high speed memory devices  
A system and methods for calibrating a memory device are provided. More specifically, a technique for internally generating a test pattern within a memory device and driving the test pattern to a...
7330992 System and method for read synchronization of memory modules  
A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to...
7321617 Data communication system with self-test feature  
A data communication system includes circuitry to assure components respond to variations in the time length of the valid data window or “eye” of the high speed data communication signal. A...
7318167 DDR II write data capture calibration  
A calibration circuit for calibrating the input data path of a digital circuit is disclosed. A simple string of a repeating data pattern such as, e.g., “1100,” is sent on the data path. The...
7310752 System and method for on-board timing margin testing of memory modules  
A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to...
7310748 Memory hub tester interface and method for use thereof  
A memory hub including a memory test bridge circuit for testing memory devices. Test command packets are coupled from a tester to the memory hub responsive to a test clock signal having a test...
7308004 Method and apparatus of multiplexing and demultiplexing communication signals  
A method and apparatus for multiplexing and demultiplexing communication signals are described herein. In one embodiment, an apparatus includes first sample logic to sample a plurality of...
7289347 System and method for optically interconnecting memory devices  
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control...
7282947 Memory module and method having improved signal routing topology  
A registered memory module includes several memory devices coupled to a register through a plurality of transmission lines forming a symmetrical tree topology. The tree includes several branches...
7278060 System and method for on-board diagnostics of memory modules  
A memory hub includes an on-board diagnostic engine through which diagnostic testing and evaluation of the memory system can be performed. The memory hub includes a link interface for receiving...
7272682 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Memory hub bypass circuit and method  
A computer system and a method used to access data from a plurality of memory devices with a memory hub. The computer system includes a plurality of memory modules coupled to a memory hub...
7269681 Arrangement for receiving and transmitting PCI-X data according to selected data modes  
An integrated device (e.g., an integrated PCI bridge device) buffers received PCI bus strobe signals and distributes strobe signals for PCI receive data relative to the PCI data lines, enabling all...
7266633 System and method for communicating the synchronization status of memory modules during initialization of the memory modules  
A memory system includes a memory hub controller coupled to a plurality of memory modules each of which includes a memory hub. The memory hub controller and the memory hubs each include at least...
7260685 Memory hub and access method having internal prefetch buffers  
A memory module includes a memory hub coupled to several memory devices. The memory hub includes history logic that predicts on the basis of read memory requests which addresses in the memory...
7257683 Memory arbitration system and method having an arbitration packet protocol  
A memory hub and method for transmitting a read response on a data path of a memory hub interposed between a transmitting memory hub and a receiving memory hub. An arbitration packet including data...
7254331 System and method for multiple bit optical data transmission in memory systems  
The disclosed system and method data increases data transmission speed through a memory system by using optical signals comprising a plurality of wavelengths of light so that each pulse of optical...
7251714 Method and system for capturing and bypassing memory transactions in a hub-based memory system  
A memory hub includes a reception interface that receives data words and captures the data words in response to a first clock signal in a first time domain. The interface also provides groups of...
7249236 Method and system for controlling memory accesses to memory modules having a memory hub architecture  
A computer system includes a memory hub controller coupled to a plurality of memory modules. The memory hub controller includes a memory request queue that couples memory requests and corresponding...
7245145 Memory module and method having improved signal routing topology  
A registered memory module includes several memory devices coupled to a register through a plurality of transmission lines forming a symmetrical tree topology. The tree includes several branches...
7242213 Memory module and method having improved signal routing topology  
A registered memory module includes several memory devices coupled to a register through a plurality of transmission lines forming a symmetrical tree topology. The tree includes several branches...
7234070 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding  
A memory system includes a memory hub controller that sends write data to a plurality of memory modules through a downstream data bus and receives read data from the memory modules through an...
7222213 System and method for communicating the synchronization status of memory modules during initialization of the memory modules  
A memory system includes a memory hub controller coupled to a plurality of memory modules each of which includes a memory hub. The memory hub controller and the memory hubs each include at least...
7222197 Apparatus and method for direct memory access in a hub-based memory system  
A memory hub for a memory module having a DMA engine for performing DMA operations in system memory. The memory hub includes a link interface for receiving memory requests for access at least one...
7213082 Memory hub and method for providing memory sequencing hints  
A memory module includes a memory hub coupled to several memory devices. The memory hub is also coupled to receive a memory packet from a system controller containing a memory hint indicative of...
7210059 System and method for on-board diagnostics of memory modules  
A memory hub includes an on-board diagnostic engine through which diagnostic testing and evaluation of the memory system can be performed. The memory hub includes a link interface for receiving...
7206368 Compensating jitter in differential data signals  
A method for compensating jitter in received differential data signals includes recovering a first clock signal from the received differential data signals. Re-timed differential data signals are...
7200024 System and method for optically interconnecting memory devices  
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control...
7194593 Memory hub with integrated non-volatile memory  
A memory hub having an integrated non-volatile memory for storing configuration information is provided. The memory hub includes a high-speed interface for receiving memory access requests, a...
7188219 Buffer control system and method for a memory system having outstanding read and write request buffers  
A memory controller and method for managing the issuance of read and write requests to a system memory is provided. The number of outstanding read requests and write requests issued to the system...
7181584 Dynamic command and/or address mirroring system and method for memory modules  
A memory module includes a memory hub that couples signals to memory devices mounted on opposite first and second surfaces of a memory module substrate. The memory devices are mounted in mirrored...
7180522 Apparatus and method for distributed memory control in a graphics processing system  
A distributed memory controller memory system for a graphics processing system having addressable memory areas each coupled to a respective memory controller. The memory controllers are further...
7168027 Dynamic synchronization of data capture on an optical or other high speed communications link  
A method and system that dynamically adjusts link control parameters of a communications network. The communications network includes a transmitter coupled through a first data link to a receiver....
7162567 Memory hub and method for memory sequencing  
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics—for example, page hit...
7159092 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same  
A method and circuit adaptively adjust respective timing offsets of digital signals relative to a clock output along with the digital signals to enable a latch receiving the digital signals to...
7149874 Memory hub bypass circuit and method  
A computer system and a method used to access data from a plurality of memory devices with a memory hub. The computer system includes a plurality of memory modules coupled to a memory hub...
7136958 Multiple processor system and method including multiple memory hub modules  
A processor-based electronic system includes several memory modules arranged in first and second ranks. The memory modules in the first rank are directly accessed by any of several processors, and...
7133991 Method and system for capturing and bypassing memory transactions in a hub-based memory system  
A memory hub includes a reception interface that receives data words and captures the data words in response to a first clock signal in a first time domain. The interface also provides groups of...
7133972 Memory hub with internal cache and/or memory access prediction  
A computer system includes a memory hub for coupling a processor to a plurality of synchronous dynamic random access memory (“SDRAM”) devices. The memory hub includes a processor interface...
7120743 Arbitration system and method for memory responses in a hub-based memory system  
A memory hub includes a local queue that stores local memory responses, a bypass path that passes downstream memory responses, and a buffered queue coupled to the bypass path that stores downstream...
7120727 Reconfigurable memory module and method  
A computer system includes a controller coupled to a plurality of memory modules each of which includes a memory hub and a plurality of memory devices divided into a plurality of ranks. The memory...
7120723 System and method for memory hub-based expansion bus  
A system memory includes a memory hub controller, a memory module accessible by the memory hub controller, and an expansion module having a processor circuit coupled to the memory module and also...
Matches 1 - 50 out of 62 1 2 >