Matches 1 - 28 out of 28
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7416992 Method of patterning a low-k dielectric using a hard mask  
By using a non-metallic hard mask for patterning low-k dielectric materials of advanced semiconductor devices, an enhanced degree of etch fidelity is obtained. The present invention may readily be...
7358146 Method of forming a capacitor  
A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings...
7321149 Capacitor structures, and DRAM arrays  
A patterned mask can be formed as follows. A first patterned photoresist is formed over a masking layer and utilized during a first etch into the masking layer. The first etch extends to a depth in...
7276409 Method of forming a capacitor  
A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings...
7256134 Selective etching of carbon-doped low-k dielectrics  
The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture...
7244672 Selective etching of organosilicate films over silicon oxide stop etch layers  
A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing...
7200460 Method of depositing low dielectric constant silicon carbide layers  
A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source,...
7183201 Selective etching of organosilicate films over silicon oxide stop etch layers  
A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing...
7153778 Methods of forming openings, and methods of forming container capacitors  
A patterned mask can be formed as follows. A first patterned photoresist is formed over a masking layer and utilized during a first etch into the masking layer. The first etch extends to a depth in...
7117064 Method of depositing dielectric films  
A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon...
7112532 Process for forming a dual damascene structure  
The invention describes a method for forming a dual damascene structure. An etch stop layer ( 150 ) is formed on a dielectric layer ( 140 ). A second dielectric layer ( 160 ) is formed on the etch...
7034409 Method of eliminating photoresist poisoning in damascene applications  
A method is provided for processing a substrate including treating a surface of a dielectric layer comprising silicon and carbon by exposing the dielectric layer comprising silicon and carbon to a...
7001850 Method of depositing dielectric films  
A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon...
6919638 Method, structure and process flow to reduce line-line capacitance with low-K material  
An improved method, structure and process flow for reducing line-line capacitance using low dielectric constant (K) materials is provided. Embodiments in accordance with the present invention form...
6913994 Method to form Cu/OSG dual damascene structure for high performance and reliable interconnects  
An improved method of forming a dual damascene structure that includes an organosilicate glass (OSG) dielectric layer is described. A via first process is followed in which a via is formed in the...
6890865 Low k film application for interlevel dielectric and method of cleaning etched features  
Methods of selectively removing post-etch polymer material and dielectric antireflective coatings (DARC) without substantially etching an underlying carbon-doped low k dielectric layer, and...
6855484 Method of depositing low dielectric constant silicon carbide layers  
A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source,...
6821884 Method of fabricating a semiconductor device  
This invention relates to Integrated Circuit (IC) processing and fabrication. A device and a method are provided for etching an opening in an insulating layer while depositing a barrier layer on...
6764958 Method of depositing dielectric films  
A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon...
6762127 Etch process for dielectric materials comprising oxidized organo silane materials  
The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH 2 F 2 /Ar...
6656837 Method of eliminating photoresist poisoning in damascene applications  
A method is provided for processing a substrate including treating a surface of a dielectric layer comprising silicon and carbon by exposing the dielectric layer comprising silicon and carbon to a...
6605863 Low k film application for interlevel dielectric and method of cleaning etched features  
Methods of selectively removing post-etch polymer material and dielectric antireflective coatings (DARC) without substantially etching an underlying carbon-doped low k dielectric layer, and...
6605536 Treatment of low-k dielectric films to enable patterning of deep submicron features  
Treating a low-k dielectric layer ( 104 ) using a highly oxidizing wet solution (e.g., H 2 SO 4 ) to improve patterning. Resist poisoning occurs due to an interaction between low-k films ( 104 ),...
6600207 Structure to reduce line-line capacitance with low K material  
A structure to reduce line—line capacitance using low dielectric constant (K) materials is provided. Embodiments in accordance with the present invention are semiconductor devices having a single...
6573175 Dry low k film application for interlevel dielectric and method of cleaning etched features  
Methods of selectively removing post-etch polymer material and dielectric antireflective coatings (DARC) without substantially etching an underlying carbon-doped low k dielectric layer, and...
6537733 Method of depositing low dielectric constant silicon carbide layers  
A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source,...
6531407 Method, structure and process flow to reduce line-line capacitance with low-K material  
An improved method, structure and process flow for reducing line-line capacitance using low dielectric constant (K) materials is provided. Embodiments in accordance with the present invention form...
6525428 Graded low-k middle-etch stop layer for dual-inlaid patterning  
Improved etch selectivity, barrier metal wetting and reduced interconnect capacitance are achieved by implementing damascene processing employing a graded middle etch stop layer comprising a first...
Matches 1 - 28 out of 28