Matches 1 - 38 out of 38
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7406643 Semiconductor integrated circuit device, method of manufacturing the device, and computer readable medium  
A semiconductor integrated circuit device which guarantees the characteristics of writing to and reading from the built-in memory even when the manufacturing process conditions are varied, a method...
7401281 Remote BIST high speed test and redundancy calculation  
Disclosed is a hybrid built-in self test (BIST) architecture for embedded memory arrays that segments BIST functionality into remote lower-speed executable instructions and local higher-speed...
7304875 Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same  
Search engine devices include a content addressable memory (CAM) core having a plurality of CAM array blocks therein and a control circuit. The control circuit, which is electrically coupled to the...
7279918 Methods for wafer level burn-in  
A method, circuit and system for determining burn-in reliability from wafer level burn-in are disclosed. The method includes recording the number of failures in each IC die in nonvolatile elements...
7275190 Memory block quality identification in a memory device  
If a memory block in a flash memory device is found to have a defect, a memory block quality indication is generated in response to the type of memory defect. This indication is stored in the...
7272758 Defective memory block identification in a memory device  
During manufacture and testing of a memory device, a memory test is performed to determine which, if any, memory blocks are defective. A memory map of the defective blocks is stored in one of the...
7243260 Programmable controller unit and method of automatically restoring memory  
A unit for a programmable controller includes a user program memory storing a user program to be read out for carrying out a calculation process and a backup memory storing data with the same...
7215134 Apparatus for determining burn-in reliability from wafer level burn-in  
A method, circuit and system for determining burn-in reliability from wafer level burn-in are disclosed. The method according to the present invention includes recording the number of failures in...
7212456 Apparatus for dynamically repairing a semiconductor memory  
An architecture for dynamically repairing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), includes circuitry for dynamically storing memory element remapping information....
7210085 Method and apparatus for test and repair of marginally functional SRAM cells  
A method of manufacturing a device having embedded memory including a plurality of memory cells. During manufacturing test, a first test stress is applied to selected cells of the plurality of...
7206984 Built-in self test circuit and test method for storage device  
A built-in self test circuit includes a capture register storing data transmitted from a memory device, an operation controller controlling operation of the memory device and the capture register,...
7194667 System for storing device test information on a semiconductor device using on-device logic for determination of test results  
A system for testing a semiconductor device and storing device test results in nonvolatile memory elements on the tested device, in which the semiconductor device includes logic circuitry which...
7171592 Self-testing circuit in semiconductor memory device  
A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data...
7119568 Methods for wafer level burn-in  
A method, circuit and system for determining burn-in reliability from wafer level burn-in are disclosed. The method includes recording the number of failures in each IC die in nonvolatile elements...
7114113 Test circuit provided with built-in self test function  
A test circuit includes an input circuit for inputting data to select a test mode relative to a circuit to be tested and outputting result of selection of the test mode in synchronization with a...
7073112 Compilable address magnitude comparator for memory array self-testing  
An apparatus that improves Built-In-Self-Test (BIST) flexibility. A compilable address magnitude comparator facilitates BIST testing of different size memory arrays without requiring customization...
7038481 Method and apparatus for determining burn-in reliability from wafer level burn-in  
A method and apparatus for determining burn-in reliability from wafer level burn-in are disclosed. The method according to the present invention includes recording the number of failures in each IC...
7007212 Transmission device, reception device, test circuit, and test method  
The present invention provides a transmission device, a reception device, a test circuit and a test method, which enable internal parts of the circuit to operate at high speed, while performing...
6978411 Memory test system for peak power reduction  
A memory test system for peak power reduction. The memory test system includes a plurality of memories, a plurality of memory built-in self-test circuits and a plurality of delay units. Each of the...
6977855 Apparatus and method for dynamically repairing a semiconductor memory  
An architecture for dynamically repairing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), includes circuitry for dynamically storing memory element remapping information....
EP1583009A1 Method and apparatus for designing and manufacturing electronic circuits subject to process variations  
Abstract not available
6943575 Method, circuit and system for determining burn-in reliability from wafer level burn-in  
A method, circuit and system for determining burn-in reliability from wafer level burn-in are disclosed. The method according to the present invention includes recording the number of failures in...
6922649 Multiple on-chip test runs and repairs for memories  
A structure and method for performing on-chip test runs and repairs of a memory chip. In the first test run and repair, a BIST circuit obtains the original combined repair solution from a fuse bay...
6910163 Method and configuration for the output of bit error tables from semiconductor devices  
A method and a configuration for the output of bit error tables from semiconductor devices are described. A test control unit reads the bit error table from the memory device following a request...
6894526 Apparatus for determining burn-in reliability from wafer level burn-in  
An apparatus for determining burn-in reliability from wafer level burn-in is disclosed. The apparatus according to the present invention includes nonvolatile elements on an integrated circuit for...
6879530 Apparatus for dynamically repairing a semiconductor memory  
An architecture for dynamically repairing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), includes circuitry for dynamically storing memory element remapping information....
6874110 Apparatus and method for self testing programmable logic arrays  
A self-testing programmable logic array PLA system has an array of programmably interconnected logic cells, a built-in self-test (BIST) structure interconnected with the logic cells, and a BIST...
6829737 Method and system for storing device test information on a semiconductor device using on-device logic for determination of test results  
A method and system for testing a semiconductor device and storing device test results in nonvolatile memory elements on the tested device, in which the semiconductor device includes logic...
6829176 Apparatus and method for dynamically repairing a semiconductor memory  
An architecture for dynamically repairing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), includes circuitry for dynamically storing memory element remapping information....
EP1480228A1 Method and device for at-speed storage of faults for built-in self-repair (BISR) of embedded-RAMs  
A method and a device for at-speed storage of faults for Built-In Self-Repair (BISR) of embedded-RAMs are arranged such that the full failure bitmap for each failing word is stored in a fault...
6754849 Method of and apparatus for testing CPU built-in RAM mixed LSI  
A test apparatus includes a switch switched towards the ROM under the control of a signal output from the tester. When the switch is switched towards the ROM, the computer program for carrying out...
6658610 Compilable address magnitude comparator for memory array self-testing  
The present invention provides a method and apparatus that improves Built-In-Self-Test (BIST) flexibility without requiring the complexity of a compilable BIST circuit. Additionally, the present...
6643807 Array-built-in-self-test (ABIST) for efficient, fast, bitmapping of large embedded arrays in manufacturing test  
A structure and method for an integrated circuit which includes read/write memory having a plurality of memory devices, each of the memory devices having a unique address; a built-in self-test...
5602414 Infrared detector having active regions and isolating regions formed of CdHgTe  
In a method for fabricating an infrared detector, initially, a CdHgTe layer of a first conductivity type is produced on a front surface of a semiconductor substrate, a plurality of spaced apart...
5198370 Method for producing an infrared detector  
In a method of producing an infrared detector, a first conductivity type semiconductor layer, in which lattice vacancies acting as first conductivity type carriers are formed by evaporation of an...
5156980 Method of making a rear surface incident type photodetector  
A method for producing a photodetector device includes depositing a plurality of spaced apart light absorption regions at intervals on a substrate, depositing an insulating layer on the substrate...
5095211 Infrared image sensor and image pick-up apparatus using the same  
An infrared image sensor includes a plurality of Schottky type infrared detecting elements (8) arranged in array formed on one main surface of a semiconductor substrate (1a) or in a vicinity of the...
5075748 Photodetector device  
A rear surface incident type photodetector device includes spaced apart light absorption regions on a semi-insulating substrate, a semi-insulating layer covering the light absorption regions on the...
Matches 1 - 38 out of 38